MicrelMIC5841/5842
7-42 October 1998
MIC5841/5842
8-Bit Serial-Input Latched Drivers
Features
• 3.3 MHz Minimum Data-Input Rate
• CMOS, PMOS, NMOS, TTL Compatible
• Internal Pull-Up/Pull-Down Resistors
• Low-Power CMOS Logic and Latches
• High-Voltage Current-Sink Outputs
• Output Transient-Protection Diodes
• Single or Split Supply Operation
Functional Diagram Pin Configuration
(DIP, SOIC)
DD
1
2
3
4
5
6
7
14
13
12
11
10
LATCHES
V
1
OUT
2
OUT
3
OUT
4
OUT
CLOCK
SERIAL DATA OUT
SS
V
8
9
15
16
17
18
5
OUT
6
OUT
7
OUT
8
OUT
K
EE
V
SERIAL DATA IN
STROBE
OUTPUT ENABLE
EE
V
SHIFT REGISTER
C
DD
V
SS
V
SUB
SUB
ST
OE
8-BIT SERIAL-PARALLEL SHIFT REGISTER 6
SERIAL
DATA OUT
CLK
1
3
4
SERIAL
DATA IN
V
SS
11
V
DD
STROBE
OUTPUT ENABLE
(ACTIVE LOW)
Bipolar
MOS
LATCHES
OUT
8
12131415161718
OUT
7
OUT
6
OUT
5
OUT
4
OUT
3
OUT
2
OUT
1
5
7
8
Sub
V
EE9
1
10
K
General Description
Using BiCMOS technology, the MIC5841/5842 integrated
circuits were fabricated to be used in a wide variety of
peripheral power driver applications. The devices each have
an eight-bit CMOS shift register, CMOS control circuitry,
eight CMOS data latches, and eight bipolar current-sink
Darlington output drivers.
These two devices differ only in maximum voltage ratings.
The MIC5842 offers premium performance with a minimum
output breakdown voltage rating of 80V (50V sustaining). The
drivers can be operated with a split supply where the negative
supply is down to –20V.
The 500 mA outputs, with integral transient-suppression
diodes, are suitable for use with lamps, relays, solenoids and
other inductive loads.
These devices have improved speed characteristics. With a
5V logic supply, they will typically operate faster than 5 MHz.
With a 12V supply, significantly higher speeds are obtained.
The CMOS inputs are compatible with standard CMOS,
PMOS, and NMOS logic levels. TTL or DTL circuits may
require the use of appropriate pull-up resistors. By using the
serial data output, the drivers can be cascaded for interface
applications requiring additional drive lines.
The MIC5840 family is available in DIP, PLCC, and SOIC
packages. Because of limitations on package power dissipa-
tion, the simultaneous operation of all drivers at maximum
rated current might require a reduction in duty cycle. A
copper-alloy lead frame provides for maximum package
power dissipation.
Ordering Information
Part Number Temperature Range Package
MIC5841BN –40°C to +85°C 18-Pin Plastic DIP
MIC5841BV –40°C to +85°C 20-Pin PLCC
MIC5841BWM –40°C to +85°C 18-Pin Wide SOIC
MIC5842BN –40°C to +85°C 18-Pin Plastic DIP
MIC5842BV –40°C to +85°C 20-Pin PLCC
MIC5842BWM –40°C to +85°C 18-Pin Wide SOIC
October 1998 7-43
Micrel
MIC5841/5842
7
Electrical Characteristics at TA = 25°C VDD = 5V, VSS = VEE = 0V (unless otherwise noted)
Applicable Limits
Characteristic Symbol Devices Test Conditions Min. Max. Unit
Output Leakage Current ICEX MIC5841 VOUT = 50V 50 µA
VOUT = 50V, TA = +70°C 100
MIC5842 VOUT = 80V 50
VOUT = 80V, TA = +70°C 100
Collector-Emitter VCE(SAT) Both IOUT = 100mA 1.1 V
Saturation Voltage IOUT = 200mA 1.3
IOUT = 350mA, VDD = 7.0V 1.6
Collector-Emitter VCE(SUS) MIC5841 IOUT = 350mA, L = 2mH 35 V
Sustaining Voltage (Note 5) MIC5842 IOUT = 350mA, L = 2mH 50
Input Voltage VIN(0) Both 0.8 V
VIN(1) Both VDD = 12V 10.5
VDD = 10V 8.5
VDD = 5.0V (See Note 4) 3.5
Input Resistance RIN Both VDD = 12V 50 kΩ
VDD = 10V 50
VDD = 5.0V 50
Supply Current IDD(ON) Both All Drivers ON, VDD = 12V 16 mA
All Drivers ON, VDD = 10V 14
All Drivers ON, VDD = 5.0V 8.0
IDD(OFF) Both All Drivers OFF, VDD = 12V 2.9
All Drivers OFF, VDD = 10V 2.5
All Drivers OFF, VDD = 5.0V 1.6
Clamp Diode IRMIC5841 VR = 50V 50 µA
Leakage Current MIC5842 VR = 80V 50
Clamp Diode VFBoth IF = 350mA 2.0 V
Forward Voltage
Note 4: Operation of these devices with standard TTL may require the use of appropriate pull-up resistors to insure an
input logic HIGH.
Note 5: Not 100% tested. Guaranteed by design.
Absolute Maximum Ratings (Note 1, 2, 3)
at 25°C Free-Air Temperature and VSS = 0V
Output Voltage, VCE (MIC5841) 50V
(MIC5842) 80V
Output Voltage, VCE(SUS) (MIC5841) (Note 1) 35V
(MIC5842) 50V
Logic Supply Voltage, VDD 15V
VDD with Reference to VEE 25V
Emitter Supply Voltage, VEE –20V
Input Voltage Range, VIN –0.3V to VDD + 0.3V
Continuous Output Current, IOUT 500mA
Package Power Dissipation, PD (Note 2) 1.82W
Operating Temperature Range, TA–55°C to +85°C
Storage Temperature Range, TS–65°C to +150°C
Note 1: For Inductive load applications.
Note 2: Derate at the rate of 18.2mW/°C above TA = 25°C (Plastic DIP)
Note 3: CMOS devices have input-static protection but are susceptible to
damage when exposed to extremely high static electrical
charges.
Pin Configuration
(20-Pin PLCC)Top View.
123
4
12 1311
20 19
18
14
15
16
17
9 10
5
6
7
8
OUT 1
OUT 2
OUT 3
OUT 4
OUT 5
OUT 6
OUT 7
OUT 8
K
SERIAL DATA OUT
VSS
SERIAL DATA IN
STROBE
NC
OUTPUT EN
VDD
NC
VEE
MIC5842BV
CLOCK
VEE
MicrelMIC5841/5842
7-44 October 1998
Electrical Characteristics TA = –55°C, VDD = 5V, VSS = VEE = 0V (unless otherwise noted)
Limits
Characteristic Symbol Test Conditions Min. Max. Unit
Output Leakage Current ICEX VOUT = 80V 50 µA
Collector-Emitter VCE(SAT) IOUT = 100mA 1.3 V
Saturation Voltage IOUT = 200mA 1.5
IOUT = 350mA, VDD = 7.0V 1.8
Input Voltage VIN(0) 0.8 V
VIN(1) VDD = 12V 10.5
VDD = 5.0V 3.5
Input Resistance RIN VDD = 12V 35 kΩ
VDD = 10V 35
VDD = 5.0V 35
Supply Current IDD(ON) All Drivers ON, VDD = 12V 16 mA
All Drivers ON, VDD = 10V 14
All Drivers ON, VDD = 5.0V 10
IDD(OFF) All Drivers OFF, VDD = 12V 3.5
All Drivers OFF, VDD = 5.0V 2.0
Electrical Characteristics TA = +125°C, VDD = 5V, VSS = VEE = 0V (unless otherwise noted)
Limits
Characteristic Symbol Test Conditions Min. Max. Unit
Output Leakage Current ICEX VOUT = 80V 500 µA
Collector-Emitter VCE(SAT) IOUT = 100mA 1.3 V
Saturation Voltage IOUT = 200mA 1.5
IOUT = 350mA, VDD = 7.0V 1.8
Input Voltage VIN(0) 0.8 V
VIN(1) VDD = 12V 10.5
VDD = 5.0V 3.5
Input Resistance RIN VDD = 12V 50 kΩ
VDD = 10V 50
VDD = 5.0V 50
Supply Current IDD(ON) All Drivers ON, VDD = 12V 16 mA
All Drivers ON, VDD = 10V 14
All Drivers ON, VDD = 5.0V 8
IDD(OFF) All Drivers OFF, VDD = 12V 2.9
All Drivers OFF, VDD = 5.0V 1.6
Clamp Diode Leakage IRMIC5841A VR = 50V 100 µA
Current MIC5842A VR = 80V 100
October 1998 7-45
Micrel
MIC5841/5842
7
Timing Conditions
(TA = 25°C Logic Levels are VDD and VSS)V
DD = 5V
A. Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) ........................................................................75 ns
B. Minimum Data Active Time After Clock Pulse (Data Hold Time)..............................................................................75 ns
C. Minimum Data Pulse Width .....................................................................................................................................150 ns
D. Minimum Clock Pulse Width....................................................................................................................................150 ns
E. Minimum Time Between Clock Activation and Strobe .............................................................................................300 ns
F. Minimum Strobe Pulse Width...................................................................................................................................100 ns
G. Typical Time Between Strobe Activation and Output Transition .............................................................................500 ns
SERIAL DATA present at the input is transferred to the shift register on the logic “0” to logic “1” transition of the CLOCK input
pulse. On succeeding CLOCK pulses, the registers shift data information towards the SERIAL DATA OUTPUT. The SERIAL
DATA must appear at the input prior to the rising edge of the CLOCK input waveform.
Information present at any register is transferred to its respective latch when the STROBE is high (serial-to-parallel conversion).
The latches will continue to accept new data as long as the STROBE is held high. Applications where the latches are bypassed
(STROBE tied high) will require that the ENABLE input be high during serial data entry.
When the ENABLE input is high, all of the output buffers are disabled (OFF) without affecting information stored in the latches
or shift register. With the ENABLE input low, the outputs are controlled by the state of the latches.
CLOCK
DATA IN
STROBE
OUTPUT
ENABLE
D
B
A
E
C
G
OUTN
F
MIC5840 Family Truth Table
Serial Shift Register Contents Serial Latch Contents Output Contents
Data Clock Data Strobe Output
Input Input I1I2I3…… I8Output Input I1I2I3…… I8Enable I1I2I3…… I8
HHR
1R2…… R7R7
LLR
1R2…… R7R7
XR
1R2R3…… R8R8
XXX……X X L R
1R2R3…… R8
P1P2P3…… P8P8HP
1P2P3…… P8LP
1P2P3…… P8
X X X …… X H H H H …… H
L = Low Logic Level
H = High Logic Level
X = Irrelevant
P = Present State
R = Previous State
MicrelMIC5841/5842
7-46 October 1998
Maximum Allowable Duty Cycle (Plastic DIP)
VDD = 5.0V
Number of Outputs ON
(IOUT = 200mA Max. Allowable Duty Cycle at Ambient Temperature of
VDD = 5.0V) 25°C40°C50°C60°C70°C
8 85% 72% 64% 55% 46%
7 97% 82% 73% 63% 53%
6 100% 96% 85% 73% 62%
5 100% 100% 100% 88% 75%
4 100% 100% 100% 100% 93%
3 100% 100% 100% 100% 100%
2 100% 100% 100% 100% 100%
1 100% 100% 100% 100% 100%
Typical Input Circuits
Typical Output Driver
SUB
N
OUT
K
EE
V
3K7.2K
CLOCK
SERIAL
DATA IN
DD
V
SS
V
STROBE
OUTPUT
ENABLE
DD
V
SS
V
Number of Outputs ON
(IOUT = 200mA Max. Allowable Duty Cycle at Ambient Temperature of
VDD = 12V) 25°C40°C50°C60°C70°C
8 80% 68% 60% 52% 44%
7 91% 77% 68% 59% 50%
6 100% 90% 79% 69% 58%
5 100% 100% 95% 82% 69%
4 100% 100% 100% 100% 86%
3 100% 100% 100% 100% 100%
2 100% 100% 100% 100% 100%
1 100% 100% 100% 100% 100%
VDD = 12V
October 1998 7-47
Micrel
MIC5841/5842
7
MIC5841 Solenoid Driver with Output Enable MIC5841 Level Shifting Lamp Driver with Darlington
Emitters Tied to a Negative Supply
1
2
3
4
5
6
7
14
13
12
11
10
LATCHES
CLOCK
DATA OUT
8
9
15
16
17
18
DATA IN
STROBE
OUTPUT
ENABLE
(ACTIVE LOW)
SHIFT REGISTER
C
DD
V
SS
V
SUB
SUB
ST
OE
+30V-15V+5V
–15V
1
2
3
4
5
6
7
14
13
12
11
10
LATCHES
8
9
15
16
17
18
SHIFT REGISTER
DD
V
SS
V
SUB
SUB
ST
OE
CLOCK
SERIAL
DATA IN
+5V +28V
28V
0.1µµ
µµ
22µµ
µµ +
Relay/Solenoid Driver
MIC5842 MIC5841 Hammer Driver
1
2
3
4
5
6
7
14
13
12
11
10
LATCHES
8
9
15
16
17
18
SHIFT REGISTER
DD
V
SS
V
SUB
SUB
ST
OE
CLOCK
SERIAL
DATA IN
+5V +12V
ENABLE
Solenoids: Guardian Electric LT4X7-C-12V
0.1µµ
µµ
22µµ
µµ +
Typical Applications
1
2
3
4
5
6
7
14
13
12
11
10
LATCHES
8
9
15
16
17
18
SHIFT REGISTER
C
DD
V
SS
V
SUB
SUB
ST
OE
-9V
+5V
100µ
0.1µ
SERIAL DATA CLOCK
+
MicrelMIC5841/5842
7-48 October 1998
Typical Applications, Continued
MIC5842 Negative/Positive Supply PIN Diode Driver Transmit/Receive Switch
1
2
3
4
5
6
7
14
13
12
11
10
LATCHES
8
9
15
16
17
18
SHIFT REGISTER
C
DD
V
SS
V
SUB
SUB
ST
OE
10k
RFC
1000p
15
+75V
Transmitter
10k
RFC1000p
25
+75V
10k
RFC
1000p
25
+75V
RFC
Antenna
Receiver
Diode
D1 D2 D3
(Latch 1) (Latch 5) (Latch 8)
Receive OFF ACTIVE OFF
Transmit ACTIVE OFF ACTIVE
+75V
PIN Diodes: UM9651
CLOCK
STROBE
DATA IN
–5V
+5V
0.01µ
0.01µ
0.01µ
+
100µ
D1
D2
D3
