07/22/11
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HEXFET® Power MOSFET
Benefits
lImproved Gate, Avalanche and Dynamic dV/dt
Ruggedness
lFully Characterized Capacitance and Avalanche
SOA
lEnhanced body diode dV/dt and dI/dt Capability
l Lead-Free
Applications
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
S
D
G
GDS
Gate Drain Source
IRFB4115PbF
TO-220AB
G
D
S
V
DSS
150V
R
DS(on)
typ.
9.3m
Ω
max. 11m
Ω
I
D
(Silicon Limited)
104A
PD - 97354B
Absolute Maximum Ratings
Symbol
Parameter
Units
I
D
@ T
C
= 25°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
C
= 100°C Continuous Drain Current, V
GS
@ 10V
I
DM
Pulsed Drain Current
c
P
D
@T
C
= 25°C Maximum Power Dissipation W
Linear Derating Factor W/°C
V
GS
Gate-to-Source Voltage V
dv/dt Peak Diode Recovery
e
V/ns
T
J
Operating Junction and
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
E
AS (Thermally limited)
Single Pulse Avalanche Energy
d
mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
R
θJC
Junction-to-Case
j
––– 0.40
R
θCS
Case-to-Sink, Flat Greased Surface 0.50 ––– °C/W
R
θJA
Junction-to-Ambient
ij
––– 62
830
380
18
10lb
x
in (1.1N
x
m)
A
°C
300
-55 to + 175
± 20
2.5
104
74
420
IRFB4115PbF
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Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Recommended max EAS limit, starting TJ = 25°C,
L = 0.17mH, RG = 25Ω, IAS = 100A, VGS =15V.
ISD ≤ 62A, di/dt ≤ 1040A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
S
D
G
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Units
V
(BR)DSS
Drain-to-Source Breakdown Voltage 150 ––– ––– V
ΔV
(BR)DSS
/ΔT
J
Breakdown Voltage Temp. Coefficient ––– 0.18 ––– V/°C
R
DS(on)
Static Drain-to-Source On-Resistance ––– 9.3 11 m
Ω
V
GS(th)
Gate Threshold Voltage 3.0 ––– 5.0 V
I
DSS
Drain-to-Source Leakage Current ––– ––– 20 μA
––– ––– 250
I
GSS
Gate-to-Source Forward Leakage ––– ––– 100 nA
Gate-to-Source Reverse Leakage ––– ––– -100
R
G
Internal Gate Resistance ––– 2.3 –––
Ω
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
gfs Forward Transconductance 97 ––– ––– S
Q
g
Total Gate Charge ––– 77 120 nC
Q
gs
Gate-to-Source Charge ––– 28 –––
Q
gd
Gate-to-Drain ("Miller") Charge ––– 26 –––
Q
sync
Total Gate Charge Sync. (Q
g
- Q
gd
)––– 51 –––
t
d(on)
Turn-On Delay Time ––– 18 ––– ns
t
r
Rise Time ––– 73 –––
t
d(off)
Turn-Off Delay Time ––– 41 –––
t
f
Fall Time ––– 39 –––
C
iss
Input Capacitance ––– 5270 ––– pF
C
oss
Output Capacitance ––– 490 –––
C
rss
Reverse Transfer Capacitance ––– 105 –––
C
oss
eff. (ER)
Effective Output Capacitance (Energy Related)
––– 460 –––
C
oss
eff. (TR) Effective Output Capacitance (Time Related) ––– 530 –––
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units
I
S
Continuous Source Current ––– ––– 104 A
(Body Diode)
I
SM
Pulsed Source Current ––– ––– 420 A
(Body Diode)
d
V
SD
Diode Forward Voltage ––– ––– 1.3 V
t
rr
Reverse Recovery Time ––– 86 ––– ns T
J
= 25°C V
R
= 130V,
––– 110 ––– T
J
= 125°C I
F
= 62A
Q
rr
Reverse Recovery Charge ––– 300 ––– nC T
J
= 25°C di/dt = 100A/μs
f
––– 450 ––– T
J
= 125°C
I
RRM
Reverse Recovery Current ––– 6.5 ––– A T
J
= 25°C
t
on
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
I
D
= 62A
R
G
= 2.2Ω
V
GS
= 10V
f
V
DD
= 98V
I
D
= 62A, V
DS
=0V, V
GS
= 10V
T
J
= 25°C, I
S
= 62A, V
GS
= 0V
f
integral reverse
p-n junction diode.
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 3.5mA
c
V
GS
= 10V, I
D
= 62A
f
V
DS
= V
GS
, I
D
= 250μA
V
DS
= 150V, V
GS
= 0V
V
DS
= 150V, V
GS
= 0V, T
J
= 125°C
MOSFET symbol
showing the
V
DS
= 75V
Conditions
V
GS
= 10V
f
V
GS
= 0V
V
DS
= 50V
ƒ = 1.0 MHz, See Fig. 5
V
GS
= 0V, V
DS
= 0V to 120V
h
, See Fig. 11
V
GS
= 0V, V
DS
= 0V to 120V
g
Conditions
V
DS
= 50V, I
D
= 62A
I
D
= 62A
V
GS
= 20V
V
GS
= -20V
IRFB4115PbF
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Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature
Fig 2. Typical Output Characteristics
Fig 6. Typical Gate Charge vs. Gate-to-Source VoltageFig 5. Typical Capacitance vs. Drain-to-Source Voltage
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
BOTTOM 5.0V
≤60μs PULSE WIDTH
Tj = 25°C
5.0V
110 100 1000
VDS, Drain-to-Source Voltage (V)
10
100
1000
10000
100000
C, Capacitance (pF)
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = C gd
Coss = Cds + Cgd
Coss
Crss
Ciss
2 4 6 8 10 12 14 16
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
VDS = 50V
≤60μs PULSE WIDTH
0 20406080100
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
VGS, Gate-to-Source Voltage (V)
VDS= 120V
VDS= 75V
VDS= 30V
ID= 62A
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
5.0V
≤60μs PULSE WIDTH
Tj = 175°C
VGS
TOP 15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
BOTTOM 5.0V
-60 -40 -20 020 40 60 80 100120140160180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 62A
VGS = 10V
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Fig 8. Maximum Safe Operating Area
Fig 10. Drain-to-Source Breakdown Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 11. Typical COSS Stored Energy
Fig 9. Maximum Drain Current vs.
Case Temperature
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
20
40
60
80
100
120
ID, Drain Current (A)
-60 -40 -20 020 40 60 80 100120140160180
TJ , Temperature ( °C )
140
150
160
170
180
190
200
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
Id = 3.5mA
-20 0 20 40 60 80 100 120 140 160
VDS, Drain-to-Source Voltage (V)
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Energy (μJ)
1 10 100 1000
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
Tc = 25°C
Tj = 175°C
Single Pulse
100μsec
1msec
10msec
DC
Fig 12. Threshold Voltage vs. Temperature
-75 -50 -25 025 50 75 100 125 150 175
TJ , Temperature ( °C )
1.0
2.0
3.0
4.0
5.0
6.0
VGS(th), Gate threshold Voltage (V)
ID = 250μA
ID = 1.0mA
ID = 1.0A
IRFB4115PbF
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Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 14. - Typical Recovery Current vs. dif/dt
0200 400 600 800 1000
diF /dt (A/μs)
0
10
20
30
40
50
IRR (A)
IF = 42A
VR = 130V
TJ = 25°C
TJ = 125°C
Fig 15. - Typical Recovery Current vs. dif/dt
0200 400 600 800 1000
diF /dt (A/μs)
0
10
20
30
40
50
IRR (A)
IF = 62A
VR = 130V
TJ = 25°C
TJ = 125°C
Fig 16. - Typical Stored Charge vs. dif/dt
0200 400 600 800 1000
diF /dt (A/μs)
0
500
1000
1500
2000
2500
QRR (A)
IF = 42A
VR = 130V
TJ = 25°C
TJ = 125°C
Fig 17. - Typical Stored Charge vs. dif/dt
0200 400 600 800 1000
diF /dt (A/μs)
0
600
1200
1800
2400
3000
QRR (A)
IF = 62A
VR = 130V
TJ = 25°C
TJ = 125°C
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.0001
0.001
0.01
0.1
1
Thermal Response ( Z thJC ) °C/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Ri (°C/W) τi (sec)
0.245 0.0059149
0.155 0.0006322
τJ
τ
J
τ1
τ1τ2
τ2
R1
R1R2
R2
τ
C
τC
Ci = τi/Ri
Ci= τi/Ri
IRFB4115PbF
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Fig 20a. Switching Time Test Circuit Fig 20b. Switching Time Waveforms
Fig 19b. Unclamped Inductive Waveforms
Fig 19a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
Fig 21a. Gate Charge Test Circuit Fig 21b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 18. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
Inductor Current
D.U.T. VDS
ID
IG
3mA
VGS
.3μF
50KΩ
.2μF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
VGS
IRFB4115PbF
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Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 07/2011
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
TO-220AB Part Marking Information
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
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TO-220AB packages are not recommended for Surface Mount Application.