DS1691A, DS3691
www.ti.com
SNLS357E –JULY 1998–REVISED APRIL 2013
DS3691 (RS-422/RS-423) Line Drivers with TRI-STATE Outputs
Check for Samples: DS1691A,DS3691
1FEATURES DESCRIPTION
The DS3691 is a low power Schottky TTL line driver
2• Dual RS-422 Line Driver with Mode Pin Low, or designed to meet the requirements of EIA standards
Quad RS-423 Line Driver with Mode Pin High RS-422 and RS-423. It features 4 buffered outputs
• TRI-STATE Outputs in RS-422 Mode with high source and sink current capability with
• Short Circuit Protection for Both Source and internal short circuit protection. A mode control input
provides a choice of operation either as 4 single-
Sink Outputs ended line drivers or 2 differential line drivers. A rise
• Outputs Will Not Clamp Line with Power Off or time control pin allows the use of an external
In TRI-STATE capacitor to slow the rise time for suppression of near
• 100ΩTransmission Line Drive Capability end crosstalk to other receivers in the cable. Rise
time capacitors are primarily intended for
• Low ICC and IEE Power Consumption waveshaping output signals in the single-ended driver
– RS-422: ICC = 9 mA/driver Typ mode. Multipoint applications in differential mode with
– RS-423: ICC = 4.5 mA/driver Typ waveshaping capacitors is not allowed.
– I EE = 2.5 mA/driver Typ With the mode select pin low, the DS3691 are dual-
• Low Current PNP Inputs Compatible with TTL, differential line drivers with TRI-STATE outputs. They
MOS and CMOS feature ±10V output common-mode range in TRI-
STATE mode and 0V output unbalance when
• Pin Compatible with AM26LS30 operated with ±5V supply.
Connection Diagrams
With Mode Select LOW With Mode Select HIGH
(RS-422 Connection) (RS-423 Connection)
Figure 1. SOIC Package Figure 2. SOIC Package
See Package Number D0016A See Package Number D0016A
Top View Top View
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 1998–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
DS1691A, DS3691
SNLS357E –JULY 1998–REVISED APRIL 2013
www.ti.com
Absolute Maximum Ratings(1)(2)
Supply Voltage VCC 7V
VEE −7V
Maximum Power Dissipation at 25°C SOIC Package(3) 1051 mW
Input Voltage 15V
Output Voltage (Power OFF) ±15V
Storage Temperature −65°C to + 150°C
Lead Temperature (Soldering, 4 seconds) 260°C
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be verified. They are not meant to imply
that the devices should be operated at these limits. The tables of “Electrical Characteristics” provide conditions for actual device
operation.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) Derate SOIC package 8.41 mW/°C above 25°C.
Operating Conditions Min Max Units
Supply Voltage VCC 4.75 5.25 V
VEE −4.75 −5.25 V
Temperature, TA0 +70 °C
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SNLS357E –JULY 1998–REVISED APRIL 2013
DC Electrical Characteristics(1)(2)(3)(4)
Parameter Test Conditions Min Typ Max Units
RS-422 CONNECTION, VEE CONNECTION TO GROUND, MODE SELECT ≤0.8V
VIH High Level Input Voltage 2 V
VIL Low Level Input Voltage 0.8 V
IIH High Level Input Current VIN = 2.4V 1 40 μA
VIN ≤15V 10 100 μA
IIL Low Level Input Current VIN = 0.4V −30 −200 μA
VIInput Clamp Voltage I IN =−12 mA −1.5 V
VODifferential Output Voltage VIN = 2V 3.6 6.0 V
RL=∞
VOVA,B VIN = 0.8V −3.6 −6.0 V
VTDifferential Output Voltage RL= 100ΩVIN = 2V 2 2.4 V
VTVA,B VCC ≥4.75V VIN = 0.8V −2−2.4 V
VOS, VOS Common-Mode Offset Voltage RL= 100Ω2.5 3 V
|VT|−| VT| Difference in Differential Output Voltage RL= 100Ω0.05 0.4 V
|VOS|−| VOS | Difference in Common-Mode Offset Voltage RL= 100Ω0.05 0.4 V
VSS |VT−VT| R L= 100Ω, VCC ≥4.75V 4.0 4.8 V
VCMR Output Voltage Common-Mode Range VDISABLE = 2.4V ±10 V
IXA Output Leakage Current VCC = 0V VCMR = 10V 100 μA
IXB Power OFF VCMR =−10V −100 μA
IOX TRI-STATE Output Current VCC = Max VCMR ≤10V 100 μA
VEE = 0V and −5V VCMR ≥ −10V −100 μA
ISA Output Short Circuit Current VIN = 0.4V VOA = 6V 80 150 mA
VOB = 0V −80 −150 mA
ISB Output Short Circuit Current VIN = 2.4V VOA = 0V −80 −150 mA
VOB = 6V 80 150 mA
ICC Supply Current 18 30 mA
(1) Unless otherwise specified, min/max limits apply across the −55°C to +125°C temperature range for the DS1691A and across the 0°C to
+70°C range for the DS3691. All typicals are given for V CC = 5V and TA= 25°C. VCC and VEE as listed in operating conditions.
(2) All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless
otherwise specified.
(3) Only one output at a time should be shorted.
(4) Symbols and definitions correspond to EIA RS-422 and/or RS-423 where applicable.
AC Electrical Characteristics(1)
TA= 25°C Parameter Test Conditions Min Typ Max Units
RS-422 CONNECTION, VCC = 5V, MODE SELECT = 0.8V
trOutput Rise Time RL= 100Ω, CL= 500 pF Figure 3 120 200 ns
tfOutput Fall Time RL= 100Ω, CL= 500 pF Figure 3 120 200 ns
tPDH Output Propagation Delay RL= 100Ω, CL= 500 pF Figure 3 120 200 ns
tPDL Output Propagation Delay RL= 100Ω, CL= 500 pF Figure 3 120 200 ns
tPZL TRI-STATE Delay RL= 450Ω, CL= 500 pF, CC= 0 pF Figure 6 250 350 ns
tPZH TRI-STATE Delay RL= 450Ω, CL= 500 pF, CC= 0 pF Figure 6 180 300 ns
tPLZ TRI-STATE Delay RL= 450Ω, CL= 500 pF, CC= 0 pF Figure 6 180 300 ns
tPHZ TRI-STATE Delay RL= 450Ω, CL= 500 pF, CC= 0 pF Figure 6 250 350 ns
(1) Symbols and definitions correspond to EIA RS-422 and/or RS-423 where applicable.
Copyright © 1998–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
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SNLS357E –JULY 1998–REVISED APRIL 2013
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DC Electrical Characteristics(1)(2)(3)(4)
Parameter Test Conditions Min Typ Max Units
RS-423 CONNECTION, |VCC| = |V EE|, MODE SELECT ≥2V
VIH High Level Input Voltage 2 V
VIL Low Level Input Voltage 0.8 V
IIH High Level Input Current VIN = 2.4V 1 40 μA
VIN ≤15V 10 100 μA
IIL Low Level Input Current VIN = 0.4V −30 −200 μA
VIInput Clamp Voltage IIN =−12 mA −1.5 V
VOOutput Voltage RL=∞, See(5) VIN = 2V 4.0 4.4 6.0 V
VOVCC ≥4.75V VIN = 0.4V −4.0 −4.4 −6.0 V
VTOutput Voltage RL= 450ΩVIN = 2.4V 3.6 4.1 V
VTVCC ≥4.75V VIN = 0.4V −3.6 −4.1 V
|VT|−| VT| Output Unbalance |V CC| = |VEE| = 4.75V, R L= 450Ω0.02 0.4 V
IX+Output Leakage Power OFF VCC = V EE = 0V VO= 6V 2 100 μA
IX−Output Leakage Power OFF VCC = V EE = 0V VO=−6V −2−100 μA
IS+Output Short Circuit Current VO= 0V VIN = 2.4V −80 −150 mA
IS−Output Short Circuit Current VO= 0V VIN = 0.4V 80 150 mA
ISLEW Slew Control Current ±140 μA
ICC Positive Supply Current V IN = 0.4V, RL=∞18 30 mA
IEE Negative Supply Current V IN = 0.4V, RL=∞ −10 −22 mA
(1) Unless otherwise specified, min/max limits apply across the −55°C to +125°C temperature range for the DS1691A and across the 0°C to
+70°C range for the DS3691. All typicals are given for V CC = 5V and TA= 25°C. VCC and VEE as listed in operating conditions.
(2) All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless
otherwise specified.
(3) Only one output at a time should be shorted.
(4) Symbols and definitions correspond to EIA RS-422 and/or RS-423 where applicable.
(5) At −55°C, the output voltage is +3.9V minimum and −3.9V minimum.
AC Electrical Characteristics(1)
TA= 25°C Parameter Test Conditions Min Typ Max Units
RS-423 CONNECTION, VCC = 5V, VEE −5V, MODE SELECT = 2.4V
trRise Time RL= 450Ω, CL= 500 pF, CC= 0 Figure 4 120 300 ns
tfFall Time RL= 450Ω, CL= 500 pF, CC= 0 Figure 4 120 300 ns
trRise Time RL= 450Ω, CL= 500 pF CC= 50 pF Figure 5 3.0 μs
tfFall Time RL= 450Ω, CL= 500 pF CC= 50 pF Figure 5 3.0 μs
trc Rise Time Coefficient RL= 450Ω, CL= 500 pF, CC= 50 pF Figure 5 0.06 μs/pF
tPDH Output Propagation Delay RL= 450Ω, CL= 500 pF, CC= 0 Figure 4 180 300 ns
tPDL Output Propagation Delay RL= 450Ω, CL= 500 pF, CC= 0 Figure 4 180 300 ns
(1) Symbols and definitions correspond to EIA RS-422 and/or RS-423 where applicable.
4Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS1691A DS3691
DS1691A, DS3691
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SNLS357E –JULY 1998–REVISED APRIL 2013
Truth Table
Inputs Outputs
Operation Mode A (D) B (C) A (D) B (C)
RS-422 0 0 0 0 1
0 0 1 TRI-STATE TRI-STATE
0 1 0 1 0
0 1 1 TRI-STATE TRI-STATE
RS-423 1 0 0 0 0
1 0 1 0 1
1 1 0 1 0
1 1 1 1 1
TYPICAL APPLICATION INFORMATION
Figure 8. Fully Loaded RS-422 Interface
Figure 9. RS-422 Point to Point Application
Figure 10. Fully Loaded RS-423 Interface
Copyright © 1998–2013, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: DS1691A DS3691
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SNLS357E –JULY 1998–REVISED APRIL 2013
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*Note: Controlled edge allows longer stub lengths. Multiple Drivers are NOT allowed.
Figure 11. Differential Application with Rise Time Control
Figure 12. Dual RS-423 Inverting Driver
Typical Rise Time Control Characteristics
(RS-423 Mode)
Rise Time vs External Capacitor
Figure 13.
8Submit Documentation Feedback Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS1691A DS3691
DS1691A, DS3691
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SNLS357E –JULY 1998–REVISED APRIL 2013
REVISION HISTORY
Changes from Revision D (April 2013) to Revision E Page
• Changed layout of National Data Sheet to TI format ............................................................................................................ 8
Copyright © 1998–2013, Texas Instruments Incorporated Submit Documentation Feedback 9
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PACKAGE OPTION ADDENDUM
www.ti.com 23-Aug-2017
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
DS3691M/NOPB LIFEBUY SOIC D 16 48 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 DS3691M
AM26LS30SC
DS3691MX/NOPB LIFEBUY SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 DS3691M
AM26LS30SC
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 23-Aug-2017
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
DS3691MX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Sep-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
DS3691MX/NOPB SOIC D 16 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Sep-2013
Pack Materials-Page 2
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