RFB1
RFB2
SW L
COUT
VOUT
LM2696
DCATCH
GND
FB
CBOOT
CBOOT
CEXT
EXTVCC
CSS
CAVIN
CIN SS
VIN
PVIN
AVIN
RON
RON
SD
PGOOD
VPGOOD
VSD CSD
LM2696
www.ti.com
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
LM2696 3A, Constant On Time Buck Regulator
Check for Samples: LM2696
1FEATURES DESCRIPTION
The LM2696 is a pulse width modulation (PWM) buck
2• Input Voltage Range of 4.5V–24V regulator capable of delivering up to 3A into a load.
• Constant On-Time The control loop utilizes a constant on-time control
• No Compensation Needed scheme with input voltage feed forward. This provides
a topology that has excellent transient response
• Maximum Load Current of 3A without the need for compensation. The input voltage
• Switching Frequency of 100 kHz–500 kHz feed forward ensures that a constant switching
• Constant Frequency Across Input Range frequency is maintained across the entire VIN range.
• TTL Compatible Shutdown Thresholds The LM2696 is capable of switching frequencies in
• Low Standby Current of 12 µA the range of 100 kHz to 500 kHz. Combined with an
integrated 130 mΩhigh side NMOS switch the
• 130 mΩInternal MOSFET Switch LM2696 can utilize small sized external components
and provide high efficiency. An internal soft-start and
APPLICATIONS power-good flag are also provided to allow for simple
• High Efficiency Step-Down Switching sequencing between multiple regulators.
Regulators The LM2696 is available with an adjustable output in
• LCD Monitors an exposed pad HTSSOP-16 package.
• Set-Top Boxes
Typical Application Circuit
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2005–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
98 GNDN/C
107 SSFB
116 PGOOD
EXTVCC
125 RONAVIN
134 SDCBOOT
143 PVINSW
152
SW
161
SW PVIN
PVIN
LM2696
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
www.ti.com
Connection Diagram
Top View
Figure 1. HTSSOP-16 Package
See Package Number PWP0016A
PIN DESCRIPTIONS
Pin # Name Function
1, 2, 3 SW Switching node
4 CBOOT Bootstrap capacitor input
5 AVIN Analog voltage input
6 EXTVCC Output of internal regulator for decoupling
7 FB Feedback signal from output
8 N/C No connect
9 GND Ground
10 SS Soft-start pin
11 PGOOD Power-good flag, open drain output
12 RON Sets the switch on-time dependent on current
13 SD Shutdown pin
14, 15, 16 PVIN Power voltage input
- Exposed Pad Must be connected to ground
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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LM2696
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SNVS375B –OCTOBER 2005–REVISED APRIL 2013
ABSOLUTE MAXIMUM RATINGS(1)(2)(3)
Voltages from the indicated pins to GND
AVIN −0.3V to +26V
PVIN −0.3V to (AVIN+0.3V)
CBOOT −0.3V to +33V
CBOOT to SW −0.3V to +7V
FB, SD, SS, PGOOD −0.3V to +7V
Storage Temperature Range −65°C to +150°C
Junction Temperature +150°C
Lead Temperature (Soldering, 10 sec.) 260°C
Minimum ESD Rating 1.5 kV
(1) Absolute Maximum Ratings indicate limits beyond which damage may occur to the device. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications, see Electrical
Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(3) Without PCB copper enhancements. The maximum power dissipation must be derated at elevated temperatures and is limited by TJMAX
(maximum junction temperature), θJ-A (junction to ambient thermal resistance) and TA(ambient temperature). The maximum power
dissipation at any temperature is: PDissMAX = (TJMAX - TA) /θJ-A up to the value listed in the Absolute Maximum Ratings. θJ-A for HTSSOP-
16 package is 38.1°C/W, TJMAX = 125°C.
OPERATING RANGE
Junction Temperature −40°C to +125°C
AVIN to GND 4.5V to 24V
PVIN 4.5V to 24V
ELECTRICAL CHARACTERISTICS
Specifications with standard typeface are for TJ= 25°C, and those in boldface type apply over the full Operating
Temperature Range (TJ=−40°C to +125°C). Minimum and Maximum limits are specified through test, design or statistical
correlation. Typical values represent the most likely parametric norm at TJ= 25°C and are provided for reference purposes
only. Unless otherwise specified VIN = 12V.
Symbol Parameter Condition Min Typ Max Units
VFB Feedback Pin Voltage VIN = 4.5V to 24V 1.225 1.254 1.282 V
ISW = 0A to 3A
ICL Switch Current Limit VCBOOT = VSW + 5V 3.6 4.9 6.4 A
RDS_ON Switch On Resistance ISW = 3A 0.13 0.22 Ω
IQOperating Quiescent Current VFB = 1.5V 1.3 2mA
VUVLO AVIN Under Voltage Lockout Rising VIN 3.9 4.125 4.3 V
VUVLO HYS AVIN Under Voltage Lockout Hysteresis 60 120 mV
ISD Shutdown Quiescent Current VSD = 0V 12 25 µA
kON Switch On-Time Constant ION = 50 µA to 100 µA 50 66 82 µA µs
VD ON RON Voltage 0.35 0.65 0.95 V
TOFF_MIN Minimum Off Time FB = 1.24V 165 250 ns
FB = 0V 12 30 µs
TON MIN Minimum On-time 400 ns
VEXTV EXTVCC Voltage 3.30 3.65 4.00 V
ΔVEXTV EXTVCC Load Regulation IEXTV = 0 µA to 50 µA 0.03 0.5 %
VPWRGD PGOOD Threshold (PGOOD Transition With respect to VFB 91.5 93.5 95.5 %
from Low to High)
VPG_HYS PGOOD Hysteresis 1 2.1 %
IOL PGOOD Low Sink Current VPGOOD = 0.4V 0.5 2 mA
IOH PGOOD High Leakage Current 50 nA
IFB Feedback Pin Bias Current VFB = 1.2V 0 nA
ISS_SOURCE Soft-Start Pin Source Current VSS = 0V 0.7 11.4 µA
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LM2696
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Specifications with standard typeface are for TJ= 25°C, and those in boldface type apply over the full Operating
Temperature Range (TJ=−40°C to +125°C). Minimum and Maximum limits are specified through test, design or statistical
correlation. Typical values represent the most likely parametric norm at TJ= 25°C and are provided for reference purposes
only. Unless otherwise specified VIN = 12V.
Symbol Parameter Condition Min Typ Max Units
ISS SINK Soft-Start Pin Sink Current VSS = 1.2V 15 mA
VSD = 0V
ISD Shutdown Pull-Up Current VSD = 0V 1 3µA
VIH SD Pin Minimum High Input Level 1.8 V
VIL SD Pin Maximum Low Input Level 0.6 V
θJ-A Thermal Resistance 35.1 °C/W
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Product Folder Links: LM2696
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (oC)
EXT VCC (V)
3.635
3.64
3.645
3.65
3.655
3.66
3.665
3.67
-20 20 60 100 140
TEMPERATURE (oC)
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
VIL AND VIH (V)
-60
VIH (V)
0 40 80 120-40
VIL (V)
0
2
4
6
8
10
12
14
16
18
20
4.5 7.5 10.5 13.5 16.5 24
VIN (V)
19.5 22.5
IQ (PA)
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (oC)
0
2
4
6
8
10
12
14
16
IQ (SHUTDOWN) (PA)
4.5 7.5 10.5 13.5 16.5 24
VIN (V)
19.5 22.5
1.05
1.1
1.15
1.2
1.25
1.3
1.35
1.4
1.45
1.5
1
IQ (PA)
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (oC)
IQ (mA)
1.12
1.14
1.16
1.18
1.2
1.22
1.24
1.26
1.28
1.30
1.32
LM2696
www.ti.com
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS
IQvs Temp IQvs VIN
Figure 2. Figure 3.
IQin Shutdown vs Temp IQvs VIN in Shutdown
Figure 4. Figure 5.
Shutdown Thresholds vs Temp EXTVCC vs Temp
Figure 6. Figure 7.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
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0 50 100 150 200 250 300
ION (PA)
0
0.5
1
1.5
2
2.5
3
TON (Ps)
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (oC)
168
170
172
174
176
178
180
TOFF (ns)
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)
TON . ION (Ps . PA)
64.7
64.9
65.1
65.3
65.5
65.7
65.9
66.1
66.3
66.5
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (oC)
1.249
1.25
1.251
1.252
1.253
1.254
1.255
1.256
1.257
1.248
VFB (V)
4.5 7.5 10.5 13.5 16.5 24
VIN (V)
19.5 22.5
EXTVCC (V)
3.644
3.646
3.648
3.650
3.652
3.654
3.656
3.658
3.660
0 10 20 30 40 50
3.62
3.63
3.64
3.65
3.66
EXT VCC (V)
EXT VCC (PA)
LM2696
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
EXTVCC vs VIN EXTVCC vs Load Current
Figure 8. Figure 9.
Feedback Threshold Voltage vs Temp kON vs Temp
Figure 10. Figure 11.
Switch ON Time vs RON Pin Current Min Off-Time vs Temp
Figure 12. Figure 13.
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-40 -20 0 20 40 60 80 100 120
TEMPERATURE (oC)
VON (V)
0
0.2
0.4
0.6
0.8
1
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (oC)
CURRENT LIMIT (A)
4
4.2
4.4
4.6
4.8
5
5.2
5.4
100 200 300 400 500
0.0
0.2
0.4
0.6
0.8
1.0
DUTY CYCLE
FREQUENCY (kHz)
Min Duty Cycle
Max Duty Cycle
-40 -20 0 20 40 60 80 100 120
TEMPERATURE (oC)
0
0.05
0.1
0.15
0.2
0.25
RDS_ON (:)
LM2696
www.ti.com
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Max and Min Duty-Cycle vs Freq
(Min TON = 400 ns, Min TOFF = 200 ns) FET Resistance vs Temp
Figure 14. Figure 15.
RON Pin Voltage vs Temp Current Limit vs Temp
Figure 16. Figure 17.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: LM2696
1.25V
Q
Q
S
R
FB
AVIN
SW
GND
6V INTERNAL
SUB
REGULATOR
ON TIMER
DRIVER
CBOOT
LEVEL
SHIFT
RON THERMAL
SHUTDOWN
4.8A
CURRENT LIMIT
OFF TIMER
Q
START
COMPLETE
Ron
LM2696
UVLO
FB
REGULATION
COMPARATOR
SD
Q
OFF TIMER
EXTVCC
SD
PGOOD
94% x Vbg
UNDER-VOLTAGE
COMPARATOR
Shutdown
PVIN
SS 1 PA
1.25V
3.65V
INTERNAL LDO
SD
BUCK
SWITCH
CURRENT
SENSE
1 PA
LM2696
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
www.ti.com
BLOCK DIAGRAM
APPLICATION INFORMATION
CONSTANT ON-TIME CONTROL OVERVIEW
The LM2696 buck DC-DC regulator is based on the constant on-time control scheme. This topology relies on a
fixed switch on-time to regulate the output. The on-time can be set manually by adjusting the size of an external
resistor (RON). The LM2696 automatically adjusts the on-time inversely with the input voltage (AVIN) to maintain a
constant frequency. In continuous conduction mode (CCM) the frequency depends only on duty cycle and on-
time. This is in contrast to hysteretic regulators where the switching frequency is determined by the output
inductor and capacitor. In discontinuous conduction mode (DCM), experienced at light loads, the frequency will
vary according to the load. This leads to high efficiency and excellent transient response.
The on-time will remain constant for a given VIN unless an over-current or over-voltage event is encountered. If
these conditions are encountered the FET will turn off for a minimum pre-determined time period. This minimum
TOFF (250 ns) is internally set and cannot be adjusted. After the TOFF period has expired the FET will remain off
until the comparator trip-point has been reached. Upon passing this trip-point the FET will turn back on, and the
process will repeat.
Switchers that regulate using an internal comparator to sense the output voltage for switching decisions, such as
hysteretic or constant on-time, require a minimum ESR. A minimum ESR is required so that the control signal will
be dominated by ripple that is in phase with the switchpin. Using a control signal dominated by voltage ripple that
is in phase with the switchpin eliminates the need for compensation, thus reducing parts count and simplifying
design. Alternatively, an RC feed forward scheme may be used to eliminate the need for a minimum ESR.
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D = VOUT + VD
VIN + VD - VSW
D = VOUT
VIN
LM2696
www.ti.com
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
INTERNAL OPERATION UNDER-VOLTAGE COMPARATOR
An internal comparator is used to monitor the feedback pin for sensing under-voltage output events. If the output
voltage drops below the UVP threshold the power-good flag will fall.
ON-TIME GENERATOR SHUTDOWN
The on-time for the LM2696 is inversely proportional to the input voltage. This scheme of on-time control
maintains a constant frequency over the input voltage range. The on-time can be adjusted by using an external
resistor connected between the PVIN and RON pins.
CURRENT LIMIT
The LM2696 contains an intelligent current limit off-timer. If the peak current in the internal FET exceeds 4.9A the
present on-time is terminated; this is a cycle-by-cycle current limit. Following the termination of the on-time, a
non-resetable extended off timer is initiated. The length of the off-time is proportional to the feedback voltage.
When FB = 0V the off-time is preset to 20 µs. This condition is often a result of in short circuit operation when a
maximum amount of off-time is required. This amount of time ensures safe short circuit operation up to the
maximum input voltage of 24V.
In cases of overload (not complete short circuit, FB > 0V) the current limit off-time is reduced. Reduction of the
off-time during smaller overloads reduces the amount of fold back. This also reduces the initial startup time.
N-CHANNEL HIGH SIDE SWITCH AND DRIVER
The LM2696 utilizes an integrated N-Channel high side switch and associated floating high voltage gate driver.
This gate driver circuit works in conjunction with an external bootstrap capacitor and an internal diode. The
minimum off-time (165 ns) is set to ensure that the bootstrap capacitor has sufficient time to charge.
THERMAL SHUTDOWN
An internal thermal sensor is incorporated to monitor the die temperature. If the die temp exceeds 165ºC then the
sensor will trip causing the part to stop switching. Soft-start will restart after the temperature falls below 155ºC.
COMPONENT SELECTION
As with any DC-DC converter, numerous trade-offs are present that allow the designer to optimize a design for
efficiency, size and performance. These trade-offs are taken into consideration throughout this section.
The first calculation for any buck converter is duty cycle. Ignoring voltage drops associated with parasitic
resistances and non-ideal components, the duty cycle may be expressed as:
(1)
A duty cycle relationship that considers the voltage drop across the internal FET and voltage drop across the
external catch diode may be expressed as:
Where
• VDis the forward voltage of the external catch diode (DCATCH)
• VSW is the voltage drop across the internal FET. (2)
FREQUENCY SELECTION
Switching frequency affects the selection of the output inductor, capacitor, and overall efficiency. The trade-offs
in frequency selection may be summarized as; higher switching frequencies permit use of smaller inductors
possibly saving board space at the trade-off of lower efficiency. It is recommended that a nominal frequency of
300 kHz should be used in the initial stages of design and iterated if necessary.
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L = (VIN - VOUT) D
0.3 fSW IOUT
'IL = (VIN - VOUT) D
L fSW
fSW = D
TON 103 kHz
RON = (VIN - VD) ‡' 106
kON ‡ISW k
TON = kON RON
VIN - VD10-3 Ps
LM2696
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
www.ti.com
The switching frequency of the LM2696 is set by the resistor connected to the RON pin. This resistor controls the
current flowing into the RON pin and is directly related to the on-time pulse. Connecting a resistor from this pin to
PVIN allows the switching frequency to remain constant as the input voltage changes. In normal operation this
pin is approximately 0.65V above GND. In shutdown, this pin becomes a high impedance node to prevent current
flow.
The ON time may be expressed as:
where
• VIN is the voltage at the high side of the RON resistor (typically PVIN)
• VDis the diode voltage present at the RON pin (0.65V typical)
• RON is in kΩ
• kON is a constant value set internally (66 µA•µs nominal). (3)
This equation can be re-arranged such that RON is a function of switching frequency:
where
• fSW is in kHz. (4)
In CCM the frequency may be determined using the relationship:
(5)
(TON is in µs)
Which is typically used to set the switching frequency.
Under no condition should a bypass capacitor be connected to the RON pin. Doing so couples any AC
perturbations into the pin and prevents proper operation.
INDUCTOR SELECTION
Selecting an inductor is a process that may require several iterations. The reason for this is that the size of the
inductor influences the amount of ripple present at the output that is critical to the stability of an adaptive on-time
circuit. Typically, an inductor is selected such that the maximum peak-to-peak ripple current is equal to 30% of
the maximum load current. The inductor current ripple (ΔIL) may be expressed as:
(6)
Therefore, L can be initially set to the following by applying the 30% guideline:
(7)
The other features of the inductor that should be taken into account are saturation current and core material. A
shielded inductor or low profile unshielded inductor is recommended to reduce EMI.
OUTPUT CAPACITOR
The output capacitor size and ESR have a direct affect on the stability of the loop. This is because the adaptive
on-time control scheme works by sensing the output voltage ripple and switching appropriately. The output
voltage ripple on a buck converter can be approximated by assuming that the AC inductor ripple current flows
entirely into the output capacitor and the ESR of the capacitor creates the voltage ripple. This is expressed as:
ΔVOUT≈ ΔIL• RESR (8)
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Product Folder Links: LM2696
Cff_MAX = (VIN_MIN - VFB) x TON_MIN
0.03V x Rff pF
Rff RFB1
RFB2
Cff
SW
FB
L
COUT
VOUT
H = VOUT
VFB =VOUT
1.25V
LM2696
www.ti.com
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
To ensure stability, two constraints need to be met. These constraints are the voltage ripple at the feedback pin
must be greater than some minimum value and the voltage ripple must be in phase with the switch pin.
The ripple voltage necessary at the feedback pin may be estimated using the following relationship:
ΔVFB >−0.057 • fSW + 35
where
• fSW is in kHz
•ΔVFB is in mV. (9)
This minimum ripple voltage is necessary in order for the comparator to initiate switching. The voltage ripple at
the feedback pin must be in-phase with the switch. Because the ripple due to the capacitor charging and
capacitor ESR are out of phase, the ripple due to capacitor ESR must dominate.
The ripple at the output may be calculated by multiplying the feedback ripple voltage by the gain seen through
the feedback resistors. This gain H may be expressed as:
(10)
To simplify design and eliminate the need for high ESR output capacitors, an RC network may be used to feed
forward a signal from the switchpin to the feedback (FB) pin. See the ‘RIPPLE FEED FORWARD’ section for
more details.
Typically, the best performance is obtained using POSCAPs, SP CAPs, tantalum, Niobium Oxide, or similar
chemistry type capacitors. Low ESR ceramic capacitors may be used in conjunction with the RC feed forward
scheme; however, the feed forward voltage at the feedback pin must be greater than 30 mV.
RIPPLE FEED FORWARD
An RC network may be used to eliminate the need for high ESR capacitors. Such a network is connected as
shown in Figure 18.
Figure 18. RC Feed Forward Network
The value of Rff should be large in order to prevent any potential offset in VOUT. Typically the value of Rff is on the
order of 1 MΩand the value of RFB1 should be less than 10 kΩ. The large difference in resistor values minimizes
output voltage offset errors in DCM. The value of the capacitor may be selected using the following relationship:
where
• on-time (TON_MIN) is in µs
• resistance (Rff) is in MΩ. (11)
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ICIN_RMS = IOUT D(1 - D)
ICIN_RMS = IOUT
'IL2
12 IOUT2
1 - D + ¸
¸
¹
·
¨
¨
©
§
D
1
2'IL RESR
VOUT = VOUT_AVG - 'VOUT = VOUT_AVG - 1
2
VOUT_AVG
Time
VREF
VOUT
'VOUT
RFB1 = RFB2 VOUT
VFB - 1¸
¸
¹
·
¨
¨
©
§
LM2696
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
www.ti.com
FEEDBACK RESISTORS
The feedback resistors are used to scale the output voltage to the internal reference value such that the loop can
be regulated. The feedback resistors should not be made arbitrarily large as this creates a high impedance node
at the feedback pin that is more susceptible to noise. Typically, RFB2 is on the order of 1 kΩ. To calculate the
value of RFB1, one may use the relationship:
Where
• VFB is the internal reference voltage that can be found in the ELECTRICAL CHARACTERISTICS table (1.254V
typical). (12)
The output voltage value can be set in a precise manner by taking into account the fact that the reference
voltage is regulating the bottom of the output ripple as opposed to the average value. This relationship is shown
in Figure 19.
Figure 19. Average and Ripple Output Voltages
It can be seen that the average output voltage is higher than the gained up reference by exactly half the output
voltage ripple. The output voltage may then be appended according to the voltage ripple. The appended VOUT
term may be expressed using the relationship:
(13)
One should note that for high output voltages (>5V), a load of approximately 15 mA may be required for the
output voltage to reach the desired value.
INPUT CAPACITOR
Because PVIN is the power rail from which the output voltage is derived, the input capacitor is typically selected
according to the load current. In general, package size and ESR determine the current capacity of a capacitor. If
these criteria are met, there should be enough capacitance to prevent impedance interactions with the source. In
general, it is recommended to use a low ESR, high capacitance electrolytic and ceramic capacitor in parallel.
Using two capacitors in parallel ensures adequate capacitance and low ESR over the operating range. The
Sanyo MV-WX series electrolytic capacitors and a ceramic capacitor with X5R or X7R dielectric are an excellent
combination. To calculate the input capacitor RMS, one may use the following relationship:
(14)
that can be approximated by,
(15)
Typical values are 470 µF for the electrolytic capacitor and 0.1 µF for the ceramic capacitor.
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tSS_MIN = COUTVOUT
3A
tSS = 1.25V CSS
ISS
LM2696
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SNVS375B –OCTOBER 2005–REVISED APRIL 2013
AVIN CAPACITOR
AVIN is the analog bias rail of the device. It should be bypassed externally with a small (1 µF) ceramic capacitor
to prevent unwanted noise from entering the device. In a shutdown state the current needed by AVIN will drop to
approximately 12 µA, providing a low power sleep state.
In most cases of operation, AVIN is connected to PVIN; however, it is possible to have split rail operation where
AVIN is at a higher voltage than PVIN. AVIN should never be lower than PVIN. Splitting the rails allows the power
conversion to occur from a lower rail than the AVIN operating range.
SOFT-START CAPACITOR
The SS capacitor is used to slowly ramp the reference from 0V to its final value of 1.25V (during shutdown this
pin will be discharged to 0V). This controlled startup ability eliminates large in-rush currents in an attempt to
charge up the output capacitor. By changing the value of this capacitor, the duration of the startup may be
changed accordingly. The startup time may be calculated using the following relationship:
Where
• ISS is the soft-start pin source current (1 µA typical) that may be found in the ELECTRICAL
CHARACTERISTICS table. (16)
While the CSS capacitor can be sized to meet the startup requirements, there are limitations to its size. If the
capacitor is too small, the soft-start will have little effect as the reference voltage is rising faster than the output
capacitor can be charged causing the part to go into current limit. Therefore a minimum soft-start time should be
taken into account. This can be determined by:
(17)
While COUT and VOUT control the slew rate of the output voltage, the total amount of time the LM2696 takes to
startup is dependent on two other terms. See the “ Startup” section for more information.
EXTVCC CAPACITOR
External VCC is a 3.65V rail generated by an internal sub-regulator that powers the parts internal circuitry. This
rail should be bypassed with a 1 µF ceramic capacitor (X5R or equivalent dielectric). Although EXTVCC is for
internal use, it can be used as an external rail for extremely light loads (<50 µA). If EXTVCC is accidentally
shorted to GND the part is protected by a 5 mA current limit. This rail also has an under-voltage lockout that will
prevent the part from switching if the EXTVCC voltage drops.
SHUTDOWN
The state of the shutdown pin enables the device or places it in a sleep state. This pin has an internal pull-up
and may be left floating or connected to a high logic level. Connecting this pin to GND will shutdown the part.
Shutting down the part will prevent the part from switching and reduce the quiescent current drawn by the part.
This pin must be bypassed with a 1 nF ceramic capacitor (X5R or Y5V) to ensure proper logic thresholds.
CBOOT CAPACITOR
The purpose of an external bootstrap capacitor is to turn the FET on by using the SW node as a pedestal. This
allows the voltage on the CBOOT pin to be greater than VIN. Whenever the catch diode is conducting and the
SW node is at GND, an internal diode will conduct that charges the CBOOT capacitor to approximately 4V.
When the SW node rises, the CBOOT pin will rise to approximately 4V above the SW node. For optimal
performance, a 0.1 µF ceramic capacitor (X5R or equivalent dielectric) should be used.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LM2696
Total Startup Time
TSS
200 Ps
730 Ps
VOUT
ExtVCC
VIN
LM2696
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
www.ti.com
PGOOD RESISTOR
The PGOOD resistor is used to pull the PGOOD pin high whenever a steady state operating range is achieved.
This resistor needs to be sized to prevent excessive current from flowing into the PGOOD pin whenever the open
drain FET is turned on. The recommendation is to use a 10 kΩ–100 kΩresistor. This range of values is a
compromise between rise time and power dissipation.
CATCH DIODE
The catch or freewheeling diode acts as the bottom switch in a non-synchronous buck switcher. Because of this,
the diode has to handle the full output current whenever the FET is not conducting. Therefore, it must be sized
appropriately to handle the current. The average current through the diode can be calculated by the equation:
ID_AVG = IOUT•(1–D) (18)
Care should also be taken to ensure that the reverse voltage rating of the diode is adequate. Whenever the FET
is conducting the voltage across the diode will be approximately equal to VIN. It is recommended to have a
reverse rating that is equal to 120% of VIN to ensure adequate guard banding against any ringing that could
occur on the switch node.
Selection of the catch diode is critical to overall switcher performance. To obtain the optimal performance, a
Schottky diode should be used due to their low forward voltage drop and fast recovery.
BYPASS CAPACITOR
A bypass capacitor must be used on the AVIN line to help decouple any noise that could interfere with the analog
circuitry. Typically, a small (1 µF) ceramic capacitor is placed as close as possible to the AVIN pin.
EXTERNAL OPERATION STARTUP
The total startup time, from the initial VIN rise to the time VOUT reaches its nominal value is determined by three
separate steps. Upon the rise of VIN, the first step to occur is that the EXTVCC voltage has to reach its nominal
output voltage of 3.65V before the internal circuitry is active. This time is dictated by the output capacitance (1
µF) and the current limit of the regulator (5 mA typical), which will always be on the order of 730 µs. Upon
reaching its steady state value, an internal delay of 200 µs will occur to ensure stable operation. Upon
completion the LM2696 will begin switching and the output will rise. The rise time of the output will be governed
by the soft-start capacitor. To highlight these three steps a timing diagram please refer to Figure 20.
Figure 20. Startup Timing Diagram
14 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2696
SW Pin
VOUT
VL
I2
I1
I0
t1t2t3t4t5
Inductor
Current
Nominal
Output
Voltage
LM2696
www.ti.com
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
UNDER- & OVER-VOLTAGE CONDITIONS
The LM2696 has a built in under-voltage comparator that controls PGOOD. Whenever the output voltage drops
below the set threshold, the PGOOD open drain FET will turn on pulling the pin to ground. For an over-voltage
event, there is no separate comparator to control PGOOD. However, the loop responds to prevent this event
from occurring because the error comparator is essentially sensing an OVP event. If the output is above the
feedback threshold then the part will not switch back on; therefore, the worst-case condition is one on-time pulse.
CURRENT LIMIT
The LM2696 utilizes a peak-detect current limit that senses the current through the FET when conducting and
will immediately terminate the on-pulse whenever the peak current exceeds the threshold (4.9A typical). In
addition to terminating the present on-pulse, it enforces a mandatory off-time that is related to the feedback
voltage.
If current limit trips and the feedback voltage is close to its nominal value of 1.25V, the off-time imposed will be
relatively short. This is to prevent the output from dropping or any fold back from occurring if a momentary short
occurred because of a transient or load glitch. If a short circuit were present, the off-time would extend to
approximately 12 µs. This ensures that the inductor current will reach a low value (approximately 0A) before the
next switching cycle occurs. The extended off-time prevents runaway conditions caused by hard shorts and high
side blanking times.
If the part is in an over current condition, the output voltage will begin to drop as shown in Figure 21. If the output
voltage is dropping and the current is below the current limit threshold, (I1), the part will assert a pulse (t2) after a
minimum off-time (t1). This is in an attempt to raise the output voltage.
If the part is in an over current condition and the output voltage is below the regulation value (VL) as shown in
Figure 21, the part will assert a pulse of minimal width (t4) and extend the off-time (t5). In the event that the
voltage is below the regulation value (VL) and the current is below the current limit value, the part will assert two
(or more) pulses separated by some minimal off-time (t1).
Figure 21. Fault Condition Timing
Legend:
t1:Min off-time (165 ns typical)
t2:On-time (set by the user)
t3:Min off-time (165 ns typical)
t4:Blanking time (165 ns typical)
t5:Extended off-time (12 µs typical)
VL:UVP threshold
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LM2696
IAVERAGE
Time (s)
Continuous Conduction Mode (CCM)
Inductor Current
fSW = 2 L VOUT IOUT
TON2 VIN (VIN - VOUT)
IBOUNDARY = (VIN - VOUT) D
2 L fSW
2.5 3 3.5 4 4.5 5 5.5
LOAD CURRENT (A)
0.2
0.4
0.6
0.8
1.0
1.2
1.4
NORMALIZED OUTPUT VOLTAGE
LM2696
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
www.ti.com
The last benefit of this scheme is when the short circuit is removed, and full load is re-applied, the part will
automatically recover into the load. The variation in the off-time removes the constraints of other frequency fold
back systems where the load would typically have to be reduced.
Figure 22. Normalized Output Voltage
Versus Load Current
MODES OF OPERATION
Since the LM2696 utilizes a catch diode, whenever the load current is reduced to a point where the inductor
ripple is greater than two times the load current, the part will enter discontinuous operation. This is because the
diode does not permit the inductor current to reverse direction. The point at which this occurs is the critical
conduction boundary and can be calculated by the following equation:
(19)
One advantage of the adaptive on-time control scheme is that during discontinuous conduction mode the
frequency will gradually decrease as the load current decreases. In DCM the switching frequency may be
determined using the relationship:
(20)
It can be seen that there will always be some minimum switching frequency. The minimum switching frequency is
determined by the parameters above and the minimum load presented by the feedback resistors. If there is some
minimum frequency of operation the feedback resistors may be sized accordingly.
The adaptive on-time control scheme is effectively a pulse-skipping mode, but since it is not tied directly to an
internal clock, its pulse will only occur when needed. This is in contrast to schemes that synchronize to a
reference clock frequency. The constant on-time pulse-skipping/DCM mode minimizes output voltage ripple and
maximizes efficiency.
Several diagrams are shown in Figure 23 illustrating continuous conduction mode (CCM), discontinuous
conduction mode (DCM), and the boundary condition.
16 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2696
VAVERAGE
Time (s)
VH - VL = VRIPPLE
Output Voltage (V)
VH
VLVREGULATION
tON
tP
RFB1
RFB2
CD
SW
FB
L
COUT
VOUT
D
Time (s)
Discontinuous Conduction Mode (DCM)
Switchnode Voltage
VIN
VOUT
IPEAK
Time (s)
Discontinuous Conduction Mode (DCM)
Inductor Current
IAVERAGE
Time (s)
DCM-CCM Boundary
Inductor Current
LM2696
www.ti.com
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
Figure 23. Modes of Operation
It can be seen that in DCM, whenever the inductor runs dry the SW node will become high impedance. Ringing
will occur as a result of the LC tank circuit formed by the inductor and the parasitic capacitance at the SW node.
Figure 24. Parasitic Tank Circuit at the Switchpin
LINE REGULATION
The LM2696 regulates to the lowest point of the output voltage (VLin Figure 25 ). This is to say that the output
voltage may be represented by a waveform that is some average voltage with ripple. The LM2696 will regulate to
the trough of the ripple.
Figure 25. Average Output Voltage and Regulation Point
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LM2696
Efficiency = Power_Out
Power_Out + Total_Power_Loss
1
2'IL RESR
VOUT = VL = VAVERAGE - VRIPPLE = VAVERAGE - 1
2
LM2696
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
www.ti.com
The output voltage is given by the following relationship:
(21)
as discussed in the FEEDBACK RESISTORS section of this document.
TRANSIENT RESPONSE
Constant on-time architectures have inherently excellent transient line and load response. This is because the
control loop is extremely fast. Any change in the line or load conditions will result in a nearly instantaneous
response in the PWM off time.
If one considers the switcher response to be nearly cycle-by-cycle, and amount of energy contained in a single
PWM pulse, there will be very little change in the output for a given change in the line or load.
EFFICIENCY
The constant on-time architecture features high efficiency even at light loads. The ability to achieve high
efficiency at light loads is due to the fact that the off-time will become necessarily long at light loads. Having
extended the off-time, there is little mechanism for loss during this interval.
The efficiency is easily estimated using the following relationships:
Power loss due to FET:
PFET = PC+ PGC + PSW
Where
• PC= D • (IOUT2• RDS_ON)
• PGC = AVIN + VGS • QGS • fSW
• PSW = 0.5 • VIN · IOUT • (tr+ tf) • fSW (22)
Typical values are:
RDS_ON = 130 mΩ
VGS = 4V
QGS = 13.3 nC
tr= 3.8 ns
tf= 4.5 ns Power loss due to catch diode:
PD= (1-D) • (IOUT • Vf) (23)
Power loss due to DCR and ESR:
PDCR = IOUT2• RDCR (24)
PESR_OUTPUT = IRIPPLE2/√12 • RESR_OUTPUT (25)
PESR_INPUT = IOUT2(D(1-D)) • RESR_INPUT (26)
Power loss due to Controller:
PCONT = VIN • IQ(27)
IQis typically 1.3 mA (28)
The efficiency may be calculated as shown below:
Total power loss = PFET + PD+ PDCR + PESR_OUTPUT + PESR_INPUT + PCONT (29)
Power Out = IOUT • VOUT (30)
(31)
18 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2696
RFB1
RFB2
SW L
COUT
VOUT
LM2696
DCATCH
GND
FB
CBOOT
CBOOT
CEXT
ExtVCC
CSS
CIN
SS
PVIN
AVIN
RON
RON
SD
PGOOD
VIN
LM2696
www.ti.com
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
PRE-BIAS LOAD STARTUP
Should the LM2696 start into a pre-biased load the output will not be pulled low. This is because the part is
asynchronous and cannot sink current. The part will respond to a pre-biased load by simply enabling PWM high
or extending the off-time until regulation is achieved. This is to say that if the output voltage is greater than the
regulation voltage the off-time will extend until the voltage discharges through the feedback resistors. If the load
voltage is greater than the regulation voltage, a series of pulses will charge the output capacitor to its regulation
voltage.
THERMAL CONSIDERATIONS
The thermal characteristics of the LM2696 are specified using the parameter θJA, which relates the junction
temperature to the ambient temperature. While the value of θJA is specific to a given set of test parameters
(including board thickness, number of layers, orientation, etc), it provides the user with a common point of
reference.
To obtain an estimate of a devices junction temperature, one may use the following relationship:
TJ= PIN (1-Efficiency) x θJA + TA
Where
• TJis the junction temperature in ºC
• PIN is the input power in Watts (PIN = VIN·IIN)
•θJA is the thermal coefficient of the LM2696
• TAis the ambient temperature in ºC (32)
LAYOUT CONSIDERATIONS
The LM2696 regulation and under-voltage comparators are very fast and will respond to short duration noise
pulses. Layout considerations are therefore critical for optimum performance. The components at pins 5, 6, 7, 12
and 13 should be as physically close as possible to the IC, thereby minimizing noise pickup in the PC traces. If
the internal dissipation of the LM2696 produces excessive junction temperatures during normal operation, good
use of the PC board’s ground plane can help considerably to dissipate heat. The exposed pad on the bottom of
the HTSSOP-16 package can be soldered to a ground plane on the PC board, and that plane should extend out
from beneath the IC to help dissipate the heat. Use of several vias beneath the part is also an effective method
of conducting heat. Additionally, the use of wide PC board traces, where possible, can also help conduct heat
away from the IC. Judicious positioning of the PC board within the end product, along with use of any available
air flow (forced or natural convection) can help reduce the junction temperatures. Traces in the power plane
(Figure 26)should be short and wide to minimize the trace impedance; they should also occupy the smallest
area that is reasonable to minimize EMI. Sizing the power plane traces is a tradeoff between current capacity,
inductance, and thermal dissipation. For more information on layout considerations, please refer to TI Application
Note AN-1229.
Figure 26. Bold Traces Are In The Power Plane
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: LM2696
CIN
AVIN
CBOOT
SW
FB
PGOOD
RON
LM2696
VIN VOUT
RFB1
RFB2
GND
COUT
RON
PVIN
SD
CSS SS
EXTVCC CEXT
CBOOT
DCATCH
L
CAVIN
CSD
CBY
VPGOOD
VSD
LM2696
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
www.ti.com
Figure 27. 5V-to-2.5V Voltage Applications Circuit
Table 1. Bill of Materials(1)
Designator Function Description Vendor Part Number
CIN Input Cap 470 µF Sanyo 10MV470WX
CBY Bypass Cap 0.1 µF Vishay VJ0805Y104KXAM
CSS Soft-Start Cap 0.01 µF Vishay VJ080JY103KXX
CEXT EXTVCC 1 µF Vishay VJ0805Y105JXACW1BC
CBOOT Boot 0.1 µF Vishay VJ0805Y104KXAM
CAVIN Analog VIN 1 µF Vishay VJ0805Y105JXACW1BC
COUT Output Cap 47 µF AVX TPSW476M010R0150
CSD Shutdown Cap 1 nF Vishay VJ0805Y102KXXA
RFB1 High Side FB Res 1 kΩVishay CRCW08051001F
RFB2 Low Side RB Res 1 kΩVishay CRCW08051001F
RON On Time Res 143 kΩVishay CRCW08051433F
DCATCH Boot Diode 40V @ 3A Diode Central Semi CMSH3-40M-NST
L Output Inductor 6.8 uH, 4.9A ISAT Coilcraft MSS1260-682MX
(1) (Figure 27: Medium Voltage Board, 5V-to-2.5V conversion, fsw = 300 kHz)
20 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2696
CIN
AVIN
CBOOT
SW
FB
PGOOD
RON
LM2696
VIN VOUT
RFB1
RFB2
GND
COUT
RON
PVIN
SD
SS
EXTVCC CEXT
CBOOT
DCATCH
L
CSD
CBY
VPGOOD
VSD
Rff
Cff
CSS
CAVIN
LM2696
www.ti.com
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
Figure 28. 12V-to 3.3V Voltage Applications Circuit
Table 2. Bill of Materials(1)
Designator Function Description Vendor Part Number
CIN Input Cap 560 µF Sanyo 35MV560WX
CBY Bypass Cap 0.1 µF Vishay VJ0805Y104KXAM
CSS Soft-Start Cap 0.01 µF Vishay VJ080JY103KXX
CEXT EXTVCC 1 µF Vishay VJ0805Y105JXACW1BC
CBOOT Boot 0.1 µF Vishay VJ0805Y104KXAM
CAVIN Analog VIN 1 µF Vishay VJ0805Y105JXACW1BC
COUT Output Cap 100 µF Sanyo 6SVPC100M
CSD Shutdown Cap 1 nF Vishay VJ0805Y102KXXA
Cff Feedforward Cap 560 pF Vishay VJ0805A561KXXA
Rff Feedforward Res 1 MΩVishay CRCW08051004F
RFB1 High Side FB Res 1.62 kΩVishay CRCW08051621F
RFB2 Low Side RB Res 1 kΩVishay CRCW08051001F
RON On Time Res 143 kΩVishay CRCW08051433F
DCATCH Boot Diode 40V @ 3A Diode Central Semi CMSH3-40M-NST
L Output Inductor 10 uH, 5.4A ISAT Coilcraft MSS1278-103MX
(1) (Figure 28: Medium Voltage Board, 12V-to-3.3V conversion, fsw = 300 kHz)
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Links: LM2696
LM2696
SNVS375B –OCTOBER 2005–REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Changes from Revision A (April 2013) to Revision B Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 21
22 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2696
PACKAGE OPTION ADDENDUM
www.ti.com 17-Mar-2017
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM2696MXA/NOPB ACTIVE HTSSOP PWP 16 92 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 2696
MXA
LM2696MXAX/NOPB ACTIVE HTSSOP PWP 16 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 2696
MXA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 17-Mar-2017
Addendum-Page 2
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM2696MXAX/NOPB HTSSOP PWP 16 2500 330.0 12.4 6.95 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 6-Nov-2015
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM2696MXAX/NOPB HTSSOP PWP 16 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 6-Nov-2015
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
TYP
6.6
6.2
14X 0.65
16X 0.30
0.19
2X
4.55
(0.15) TYP
0 - 8 0.15
0.05
3.3
2.7
3.3
2.7
2X 1.34 MAX
NOTE 5
1.2 MAX
(1)
0.25
GAGE PLANE
0.75
0.50
A
NOTE 3
5.1
4.9
B4.5
4.3
4X 0.166 MAX
NOTE 5
4214868/A 02/2017
PowerPAD HTSSOP - 1.2 mm max heightPWP0016A
PLASTIC SMALL OUTLINE
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-153.
5. Features may not be present.
PowerPAD is a trademark of Texas Instruments.
TM
116
0.1 C A B
9
8
PIN 1 ID
AREA
SEATING PLANE
0.1 C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 2.400
THERMAL
PAD
17
www.ti.com
EXAMPLE BOARD LAYOUT
(5.8)
0.05 MAX
ALL AROUND 0.05 MIN
ALL AROUND
16X (1.5)
16X (0.45)
14X (0.65)
(3.4)
NOTE 9
(5)
NOTE 9
(3.3)
(3.3)
( 0.2) TYP
VIA (1.1) TYP
(1.1)
TYP
4214868/A 02/2017
PowerPAD HTSSOP - 1.2 mm max heightPWP0016A
PLASTIC SMALL OUTLINE
SYMM
SYMM
SEE DETAILS
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:10X
1
89
16
METAL COVERED
BY SOLDER MASK
SOLDER MASK
DEFINED PAD
17
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).
9. Size of metal pad may vary due to creepage requirement.
TM
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
PADS 1-16
EXPOSED
METAL
SOLDER MASK
DEFINED
SOLDER MASK
METAL UNDER SOLDER MASK
OPENING
EXPOSED
METAL
www.ti.com
EXAMPLE STENCIL DESIGN
16X (1.5)
16X (0.45)
(3.3)
(3.3)
BASED ON
0.125 THICK
STENCIL
14X (0.65)
(R0.05) TYP
(5.8)
4214868/A 02/2017
PowerPAD HTSSOP - 1.2 mm max heightPWP0016A
PLASTIC SMALL OUTLINE
2.79 X 2.790.175 3.01 X 3.010.15 3.3 X 3.3 (SHOWN)0.125 3.69 X 3.690.1
SOLDER STENCIL
OPENING
STENCIL
THICKNESS
NOTES: (continued)
10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
11. Board assembly site may have different recommendations for stencil design.
TM
SYMM
SYMM
1
89
16
BASED ON
0.125 THICK
STENCIL
BY SOLDER MASK
METAL COVERED SEE TABLE FOR
DIFFERENT OPENINGS
FOR OTHER STENCIL
THICKNESSES
SOLDER PASTE EXAMPLE
EXPOSED PAD
100% PRINTED SOLDER COVERAGE BY AREA
SCALE:10X
17
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Buyers and others who are developing systems that incorporate TI products (collectively, “Designers”) understand and agree that Designers
remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have
full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products
used in or for Designers’ applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with
respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous
consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and
take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will
thoroughly test such applications and the functionality of such TI products as used in such applications.
TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information,
including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to
assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any
way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource
solely for this purpose and subject to the terms of this Notice.
TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically
described in the published documentation for a particular TI Resource.
Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that
include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE
TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
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third party, or a license from TI under the patents or other intellectual property of TI.
TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
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INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF
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DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN
CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949
and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.
Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such
products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards
and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must
ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in
life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.
Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life
support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all
medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.
TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).
Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory
requirements in connection with such selection.
Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-
compliance with the terms and provisions of this Notice.
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