LM134, LM234, LM334
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LM134/LM234/LM334 3-Terminal Adjustable Current Sources
Check for Samples: LM134,LM234,LM334
1FEATURES The sense voltage used to establish operating current
2 Operates From 1V to 40V in the LM134 is 64mV at 25°C and is directly
0.02%/V Current Regulation proportional to absolute temperature (°K). The
Programmable From 1μA to 10mA simplest one external resistor connection, then,
generates a current with +0.33%/°C temperature
True 2-Terminal Operation dependence. Zero drift operation can be obtained by
Available as Fully Specified Temperature adding one extra resistor and a diode.
Sensor Applications for the current sources include bias
±3% Initial Accuracy networks, surge protection, low power reference,
ramp generation, LED driver, and temperature
DESCRIPTION sensing. The LM234-3 and LM234-6 are specified as
The LM134/LM234/LM334 are 3-terminal adjustable true temperature sensors with ensured initial
current sources featuring 10,000:1 range in operating accuracy of ±3°C and ±6°C, respectively. These
current, excellent current regulation and a wide devices are ideal in remote sense applications
dynamic voltage range of 1V to 40V. Current is because series resistance in long wire runs does not
established with one external resistor and no other affect accuracy. In addition, only 2 wires are required.
parts are required. Initial current accuracy is ±3%. The LM134 is specified over a temperature range of
The LM134/LM234/LM334 are true floating current 55°C to +125°C, the LM234 from 25°C to +100°C
sources with no separate power supply connections. and the LM334 from 0°C to +70°C. These devices
In addition, reverse applied voltages of up to 20V will are available in TO hermetic, TO-92 and SOIC-8
draw only a few dozen microamperes of current, plastic packages.
allowing the devices to act as both a rectifier and
current source in AC applications.
Connection Diagrams
Figure 1. SOIC-8 Surface Mount Package Figure 2. SOIC-8 Alternative Pinout Surface Mount
Package
(LM334M; LM334M/NOPB; LM334MX;
LM334MX/NOPB) (LM334SM; LM334SM/NOPB; LM334SMX;
LM334SMX/NOPB)
See Package Number D See Package Number D
Figure 3. TO Metal Can Package (Bottom View) Figure 4. TO-92 Plastic Package (Bottom View)
See Package Number NDV See Package Number LP
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2000–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM134, LM234, LM334
SNVS746E MARCH 2000REVISED MAY 2013
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
V+to VForward Voltage LM134/LM234/LM334 40V
LM234-3/LM234-6 30V
V+to VReverse Voltage 20V
R Pin to VVoltage 5V
Set Current 10 mA
Power Dissipation 400 mW
ESD Susceptibility(3) 2000V
Operating Temperature Range(4) LM134 55°C to +125°C
LM234/LM234-3/LM234-6 25°C to +100°C
LM334 0°C to +70°C
Soldering Information TO-92 Package (10 sec.) 260°C
TO Package (10 sec.) 300°C
SOIC Package Vapor Phase (60 sec.) 215°C
Infrared (15 sec.) 220°C
(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) Human body model, 100pF discharged through a 1.5kΩresistor.
(4) For elevated temperature operation, TJmax is:
LM134 150°C
LM234 125°C
LM334 100°C
See Thermal Characteristics.
Thermal Characteristics
over operating free-air temperature range (unless otherwise noted)
Thermal Resistance TO-92 TO SOIC-8
θja (Junction to Ambient) 180°C/W (0.4leads) 440°C/W 165°C/W
160°C/W (0.125leads)
θjc (Junction to Case) N/A 32°C/W 80°C/W
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Electrical Characteristics(1)
LM134/LM234 LM334
Parameter Conditions Units
Min Typ Max Min Typ Max
Set Current Error, V+=2.5V(2) 10μAISET 1mA 3 6 %
1mA < ISET 5mA 5 8 %
2μAISET < 10μA 8 12 %
Ratio of Set Current to Bias 100μAISET 1mA 14 18 23 14 18 26
Current 1mA ISET 5mA 14 14
2μAISET100 μA 18 23 18 26
Minimum Operating Voltage 2μAISET 100μA 0.8 0.8 V
100μA < ISET 1mA 0.9 0.9 V
1mA < ISET 5mA 1.0 1.0 V
Average Change in Set Current 2μAISET 1mA 1.5 V+5V 0.02 0.05 0.02 0.1 %/V
with Input Voltage 5V V+40V 0.01 0.03 0.01 0.05 %/V
1mA < ISET 5mA 1.5V V5V 0.03 0.03 %/V
5V V40V 0.02 0.02 %/V
Temperature Dependence of 25μAISET 1mA 0.96T T 1.04T 0.96T T 1.04T
Set Current(3)
Effective Shunt Capacitance 15 15 pF
(1) Unless otherwise specified, tests are performed at Tj= 25°C with pulse testing so that junction temperature does not change during test
(2) Set current is the current flowing into the V+pin. For the Basic 2-Terminal Current Source circuit shown in Figure 13. ISET is determined
by the following formula: ISET = 67.7 mV/RSET (@ 25°C). Set current error is expressed as a percent deviation from this amount. ISET
increases at 0.336%/°C @ Tj= 25°C (227 μV/°C).
(3) ISET is directly proportional to absolute temperature (°K). ISET at any temperature can be calculated from: ISET = Io(T/To) where Iois ISET
measured at To(°K).
Electrical Characteristics(1)
LM234-3 LM234-6
Parameter Conditions Units
Min Typ Max Min Typ Max
Set Current Error, V+=2.5V (2) 100μAISET 1mA ±1 ±2 %
TJ= 25°
Equivalent Temperature Error ±3 ±6 °C
Ratio of Set Current to Bias 100μAISET 1mA 14 18 26 14 18 26
Current
Minimum Operating Voltage 100μA ISET 1mA 0.9 0.9 V
Average Change in Set Current 100μAISET 1mA 1.5 V+5V 0.02 0.05 0.02 0.01 %/V
with Input Voltage 5V V+30V 0.01 0.03 0.01 0.05 %/V
Temperature Dependence of 100μAISET 1mA 0.98T T 1.02T 0.97T T 1.03T
Set Current(3)
Equivalent Slope Error ±2 ±3 %
Effective Shunt Capacitance 15 15 pF
(1) Unless otherwise specified, tests are performed at Tj= 25°C with pulse testing so that junction temperature does not change during test
(2) Set current is the current flowing into the V+pin. For the Basic 2-Terminal Current Source circuit shown in Figure 13. ISET is determined
by the following formula: ISET = 67.7 mV/RSET (@ 25°C). Set current error is expressed as a percent deviation from this amount. ISET
increases at 0.336%/°C @ Tj= 25°C (227 μV/°C).
(3) ISET is directly proportional to absolute temperature (°K). ISET at any temperature can be calculated from: ISET = Io(T/To) where Iois ISET
measured at To(°K).
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Typical Performance Characteristics
Maximum Slew Rate
Output Impedance Linear Operation
Figure 5. Figure 6.
Start-Up Transient Response
Figure 7. Figure 8.
Voltage Across RSET (VR) Current Noise
Figure 9. Figure 10.
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Typical Performance Characteristics (continued)
Turn-On Voltage Ratio of ISET to IBIAS
Figure 11. Figure 12.
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APPLICATION HINTS
The LM134 has been designed for ease of application, but a general discussion of design features is presented
here to familiarize the designer with device characteristics which may not be immediately obvious. These include
the effects of slewing, power dissipation, capacitance, noise, and contact resistance.
Calculating RSET
The total current through the LM134 (ISET) is the sum of the current going through the SET resistor (IR) and the
LM134's bias current (IBIAS), as shown in Figure 13.
Figure 13. Basic Current Source
A graph showing the ratio of these two currents is supplied under Ratio of ISET to IBIAS in Typical Performance
Characteristics. The current flowing through RSET is determined by VR, which is approximately 214μV/°K (64
mV/298°K 214μV/°K).
(1)
Since (for a given set current) IBIAS is simply a percentage of ISET, the equation can be rewritten
where
n is the ratio of ISET to IBIAS as specified in Electrical Characteristics and shown in the graph (2)
Since n is typically 18 for 2μAISET 1mA, the equation can be further simplified to
(3)
for most set currents.
Slew Rate
At slew rates above a given threshold (see curve), the LM134 may exhibit non-linear current shifts. The slewing
rate at which this occurs is directly proportional to ISET. At ISET = 10μA, maximum dV/dt is 0.01V/μs; at ISET =
1mA, the limit is 1V/μs. Slew rates above the limit do not harm the LM134, or cause large currents to flow.
Thermal Effects
Internal heating can have a significant effect on current regulation for ISET greater than 100μA. For example, each
1V increase across the LM134 at ISET = 1 mA will increase junction temperature by 0.4°C in still air. Output
current (ISET) has a temperature coefficient of 0.33%/°C, so the change in current due to temperature rise will be
(0.4) (0.33) = 0.132%. This is a 10:1 degradation in regulation compared to true electrical effects. Thermal
effects, therefore, must be taken into account when DC regulation is critical and ISET exceeds 100μA. Heat
sinking of the TO package or the TO-92 leads can reduce this effect by more than 3:1.
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Shunt Capacitance
In certain applications, the 15 pF shunt capacitance of the LM134 may have to be reduced, either because of
loading problems or because it limits the AC output impedance of the current source. This can be easily
accomplished by buffering the LM134 with an FET as shown in the applications. This can reduce capacitance to
less than 3 pF and improve regulation by at least an order of magnitude. DC characteristics (with the exception
of minimum input voltage), are not affected.
Noise
Current noise generated by the LM134 is approximately 4 times the shot noise of a transistor. If the LM134 is
used as an active load for a transistor amplifier, input referred noise will be increased by about 12dB. In many
cases, this is acceptable and a single stage amplifier can be built with a voltage gain exceeding 2000.
Lead Resistance
The sense voltage which determines operating current of the LM134 is less than 100mV. At this level,
thermocouple or lead resistance effects should be minimized by locating the current setting resistor physically
close to the device. Sockets should be avoided if possible. It takes only 0.7Ωcontact resistance to reduce output
current by 1% at the 1 mA level.
Sensing Temperature
The LM134 makes an ideal remote temperature sensor because its current mode operation does not lose
accuracy over long wire runs. Output current is directly proportional to absolute temperature in degrees Kelvin,
according to the following formula:
(4)
Calibration of the LM134 is greatly simplified because of the fact that most of the initial inaccuracy is due to a
gain term (slope error) and not an offset. This means that a calibration consisting of a gain adjustment only will
trim both slope and zero at the same time. In addition, gain adjustment is a one point trim because the output of
the LM134 extrapolates to zero at 0°K, independent of RSET or any initial inaccuracy.
Figure 14. Gain Adjustment
This property of the LM134 is illustrated in the accompanying graph. Line abc is the sensor current before
trimming. Line abcis the desired output. A gain trim done at T2 will move the output from b to band will
simultaneously correct the slope so that the output at T1 and T3 will be correct. This gain trim can be done on
RSET or on the load resistor used to terminate the LM134. Slope error after trim will normally be less than ±1%.
To maintain this accuracy, however, a low temperature coefficient resistor must be used for RSET.
A 33 ppm/°C drift of RSET will give a 1% slope error because the resistor will normally see about the same
temperature variations as the LM134. Separating RSET from the LM134 requires 3 wires and has lead resistance
problems, so is not normally recommended. Metal film resistors with less than 20 ppm/°C drift are readily
available. Wire wound resistors may also be used where best stability is required.
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Application as a Zero Temperature Coefficent Current Source
Adding a diode and a resistor to the standard LM134 configuration can cancel the temperature-dependent
characteristic of the LM134. The circuit shown in Figure 15 balances the positive tempco of the LM134 (about
+0.23 mV/°C) with the negative tempco of a forward-biased silicon diode (about 2.5 mV/°C).
Figure 15. Zero Tempco Current Source
The set current (ISET) is the sum of I1and I2, each contributing approximately 50% of the set current, and IBIAS.
IBIAS is usually included in the I1term by increasing the VRvalue used for calculations by 5.9%. (See
CALCULATING RSET.)
(5)
The first step is to minimize the tempco of the circuit, using the following equations. An example is given using a
value of +227μV/°C as the tempco of the LM134 (which includes the IBIAS component), and 2.5 mV/°C as the
tempco of the diode (for best results, this value should be directly measured or obtained from the manufacturer
of the diode).
(6)
(7)
With the R1to R2ratio determined, values for R1and R2should be determined to give the desired set current.
The formula for calculating the set current at T = 25°C is shown below, followed by an example that assumes the
forward voltage drop across the diode (VD) is 0.6V, the voltage across R1is 67.7mV (64 mV + 5.9% to account
for IBIAS), and R2/R1= 10 (from the previous calculations).
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(8)
This circuit will eliminate most of the LM134's temperature coefficient, and it does a good job even if the
estimates of the diode's characteristics are not accurate (as the following example will show). For lowest tempco
with a specific diode at the desired ISET, however, the circuit should be built and tested over temperature. If the
measured tempco of ISET is positive, R2should be reduced. If the resulting tempco is negative, R2should be
increased. The recommended diode for use in this circuit is the 1N457 because its tempco is centered at 11
times the tempco of the LM134, allowing R2= 10 R1. You can also use this circuit to create a current source with
non-zero tempcos by setting the tempco component of the tempco equation to the desired value instead of 0.
EXAMPLE: A 1mA, Zero-Tempco Current Source
First, solve for R1and R2:
(9)
The values of R1and R2can be changed to standard 1% resistor values (R1= 133Ωand R2= 1.33kΩ) with less
than a 0.75% error.
If the forward voltage drop of the diode was 0.65V instead of the estimate of 0.6V (an error of 8%), the actual set
current will be
(10)
an error of less than 5%.
If the estimate for the tempco of the diode's forward voltage drop was off, the tempco cancellation is still
reasonably effective. Assume the tempco of the diode is 2.6mV/°C instead of 2.5mV/°C (an error of 4%). The
tempco of the circuit is now:
(11)
A 1mA LM134 current source with no temperature compensation would have a set resistor of 68Ωand a
resulting tempco of
(12)
So even if the diode's tempco varies as much as ±4% from its estimated value, the circuit still eliminates 98% of
the LM134's inherent tempco.
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Typical Applications
*Select R3 = VREF/583μA. VREF may be any stable positive voltage 2V
Trim R3 to calibrate
Figure 16. Ground Referred Fahrenheit Thermometer
Figure 17. Terminating Remote Sensor for Voltage Output
*Output impedance of the LM134 at the “R” pin is approximately
where R2is the equivalent external resistance connected from the Vpin to ground. This negative resistance can be
reduced by a factor of 5 or more by inserting an equivalent resistor R3= (R2/16) in series with the output.
Figure 18. Low Output Impedance Thermometer
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Figure 19. Low Output Impedance Thermometer
*Select R1 and C1 for optimum stability
Figure 20. Higher Output Current
Figure 21. Basic 2-Terminal Current Source
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Figure 22. Micropower Bias
Figure 23. Low Input Voltage Reference Driver
Figure 24. Ramp Generator
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*Select ratio of R1 to R2 to obtain zero temperature drift
Figure 25. 1.2V Reference Operates on 10 μA and 2V
*Select ratio of R1 to R2 for zero temperature drift
Figure 26. 1.2V Regulator with 1.8V Minimum Input
Figure 27. Zener Biasing
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*For ±10% adjustment, select RSET10% high, and make R1 3 RSET
Figure 28. Alternate Trimming Technique
Figure 29. Buffer for Photoconductive Cell
*Select Q1 or Q2 to ensure at least 1V across the LM134. Vp(1 ISET/IDSS)1.2V.
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Figure 30. FET Cascoding for Low Capacitance and/or Ultra High Output Impedance
*ZOUT 16 R1 (R1/VIN must not exceed ISET)
Figure 31. Generating Negative Output Impedance
*Use minimum value required to ensure stability of protected device. This minimizes inrush current to a direct short.
Figure 32. In-Line Current Limiter
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Schematic Diagram
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REVISION HISTORY
Changes from Revision C (April 2013) to Revision D Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 16
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PACKAGE OPTION ADDENDUM
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Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM134 MDC ACTIVE DIESALE Y 0 400 Green (RoHS
& no Sb/Br) Call TI Level-1-NA-UNLIM -40 to 85
LM134H ACTIVE TO NDV 3 1000 TBD Call TI Call TI -55 to 125 ( LM134H, LM134H)
LM134H/NOPB ACTIVE TO NDV 3 1000 Green (RoHS
& no Sb/Br) Call TI Level-1-NA-UNLIM -55 to 125 ( LM134H, LM134H)
LM234Z-3/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type -25 to 100 LM234
Z-3
LM234Z-6/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type -25 to 100 LM234
Z-6
LM334 MWC ACTIVE WAFERSALE YS 0 1 Green (RoHS
& no Sb/Br) Call TI Level-1-NA-UNLIM -40 to 85
LM334M NRND SOIC D 8 95 TBD Call TI Call TI 0 to 70 LM334
M
LM334M/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 LM334
M
LM334MX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 LM334
M
LM334SM NRND SOIC D 8 TBD Call TI Call TI 0 to 70 LM334
SM
LM334SM/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 LM334
SM
LM334SMX NRND SOIC D 8 2500 TBD Call TI Call TI 0 to 70 LM334
SM
LM334SMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM 0 to 70 LM334
SM
LM334Z/LFT1 ACTIVE TO-92 LP 3 2000 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type LM334
Z
LM334Z/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type 0 to 70 LM334
Z
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
PACKAGE OPTION ADDENDUM
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Addendum-Page 2
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM334MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM334SMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM334SMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Dec-2014
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM334MX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM334SMX SOIC D 8 2500 367.0 367.0 35.0
LM334SMX/NOPB SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 5-Dec-2014
Pack Materials-Page 2
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PACKAGE OUTLINE
( 2.54)
1.16
0.92
4.95
4.55
0.76 MAX 2.67 MAX
0.64 MAX
UNCONTROLLED
LEAD DIA
3X
12.7 MIN
3X 0.483
0.407
-5.565.32
1.22
0.72
45
TO-CAN - 2.67 mm max heightNDV0003H
TO-46
4219876/A 01/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-46.
1
2
3
SCALE 1.250
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EXAMPLE BOARD LAYOUT
0.07 MAX
ALL AROUND
0.07 MAX
TYP
( 1.2)
METAL
2X ( 1.2)
METAL
3X ( 0.7) VIA
(R0.05) TYP
(2.54)
(1.27)
TO-CAN - 2.67 mm max heightNDV0003H
TO-46
4219876/A 01/2017
LAND PATTERN EXAMPLE
NON-SOLDER MASK DEFINED
SCALE:12X
2X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
1
2
3
www.ti.com
PACKAGE OUTLINE
3X 2.67
2.03
5.21
4.44
5.34
4.32
3X
12.7 MIN
2X 1.27 0.13
3X 0.55
0.38
4.19
3.17
3.43 MIN
3X 0.43
0.35
(2.54)
NOTE 3
2X
2.6 0.2
2X
4 MAX
SEATING
PLANE
6X
0.076 MAX
(0.51) TYP
(1.5) TYP
TO-92 - 5.34 mm max heightLP0003A
TO-92
4215214/B 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Lead dimensions are not controlled within this area.
4. Reference JEDEC TO-226, variation AA.
5. Shipping method:
a. Straight lead option available in bulk pack only.
b. Formed lead option available in tape and reel or ammo pack.
c. Specific products can be offered in limited combinations of shipping medium and lead options.
d. Consult product folder for more information on available options.
EJECTOR PIN
OPTIONAL
PLANE
SEATING
STRAIGHT LEAD OPTION
321
SCALE 1.200
FORMED LEAD OPTION
OTHER DIMENSIONS IDENTICAL
TO STRAIGHT LEAD OPTION
SCALE 1.200
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EXAMPLE BOARD LAYOUT
0.05 MAX
ALL AROUND
TYP
(1.07)
(1.5) 2X (1.5)
2X (1.07)
(1.27)
(2.54)
FULL R
TYP
( 1.4)0.05 MAX
ALL AROUND
TYP
(2.6)
(5.2)
(R0.05) TYP
3X ( 0.9) HOLE
2X ( 1.4)
METAL
3X ( 0.85) HOLE
(R0.05) TYP
4215214/B 04/2017
TO-92 - 5.34 mm max heightLP0003A
TO-92
LAND PATTERN EXAMPLE
FORMED LEAD OPTION
NON-SOLDER MASK DEFINED
SCALE:15X
SOLDER MASK
OPENING
METAL
2X
SOLDER MASK
OPENING
123
LAND PATTERN EXAMPLE
STRAIGHT LEAD OPTION
NON-SOLDER MASK DEFINED
SCALE:15X
METAL
TYP
SOLDER MASK
OPENING
2X
SOLDER MASK
OPENING
2X
METAL
12 3
www.ti.com
TAPE SPECIFICATIONS
19.0
17.5
13.7
11.7
11.0
8.5
0.5 MIN
TYP-4.33.7
9.75
8.50
TYP
2.9
2.4 6.75
5.95
13.0
12.4
(2.5) TYP
16.5
15.5
32
23
4215214/B 04/2017
TO-92 - 5.34 mm max heightLP0003A
TO-92
FOR FORMED LEAD OPTION PACKAGE
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