1
File Number
1825.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 |Copyright © Intersil Corporation 1999
IRF250
30A, 200V, 0.085 Ohm, N-Channel
Power MOSFET
This N-Channel enhancement mode silicon gate power field
effect transistor is designed, tested and guaranteed to
withstand a specified level of energy in the breakdown
avalanche mode of operation. These MOSFETs are
designed for applications such as switching regulators,
switching converters, motor drivers, relay drivers, and drivers
for high power bipolar switching transistors requiring high
speed and low gate drive power. They can be operated
directly from integrated circuits.
Formerly developmental type TA09295.
Features
30A, 200V
•r
DS(ON) = 0.085
Single Pulse Avalanche Energy Rated
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
JEDEC TO-204AE
TOP VIEW
Ordering Information
PART NUMBER PACKAGE BRAND
IRF250 TO-204AE IRF250
NOTE: When ordering, include the entire part number.
G
D
S
DRAIN
(FLANGE)
SOURCE (PIN 2)
GATE (PIN 1)
Data Sheet March 1999
2
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
IRF250 UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS 200 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 200 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID30 A
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID19 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 120 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD150 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS 910 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg 300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA (Figure 10) 200 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2.0 - 4.0 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA
On State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX,V
GS = 10V 30 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) VGS = 10V, ID = 16A (Figures 8, 9) - 0.07 0.085
Forward Transconductance (Note 2) gfs VDS 50V, ID = 16V (Figure 12) 13 19 - S
Turn-On Delay Time tD(ON) VDD = 100V, ID 30A, RG = 6.2, RL = 3.2
(Figures 17, 18) MOSFET Switching Times are
Essentially Independent of Operating Temperature
-2030ns
Rise Time tr- 120 180 ns
Turn-Off Delay Time tD(OFF) - 70 100 ns
Fall Time tf- 80 120 ns
Total Gate Charge
(Gate to Source + Gate to Drain) Qg(TOT) VGS = 10V, ID = 30A, VDS = 0.8 x Rated BVDSS,
Ig(REF) = 1.5mA (Figures 14, 19, 20) Gate Charge is
Essentially Independent of Operating Temperature
- 79 120 nC
Gate to Source Charge Qgs -13- nC
Gate to Drain “Miller” Charge Qgd -42- nC
Input Capacitance CISS VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) - 2000 - pF
Output Capacitance COSS - 800 - pF
Reverse-Transfer Capacitance CRSS - 300 - pF
Internal Drain Inductance LDMeasured between the
ContactScrewonHeader
that is Closer to Source
and Gate Pins and
Center of Die
Modified MOSFET
Symbol Showing the
Internal Devices
Inductances
- 5.0 - nH
Internal Source Inductance LSMeasured from the
Source Lead, 6mm
(0.25in) from Header to
Source Bonding Pad
- 12.5 - nH
Thermal Resistance Junction to Case RθJC - - 0.83 oC/W
Thermal Resistance Junction to Ambient RθJA Free Air Operation - - 30 oC/W
LS
LD
G
D
S
IRF250
3
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET
Symbol Showing the
Integral Reverse P-N
Junction Diode
- - 30 A
Pulse Source to Drain Current (Note 3) ISDM - - 120 A
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 30A, VGS = 0V (Figure 13) - - 2.0 V
Reverse Recovery Time trr TJ = 25oC, ISD = 30A, dISD/dt = 100A/µs 140 350 630 ns
Reverse Recovered Charge QRR TJ = 25oC, ISD = 30A, dISD/dt = 100A/µs 1.8 4.7 8.1 µC
NOTES:
2. Pulse Test: Pulse width 300µs, duty cycle 2%.
3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 1.5mH, RG = 25, peak IAS = 30A. See Figures 15 and 16.
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
G
D
S
0 50 100 150
0
TC, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
0.2
0.4
0.6
0.8
1.0
1.2
TC, CASE TEMPERATURE (oC)
50 75 10025 150
40
32
24
0
16
ID, DRAIN CURRENT (A)
8
125
ZθJC, THERMAL IMPEDANCE
1
10-2
10-5 10-4 10-3 0.1 1 10
t1, RECTANGULAR PULSE DURATION (S)
0.1
10-2
10-3
0.02
0.01
0.05
0.2
0.5
0.1
SINGLE PULSE
DUTY FACTOR: D = t1/t2
NOTES:
PEAK TJ= PDM x ZθJC + TC
t2
PDM
t1t2
IRF250
4
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
Typical Performance Curves
Unless Otherwise Specified (Continued)
10
1.0 10
0.1
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
103
1
OPERATION IN THIS
REGION IS LIMITED
BY rDS(ON)
TJ = MAX RATED
SINGLE PULSE
TC = 25oC
1ms
10ms
DC
100ms
10ms
102
102103
VDS, DRAIN TO SOURCE VOLTAGE (V)
20 40 60 800
50
40
30
0
20
ID, DRAIN CURRENT (A)
10
VGS = 7V
100
VGS = 10V
VGS = 5V
VGS = 4V
VGS = 6V
80µs PULSE TEST
VDS, DRAIN TO SOURCE VOLTAGE (V)
123405
50
40
30
0
20
ID, DRAIN CURRENT (A)
80µs PULSE TEST
10
VGS = 10V
VGS = 6V
VGS = 4V
VGS = 8V
VGS = 7V
VGS = 5V
IDS(ON), DRAIN TO SOURCE CURRENT (A)
VSD, GATE TO SOURCE VOLTAGE (V)
100
10
1
0.1
0246810
80µs PULSE TEST
VDS 50V
TJ = 150oCTJ = 25oC
100
ID, DRAIN CURRENT (A)
25 50 75
0
0.5
0.4
0
rDS(ON), DRAIN TO SOURCE
0.2
80µs PULSE TEST
ON RESISTANCE ()
0.1
125
0.3
VGS = 20V
VGS = 10V
0
3.0
1.8
0.6
100
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
2.4
1.2
0140
ON RESISTANCE VOLTAGE
-40 40-60 -20 20 60 80 120 120
ID = 30A
VGS = 10V
IRF250
5
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Typical Performance Curves
Unless Otherwise Specified (Continued)
140
1.25
1.05
0.85
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
1.15
0.95
0.75
BREAKDOWN VOLTAGE
0 100
ID = 250µA
-40 40-60 -20 20 60 80 120 120 12 102 5102
C, CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
7500
6000
4500
3000
1500
05
CRSS
CISS
COSS
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGD
ID, DRAIN CURRENT (A)
10 20 30 40050
25
20
15
0
10
gfs, TRANSCONDUCTANCE (S)
5
TJ = 25oC
TJ = 150oC
80µs PULSE TEST
VDS 50V
ISD, SOURCE TO DRAIN CURRENT (A)
VSD, SOURCE TO DRAIN VOLTAGE (V)
102
10 0.5 1.0 1.5 2.5
10
2
2
5
5
TJ = 150oC
TJ = 25oC
103
2
5
2.0
Qg(TOT), TOTAL GATE CHARGE (nC)
25 50 75 1000 125
20
8
VGS, GATE TO SOURCE VOLTAGE (V)
16
12
0
VDS = 40V
4
ID = 30A
VDS = 100V
VDS = 160V
IRF250
6
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
tP
VGS
0.01
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-VDD
tON
td(ON)
tr
90%
10%
VDS 90%
10%
tf
td(OFF)
tOFF
90%
50%
50%
10% PULSE WIDTH
VGS
0
0
0.3µF
12V
BATTERY 50k
VDS
S
DUT
D
G
Ig(REF)
0
(ISOLATED
VDS
0.2µF
CURRENT
REGULATOR
ID CURRENT
SAMPLING
IG CURRENT
SAMPLING
SUPPLY)
RESISTOR RESISTOR
SAME TYPE
AS DUT
Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
Ig(REF)
0
IRF250
7
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
IRF250