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MM74C922 • MM74C923
Asynchronous Data Entry Onto Bu s (MM74C922)
Outp ut s are in 3-STATE until key is pres s ed, then dat a is placed on bus. W hen key is released, out puts return to 3-S TATE.
Expansion to 32 Key Encoder (MM74C922)
Theory of Operation
The MM74C922/MM74C923 Keyboard Encoders imple-
ment all the logic necessary to interface a 16 or 20 SPST
key switch matrix to a digital syste m. The encod er will con-
vert a key switch closer to a 4(MM74C922) or
5(MM 74C 9 23 ) bit ni bb l e. Th e des i gne r ca n co nt rol bo t h the
keyboar d scan rate and the key deboun ce period by alter -
ing the oscillator capacitor, COSE, and the key bounce
mask capacitor, CMSK. Thu s, the MM74 C922 /MM74C92 3’s
perfor man c e can be opt imiz ed for many keyboar ds.
The keyboard encoders connect to a switch matrix that is 4
rows by 4 columns (MM74C922) or 5 rows by 4 columns
(MM74C923). When no keys are depressed, the row inputs
are pul le d h igh b y inte rn al pu l l-up s an d th e co l um n o utpu ts
sequentially output a logic “0”. These outputs are open
drai n and are therefor e low fo r 25% of th e time and other -
wise off. The c olumn scan r ate is controlled b y the osci lla-
tor input, which con sists of a Schmitt trigger o scillator, a 2-
bit counter, and a 2–4-bit dec ode r.
When a ke y is depressed, key 0, for example, nothing will
happen when the X1 input is o ff, since Y1 will remain high.
When the X1 column is scanned, X1 goes low and Y1 will
go low. This disables the counter and keeps X1 low. Y1
going low also initiates the key bounce circuit timing and
locks out the other Y inputs. The key code to be output is a
combination of the frozen counter value and the decoded Y
inputs. Once the key bounce circuit times out, the data is
latched, and the Data Available (DAV) output goes high.
If, during th e key closure the swit ch bounces, Y1 input will
go high again, restarting the scan and resetting the key
bounce circuitry . The key may bounce several times, but as
soon as the switch stays low for a debounce period, the
closur e is a ssumed valid and the data i s lat ched.
A key may also bounce whe n it is released. To ensure that
the encoder does not recognize this bounce as another key
closure, the debou nce ci rcuit mu st time ou t befor e anoth er
closure is recogn ized.
The two-key roll-over feature can be illustrated by assum-
ing a key is depressed, and then a second key is
depressed. Since all scanning has stopped, and all other Y
inputs are d isabled, th e second key is n ot recognized until
the first key is lifted and the key bounce circuitry has reset.
The out put latches fe ed 3-STATE, which is enabled when
the Output Enable (OE) input is taken low.