TEMIC TFDU4100 Integrated Infrared Transceiver Module IrDA (SIR) Features Compliant to IrDA 1.0 Standard @ IrDA Data Rates Up to 115.2-kbps Low Power Consumption @ Universal Package Option Baud Rate @ AGC for EMI Immunity - L977 mmx W 4.7 mm x H4.0mm O- to 3.0-m Range Open Collector IRED Driver - Surface Mount Solderability To Side View Low Profile Or Top View Orientation Few External Components Required Wide Supply Voltage Range (2.7 V 5.5 V) Description The TFDU4100 is a SIR infrared transceiver ideal for The internal IRED driver can be connected by an external telecommunications and computer applications like mobile current control resistor to an independent unregulated phones, pagers, handheld PCs and PDAs. The transceiver is power supply, Vcoc2. This adds circuit design flexibility compliant with the IrDA standard and allows data rates up _and efficient serial drive capability for external IREDs for to 115 kbit/s. An intemal AGC (Automatic Gain Control) high power applications. ensures proper operation under adverse EMI conditions. Pin Configurations TFDU4100 8 GND 7 SC (Sensitivity Control) 6 Vcc (Supply Voltage) 5 NC 4 Rxd (Output) 3 Txd (nput) 2 IRED Cathode L IRED Anode . Functional Block Diagram a CC1 s > Driver Amplifier Comparator Rxd | AGC IRED Anode sc oO Logic # Txd @ MS IRED Cathode Open Collector Driver Oa GND Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70736. TEMIC Semiconductors 1 S-51447Rev. A, 14-Jul-97 . Pre-Release InformationTFDU4100 TEMIC Semiconductors Absolute Maximum Ratings Parameter Symbol Test Conditions Min? | Typt | Max> Unit Supply Voltage Range Vec -0.5 6 Vv Voltage Range of IRED Drive Output IRED anode pin, Txd LOW 0.5 6 All pins except IRED cathode pin and Input Currents IRED anode pin (See IRED Current) 10 mA Output Sinking Current 25 Power Dissipation Prot (See Derating Curve) 200 mw Junction Temperature Ty 125 Ambient Temperature Range (Operating) TA 25 85 Cc Storage Temperature Range Tatg 25 85 Soldering Temperature 1=20s 215 230 Average IRED Current lrep(DC) 100 A m, Repetitive Pulsed IRED Current lmep(RP) 1< 90 us, Duty Cycle < 20% 500 Peak IRED Current lmep(PK) t< 2s, Duty Cycle < 10% 1 A IRED Anode Voltage VIREDA 0.5 6 Transmitter Data Input Voltage Vox 0.5 Vecot+ 0.5 Vv Receiver Data Output Voltage Vrod 0.5 Veot+ 0.5 Virtual source size d Method: (1-L/e) 2.5 2.3 mm Maximum Intensity for Class 1 Operation of IBC 825 or EN60825 EINGO825, 1.1. 1.997 400 mW /sr Notes a. Reference point GND pin unless otherwise noted b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. Typical values are for DESIGN AlD ONLY, not guaranteed nor subject to production testing. Current Derating eT] Maximum Duty Cycle 20% a \ & \ = 400 x g N 5 a 9 200 \ ng 3 Current derating as a os function of the maximum forward current of IRED \ and maximum duty cycle. D | \ 0 20 40 60 80 100 120-140 Ambient Temperature Ta (C) 2 TEMIC Semiconductors Pre-Release Information 5-5 1447Rev. A, 14-Jul-97TEMIC Semiconductors TFDU4100 3-5 1447Rev. A, 14-Jul-97 Pre-Release Information Specifications Parameter Symbol Test Conditions Min? Typ* | Max> Unit Transceiver Supported Data Rates 2.4 115.2 | kBitfs Supply Voltage Range Vee. Reduced Punction Down to 2.5 V 2.7 5 5.5 v . Vee, =5.5V L3 2.5 Supply Current, Vcc) Pin Ig mA Vee, =2.7V Lo 1.5 Leakage Current of 1R Emitter, Vee, OFF, Txd LOW, Ver = 6V IRED Anode Pin Is T = 25 to 85C 0.005 | 05 nA Transceiver Power On Settling Time 50 Ls Receiver . . . =+ 15, SIR Mode, SC = LOW 0.020 | 0.035 Min. Detection Threshold lrradianced Eemin * =+ 15, SIR Mode, SC LOW, Voc] =27 0.035 Min. Detection Threshold Irradiance* Eemin x = + 15%, SIR Mode, SC = HIGH 0.006 0.010 | 0.015 Wm m2 " " % = 90", Voc] =5 V, SIR Mode 3300 5000 Max. Detection Threshold lrradiance4 Eemax % = 90", ec]=3 V, SIR Mode $000 T5000 Logic Low Receiver Input Irradiance Eemax(low) SC = HIGH or LOW 0.004 VoL Active, = 15 pF, R=2.2 KS. 0.5 08 Output Voltage Rxd - Vv Vou Non-Active, C = 15 pF, R= 2.2 ku VoecoO.5 Output Current VoL <O.8V 4 mA Rise and Fall Time te, te C=15pRR=2.2ks. 20 200 ns Rxd Signal Electrical Output ' Input Pulse Length 2.4 kBils/s L4l 20 Pulse Width P 1.41 us to 316 of Bit Length 115.2 kBits/s L41 8 Output Level = 0.5 x Voc] @ Be. = 0.040 W/m l 2 Output Delay Time (Rxd) &f tal P ect < tat Output Level = 0.5% Vec1 6.5 ps Jitter tj Over a period of 10 bit, 115.2 kBit/s 2 Recovery from last transmitted pulse to Latency 1 L.L x threshold sensitivity 100 800 Transmitter . Current limiting resistor in series to IRED: Driver Current IRED Ip Rg = 8.2%, Vo@=5V 03 0.5 A Logic Low Transmitter Input Voltage | Vp. (Txd) 0 0.8 v Logic High Transmitter Input Voltage Voy (Txd) 2.4 Vec Current limiting resistor in series to IRED: leH . 45 140 200 mW/sr Output Radiant Intensity Rg =8.2& @5 Vec7=5V, * =15 leL Logic Low Level 0.04 wW /sr Angle of Half Intensity es + 24 Peak Wavelength of Emission Ap $50 900 nm Halfwidth of Emission Spectrum 60 Optical Rise/Fall Time tp, te 115.2-kHz Square Wave Signal Duty Cycle: 1.1 200 600 ns Overshoot, Optical 25 % a . Over a Period of 10 bits Rising Bdge Peak-to-Peak Jitter 4 Independent of Information Content 0.2 Us Notes a. Unless otherwise specified Ta = 25C, Vec=5V. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. BER = 10-8 (IrDA Specification) e. tq)= delay of leading edge of output signal related to leading edge of optical input signal. f. ta: = delay of trailing edge of output signal related to trailing edge of optical input signal. g. Leading edge of output signal. TEMIC Semiconductors 3