TB62209FG
2010-07-02 1
TOSHIBA BiCD Processor IC Silicon Monolithic
TB62209FG
Stepping Motor Driver IC Using PWM Chopper Type
The TB62209FG is a stepping motor driver driven by chopper
micro-step pseudo sine wave.
The TB62209FG integrates a decoder for CLK input in micro
steps as a system to facilitate driving a two-phase stepping motor
using micro-step pseudo sine waves. Micro-step pseudo sine
waves are optimal for driving stepping motors with low-torque
ripples and at low oscillation. Thus, the TB62209FG can easily
drive stepping motors with low-torque ripples and at high
efficiency.
Also, TB62209FG consists of output steps by DMOS (Power
MOS FET), and that makes it possible to control the output
power dissipation much lower than ordinary IC with bipolar
transistor output.
The IC supports Mixed Decay mode for switching the attenuation ratio at chopping. The switching time for the
attenuation ratio can be switched in four stages according to the load.
Features
• Bipolar stepping motor can be controlled by a single driver IC
• Monolithic BiCD IC
• Low ON-resistance of Ron = 0.5 Ω (Tj = 25°C @1.0 A: typ.)
• Built-in decoder and 4-bit DA converters for micro steps
• Built-in ISD, TSD, VDD &VM power monitor (reset) circuit for protection
• Built-in charge pump circuit (two external capacitors)
• 36-pin power flat package (HSOP36-P-450-0.65)
• Output voltage: 40 V max
• Output current: 1.8 A/phase max
• 2-phase, 1-2 (type 2) phase, W1-2 phase, 2W1-2 phase, 4W1-2 phase, or motor lock mode can be
selected.
• Built-in Mixed Decay mode enables specification of four-stage attenuation ratio.
• Chopping frequency can be set by external resistors and capacitors.
High-speed chopping possible at 100 kHz or higher.
Note: When using the IC, pay attention to thermal conditions.
This device is easily damaged by high static voltage, please handle with care.
This product is RoHS compatible.
Weight: 0.79 g (typ.)
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Block Diagram
1. Overview
RESET
CW/CCW
ENABLE
STANDBY
D MODE 3
D MODE 2
D MODE 1
CLK
RS
VM
Ccp C
Ccp B
Ccp A
MO
VDD
TORQUE 1 TORQUE 2 MDT 1 MDT 2
Chopper OSC
Current Level Set
Current Feedback (×2)
Protection Unit
TSD
protect
Vre
f
STANDBY
ENABLE VMVDD
Stepping
Motor
Micro-step decoder
Torque control 4-bit D/A
(sine angle control)
VRS 1
RS COMP 1
VRS 2
RS COMP 2
Charge
Pump
Unit
Output (H-bridge)
× 2
OCS
CR-CLK
converter
Output control
(Mixed Decay control)
TSD
ISD
VDDR/VMR
protect
CR
VM
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2. LOGIC UNIT Function
The microstep electrical angle is output according to the logic of the PIN settings.
D MODE 1
D MODE 2
D MODE 3
CW/CCW
CLK
STANDBY
MDT 1 MDT 2
Decay
× 2 bit
A unit side
TORQUE 1 TORQUE 2
DATA MODE
Micro-step decoder
Micro-step
current data
× 4 bit
A unit side
Phase
× 1 bit
A unit side
Current
feedback
circuit
Mixed
Decay
circuit
Output
control
circuit
D/A circuit
Output
control
circuit
ENABLE
RESET
Torque
× 2 bit
Decay
× 2 bit
B unit side
Phase
× 1 bit
B unit side
Micro-step
current data
× 4 bit
B unit side
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3. Current feedback circuit and current setting circuit
Function
The current setting circuit is used to set the reference voltage of the output current using the current
setting decoder.
The current feedback circuit is used to output to the output control circuit the relation between the
set current value and output current. This is done by comparing the reference voltage output to the
current setting circuit with the potential difference generated when current flows through the current
sense resistor connected between RS and VM.
The chopping waveform generator circuit to which CR is connected is used to generate clock used as
reference for the chopping frequency.
Note 1: RS COMP1: Compares the set current with the output current and outputs a signal when the output
current reaches the set current.
Note 2: RS COMP2: Compares the set current with the output current at the end of Fast mode during chopping.
Outputs a signal when the set current is below the output current.
Waveform shaping circuit
VM
RS
Vre
f
100％
85％
70％
50％
Chopping waveform
generator circuit CR
VRS circuit 1
(detects
potential
difference
between
RS and VM)
RS COMP
circuit
1
(Note 1)
NF
(set current
reached signal)
VRS circuit 2
(detects
potential
difference
between
VM and RS)
RS COMP
circuit
2
(Note 2)
RNF
(set current
monitor signal)
<Use in FAST MODE>
<Use in Charge mode>
Output
control
circuit
Mixed
Decay
timing
circuit
Output stop signal (ALL OFF)
Chopping reference circuit
0
Current feedback circuit
Torque
control
circuit
Current setting
circuit
D/A circuit
TORQUE
0, 1
CURRENT
0-3
Decoder
Unit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Micro-step
current
setting
selector
circuit
4-bit
D/A
circuit
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4. Output control circuit, current feedback circuit and current setting circuit
Output control circuit
Note: The STANDBY pins are pulled down in the IC by 100-kΩ resistor.
When not using the pin, connect it to GND. Otherwise, malfunction may occur.
Micro-step current setting
decoder circuit
Chopping
reference circuit
ISD
circuit
Output pin
VMR
circuit
VM
VDDR
circuit
VDD
TSD
circuit
Current
feedback
circuit
Current
setting
circuit
Charge
pump
circuit
Cop A
CR counter
CR Selector
VDD VM
LOGIC
VDDR: VDD power on
Reset
VMR: VM power on Reset
ISD: Current shutdown
circuit
TSD: Thermal shutdown
circuit
Protection
circuit
Charge pump
circuit
Micro-step current
setup latch
clear signal
Mixed Decay
timing table clear
signal
Cop B
Cop C
PHASE
DECAY
MODE
Mixed
Decay
timing
circuit
Output RESET signal
Output circuit
Output
circuit
Charge
pump
halt
signal
Power supply for
upper drive output
VH
STANDBY
NF set current
reached signal
RNF set current
monitor signal
Output stop
signal
Output control circuit
Internal
stop
signal
select
circuit
Mixed
Decay
timing
Charge Start
U1
U2
L1
L2
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5. Output equivalent circuit
Note: The diode on the dotted line is a body diode.
VM B
U1
L1
U2
L2
To VM
From output
control
circuit
Output A
Output A
RS A RRS A
M
U1
L1
U2
L2
PGND
From output
control
circuit
Output B
Output B
RRS B
Power
supply
for upper
drive output
(VH)
U1
U2
L1
L2
Output
driver
circuit
Phase B
RSB
VM A
Power
supply
for upper
drive output
(VH)
U1
U2
L1
L2
Output
driver
circuit
Phase A
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6. Input equivalent circuit
1. Input circuit (CLK, TORQUE, MDT, CW/CCW, DATA MODE, Drive Mode)
2. Input circuit (RESET, ENABLE, STANDBY )
3. Vref input circuit
4. Output circuit (MO, PROTECT)
VDD
VSS
OUT
150 Ω
GND
VDD
VSS
IN
150 ΩTo Logic IC
GND
100 kΩ
VDD
VSS
IN
150 ΩTo Logic IC
GND
VDD
VSS
IN
To D/A circuit
GND
2
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Pin Assignment (top view)
Pin Assignment for PWM in Data Mode
D MODE 1 → GA+ (OUT A, A)
D MODE 2 → GA− (OUT A, A)
D MODE 3 → GB+ (OUT B, B)
CW/CCW → GB− (OUT B, B)
Note: Pin assignment above is different at data mode and PWM.
1 D MODE 1
2 D MODE 2
36
35
CR
CLK
3 D MODE 3
4 CW/CCW
5 VDD
6 Vre
f
7 NC
8 NC
9 RS B
(FIN)
10 RS A
11 NC
12 NC
13 VM
14
STANDBY
15 Ccp A
16 Ccp B
17 Ccp C
18 MO
34 ENABLE
33 OUT B
32 RESET
31 DATA MODE
30 NC
29 OUT B
28 PGND
(FIN)
27 PGND
26 OUT A
25 NC
24 MDT 2
23 MDT 1
22 OUT A
21 TORQUE2
20 TORQUE1
19 PROTECT
TB62209FG
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Pin Description 1
Pin Number Pin Name Function Remarks
1 D MODE 1
2 D MODE 2
3 D MODE 3
Motor drive mode setting pin
D MODE 3, 2, 1 =
LLL: Same function as that of STANDBY pin
LLH: Motor Lock mode
LHL: 2-Phase Excitation mode
LHH: 1-2 Phase Excitation (A) mode
HLL: 1-2 Phase Excitation (B) mode
HLH: W1-2 Phase Excitation mode
HHL: 2W1-2 Phase Excitation mode
HHH: 4W1-2 Phase Excitation mode
4 CW/CCW Sets motor rotation direction CW: Forward rotation
CCW: Reverse rotation
5 VDD Logic power supply connecting pin Connect to logic power supply (5 V)
6 Vref Reference power supply pin for setting output
current Connect to supply voltage for setting current.
7 NC Not connected Not wired
8 NC Not connected Not wired
9 RS B Unit-B power supply pin
(connecting pin for power detection resistor)
Connect current sensing resistor between this
pin and VM
FIN F
IN FIN Logic ground pin
Connect to power ground
The pin functions as a heat sink. Design pattern
taking heat into consideration.
10 RS A Unit-A power supply pin
(pin connecting power detection resistor)
Connect current sensing resistor between this
pin and VM
11 NC Not connected Not wired
12 NC Not connected Not wired
Pin Assignment for PWM in Data Mode
D MODE 1 → GA+ (OUT A, A)
D MODE 2 → GA− (OUT A, A)
D MODE 3 → GB+ (OUT B, B)
CW/CCW → GB− (OUT B, B)
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Pin Description 2
Pin Number Pin Name Function Remarks
13 VM Motor power supply monitor pin Connect to motor power supply
14 STANDBY All-function-initializing and Low Power
Dissipation mode pin
H: Normal operation
L: Operation halted
Charge pump output halted
15 Ccp A
Pin connecting capacitor for boosting output
stage drive power supply (storage side
connected to GND)
Connect capacitor for charge pump (storage
side) VM and VDD are generated.
16 Ccp B Pin connecting capacitor for boosting output
stage drive power supply
Connect capacitor for charge pump (charging
side) between this pin and Ccp C
17 Ccp C (charging side) Connect capacitor for charge pump (charging
side) between this pin and Ccp B
18 MO Electrical angle (0°) monitor pin
Outputs High level in 4W1-2, 2W1-2, W1-2, or
1-2 Phase Excitation mode with electrical angle
of 0° (phase B: 100%, phase A: 0%)
In 2-Phase Excitation mode, outputs High level
with electrical angle of 0° (phase B: 100%,
phase A: 100%)
19 PROTECT TSD operation detector pin Detects thermal shut down (TSD) and outputs
High level
20 TORQUE 1
21 TORQUE 2
Motor torque switch setting pin
Torque 2, 1 = HH: 100%
LH: 85%
HL: 70%
LL: 50%
22 OUT A Channel A output pin ⎯
23 MDT 1
24 MDT 2
Mixed Decay mode setting pins
MDT 2, 1 = HH: 100%
HL: 75%
LH: 37.5%
LL: 12.5%
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Pin Description 3
Pin Number Pin Name Function Remarks
25 NC Not connected Not wired
26 OUT A Channel A output pin ―
27 PGND Power ground pin Connect all power ground pins and VSS to GND.
FIN F
IN Logic ground pin The pin functions as a heat sink. Design pattern
taking heat into consideration.
28 PGND Power ground pin Connect all power ground pins to GND.
29 OUT B Channel B output pin ―
30 NC Not connected Not wired
31 DATA MODE Clock input and PWM
H: Controls external PWM.
L: CLK-IN mode
We recommend this pin normally be used as
CLK-IN mode pin (Low).
In PWM mode, functions such as constant
current control do not operate. Fix DATA MODE
at the L level.
32 RESET Initializes electrical angle.
Forcibly initializes electrical angle.
At this time we recommend ENABLE pin be set
to Low to prevent miss operation.
H: Resets electrical angle.
L: Normal operation
33 OUT B Channel B output pin ⎯
34 ENABLE Output enable pin Forcibly turns all output transistors off.
35 CLK Inputs CLK for determining number of motor
rotations.
Electrical angle is incremented by one for each
CLK input.
CLK is reflected at rising edge.
36 CR Chopping reference frequency reference pin (for
setting chopping frequency) Determines chopping frequency.
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1. Function of CW/CCW
CW/CCW switches the direction of stepping motor rotation.
Input Function
H Forward (CW)
L Reverse (CCW)
2. Function of MDT X
MDT X specifies the current attenuation speed at constant current control.
The larger the rate (%), the larger the attenuation of the current. Also, the peak current value (current
ripple) becomes larger. (Typical value is 37.5%.)
MDT 2 MDT 1 Function
L L 12.5% Mixed Decay mode
L H 37.5% Mixed Decay mode
H L 75% Mixed Decay mode
H H 100% Mixed Decay mode (Fast Decay mode)
3. Function of TORQUE X
TORQUE X changes the current peak value in four steps. Used to change the value of the current used,
for example, at startup and fixed-speed rotation.
TORQUE 2 TORQUE 1 Comparator Reference Voltage
H H 100%
L H 85%
H L 70%
L L 50%
4. Function of RESET (forced initialization of electrical angle)
With the CLK input method (decoder method), unless CLKs are counted, except MO, where the electrical
angle is at that time not known. Thus, this method is used to forcibly initialize the electrical angle.
For example, it is used to change the excitation mode to another drive mode during output from MO
(electrical angle = 0°).
Input Function
H Initializes electrical angle to 0°
L Normal operation
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5. Function of ENABLE (output operation)
ENABLE forcibly turns OFF all output transistors at operation.
Data such as electrical angle and operating mode are all retained.
Input Function
H Operation enabled (active)
L Output halted (operation other than output active)
6. Function of
STANDBY
STANDBY halts the charge pump circuit (power supply booster circuit) as well as halts output.
We recommend setting to Standby mode at power on.
(At this time, data on the electrical angle are retained.)
Input Function
H Operation enabled (active)
L Output halted (Low Power Dissipation mode)Charge pump halted
7. Functions of D Mode X (Excitation Mode )
8. Function of DATA MODE
DATA MODE switches external duty control (forced PWM control) and constant current
CLK-IN control. In Phase mode, H-bridge can be forcibly inverted and output only can be
turned off. Constant current drive including micro-step drive can only be controlled in CLK-IN mode.
Input Function
H PHASE MODE
L CLK-IN MODE
Note : Normally, use CLK-IN mode.
Excitation Mode D Mode 3 D Mode 2 D Mode 1 Remarks
1 Low Power Dissipation mode L L L ( Standby mode ) Charge pump halted
2 Motor Lock mode L L H Locks only at 0° electrical angle.
3 2-Phase Excitation mode L H L 45° → 135° → 225° → 315° → 45°
4 1-2 Phase Excitation (A) L H H 0%, 100% type 1-2 Phase Excitation
5 1-2 Phase Excitation (B) H L L 0%, 71%, 100% type 1-2 Phase Excitation
6 W1-2 Phase Excitation H L H 2-bit micro-step change
7 2W1-2 Phase Excitation H H L 3-bit micro-step change
8 4W1-2 Phase Excitation H H H 4-bit micro-step change
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9. Electrical Angle Setting immediately after Initialization
In Initialize mode (immediately after RESET is released), the following currents are set.
In Low Power Dissipation mode, the internal decoder continues incrementing the electrical angle but
current is not output.
Note that the initial electrical angle value in 2-Phase Excitation mode differs from that in nW1-2 (n = 0,
1, 2, 4) Phase Excitation mode.
Excitation Mode IB (%) IA (%) Remarks
1 Low Power Dissipation mode 100 0 Electrical angle incremented but no current output
2 Motor Lock mode 100 0 Electrical angle incremented but no motor rotation
due to no IA output
3 2-Phase Excitation 100 100 45°
4 1-2 Phase Excitation (A) 100 0 0°
5 1-2 Phase Excitation (B) 100 0 0°
6 W1-2 Phase Excitation 100 0 0°
7 2W1-2 Phase Excitation 100 0 0°
8 4W1-2 Phase Excitation 100 0 0°
Note : Where, IB = 100% and IA = 0%, the electrical angle is 0°. Where, IB = 0% and IA = 100%,
the electrical angle is +90°.
10. Function of DATA MODE (Phase A mode used for explanation)
DATA MODE inputs the external PWM signal (duty signal) and controls the current. Functions such as
constant current control and overcurrent protector do not operate.
Use this mode only when control cannot be performed in CLK-IN mode.
GA+ GA− Output State
(1) L L Output off
(2) L H A+ phase: Low A− phase: High
(3) H L A+ phase: High A− phase: Low
(4) H H Output off
Note: Output is off at (1) and (4).
D MODE 1 → GA+ (OUT A, A)
D MODE 2 → GA− (OUT A, A)
D MODE 3 → GB+ (OUT B, B)
CW/CCW → GB− (OUT B, B)
U1
L1
U2
L2
OFF
OFF
PGND
OFF
OFF
(1)･(4)
U1
L1
U2
L2
OFF
OFF
ON
ON
(Note)
Load
PGND
(2)
U1
L1
U2
L2
OFF
OFF
ON
ON
(Note)
Load
PGND
(3)
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Absolute Maximum Ratings (Ta = 25°C)
Characteristics Symbol Rating Unit
Logic supply voltage VDD 7 V
Motor supply voltage VM 40
V
Output current (Note 1) IOUT 1.8 A/phase
Current detect pin voltage VRS V
M ± 4.5 V V
Charge pump pin maximum voltage
(CCP1 Pin) VH V
M + 7.0 V
Logic input voltage (Note 2) VIN -0.4~ VDD+ 0.4 V
(Note 3) 1.4
Power dissipation
(Note 4)
PD
3.2
W
Operating temperature Topr −40 to 85 °C
Storage temperature Tstg −55 to 150 °C
Junction temperature Tj 150 °C
Note 1: Perform thermal calculations for the maximum current value under normal conditions. Use the IC at 1.5 A or
less per phase.
The current value may be controlled according to the ambient temperature or board conditions.
Note 2: Input 7 V or less as VIN.
Note 3: Measured for the IC only. (Ta = 25°C)
Note 4: Measured when mounted on the board. (Ta = 25°C)
Ta: IC ambient temperature
Topr: IC ambient temperature when starting operation
Tj: IC chip temperature during operation. Tj (max) is controlled by TSD (thermal shut down circuit).
Operating Conditions (Ta = 0 to 85°C, (Note 5))
Characteristics Symbol Test Condition Min Typ. Max Unit
Power supply voltage VDD ⎯ 4.5 5.0 5.5 V
Motor supply voltage VM VDD = 5.0 V, Ccp1 = 0.22 μF,
Ccp2 = 0.022 μF 13 24 34 V
Output current IOUT (1) Ta = 25°C, per phase ⎯ 1.2 1.5 A
Logic input voltage VIN ⎯ GND ⎯ V
DD V
Clock frequency fCLK V
DD = 5.0 V ⎯ 1.0 150 KHz
Chopping frequency fchop V
DD = 5.0 V 50 100 150 KHz
Reference voltage Vref V
M = 24 V, Torque = 100% 2.0 3.0 VDD V
Current detect pin voltage VRS V
DD = 5.0 V 0 ±1.0 ±4.5 V
Note 5: Because the maximum value of Tj is 120°C, please design the maximum current to the value from which Tj
becomes under 120°C.
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Electrical Characteristics 1 (Ta = 25°C, VDD = 5 V, VM = 24 V, unless otherwise specified)
Characteristics Symbol
Test
Circuit Test Condition Min Typ. Max Unit
HIGH VIN (H) 2.0 VDD VDD
+ 0.4
Input voltage
LOW VIN (L)
⎯ Data input pins
GND
− 0.4 GND 0.8
V
Input hysteresis voltage VIN (HIS) ⎯ Data input pins 200 400 700 mV
IIN (H) Data input pins with resistor 35 50 75
IIN (H) ⎯ ⎯ 1.0
Input current
IIN (L)
⎯
Data input pins without resistor
⎯ ⎯ 1.0
μA
IDD1
VDD = 5 V (STROBE, RESET,
DATA = L), RESET = L, Logic,
output all off
1.0 2.0 3.0
Power dissipation (VDD Pin)
IDD2
⎯
Output OPEN, fCLK = 1.0 kHz
LOGIC ACTIVE, VDD = 5 V,
Charge Pump = charged
1.0 2.5 3.5
mA
IM1
Output OPEN (STROBE,
RESET, DATA = L), RESET =
L, Logic, output all off, Charge
Pump = no operation
1.0 2.0 3.0
IM2
Output OPEN, fCLK = 1 kHz
LOGIC ACTIVE, VDD = 5 V,
VM = 24 V, Output off,
Charge Pump = charged
2.0 4.0 5.0
Power dissipation (VM Pin)
IM3
⎯
Output OPEN, fCLK = 4 kHz
LOGIC ACTIVE, 100 kHz
chopping (emulation), Output
OPEN,
Charge Pump = charged
⎯ 10 13
mA
Output standby current Upper IOH ⎯
VRS = VM = 24 V, VOUT = 0 V,
STANDBY = H, RESET = L,
CLK = L
−200 −150 ⎯ μA
Output bias current Upper IOB ⎯ VOUT = 0 V, STANDBY = H,
RESET= L, CLK = L −100 −50 ⎯ μA
Output leakage current Lower IOL ⎯ VRS = VM = CcpA = VOUT
= 24 V, LOGIC IN = ALL = L ⎯ ⎯ 1.0 μA
HIGH
(Reference) VRS (H) Vref = 3.0 V, Vref (Gain) = 1/5.0
TORQUE = (H) = 100% set ⎯ 100 ⎯
MID
HIGH VRS (MH) Vref = 3.0 V, Vref (Gain) = 1/5.0
TORQUE = (MH) = 85% set 83 85 87
MID
LOW VRS (ML) Vref = 3.0 V, Vref (Gain) = 1/5.0
TORQUE = (ML) = 70% set 68 70 72
Comparator reference
voltage ratio
LOW VRS (L)
⎯
Vref = 3.0 V, Vref (Gain) = 1/5.0
TORQUE = (L) = 50% set 48 50 52
%
Output current differential ΔIOUT1 ⎯ Differences between output
current channels −5 ⎯ 5 %
Output current setting differential ΔIOUT2 ⎯ IOUT = 1000 mA −5 ⎯ 5 %
RS pin current IRS ⎯ VRS = 24 V, VM = 24 V,
RESET= L (RESET state) ⎯ 1 2 μA
RON (D-S) 1 IOUT = 1.0 A, VDD = 5.0 V
Tj = 25°C, Drain-Source ⎯ 0.5 0.6
RON (D-S ) 1 IOUT = 1.0 A, VDD = 5.0 V
Tj = 25°C, Source-Drain ⎯ 0.5 0.6
RON (D-S) 2 IOUT = 1.0 A, VDD = 5.0 V
Tj = 105°C, Drain-Source ⎯ 0.6 0.75
Output transistor drain-source
ON-resistance
RON (D-S ) 2
⎯
IOUT = 1.0 A, VDD = 5.0 V
Tj = 105°C, Source-Drain ⎯ 0.6 0.75
Ω
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Electrical Characteristics 2 (Ta = 25°C, VDD = 5 V, VM = 24 V, IOUT = 1.0 A)
Characteristics Symbol
Test
Circuit Test Condition Min Typ. Max Unit
θA = 90 (θ16) ⎯ 100 ⎯
θA = 84 (θ15) ⎯ 100 ⎯
θA = 79 (θ14) 93 98 ⎯
θA = 73 (θ13) 91 96 ⎯
θA = 68 (θ12) 87 92 97
θA = 62 (θ11) 83 88 93
θA = 56 (θ10) 78 83 88
θA = 51 (θ9) 72 77 82
θA = 45 (θ8) 66 71 76
θA = 40 (θ7) 58 63 68
θA = 34 (θ6) 51 56 61
θA = 28 (θ5) 42 47 52
θA = 23 (θ4) 33 38 43
θA = 17 (θ3) 24 29 34
θA = 11 (θ2) 15 20 25
θA = 6 (θ1) 5 10 15
Chopper current Vector ⎯
θA = 0 (θ0)
⎯
⎯ 0 ⎯
%
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Electrical Characteristics 3 (Ta = 25°C, VDD = 5 V, VM = 24 V, unless otherwise specified)
Characteristics Symbol
Test
Circuit Test Condition Min Typ. Max Unit
Vref input voltage Vref 9
VM = 24 V, VDD = 5 V,
STANDBY = H, RESET = L,
Output on, CLK = 1 kHz
2.0 ⎯ V
DD V
Vref input current Iref 9
STANDBY = H, RESET = L,
Output on, VM = 24 V,
VDD = 5 V, Vref = 3.0 V
20 35 50 μA
Vref attenuation ratio Vref (GAIN) —
VM = 24 V, VDD = 5 V,
STANDBY = H, RESET= L,
Output on,
Vref = 2.0 to VDD − 1.0 V
1/4.8 1/5.0 1/5.2 ⎯
TSD temperature (Note 1) TjTSD — VDD = 5 V, VM = 24 V 130 ⎯ 170 °C
TSD return temperature difference
(Note 1)
ΔTjTSD — TjTSD = 130 to 170°C TjTSD
− 50
TjTSD
− 35
TjTSD
− 20 °C
VDD return voltage VDDR 10 VM = 24 V, STANDBY = H 2.0 3.0 4.0 V
VM return voltage VMR 11 VDD = 5 V, STANDBY = H 2.0 3.5 5.0 V
Over current protected circuit
operation current (Note 2) ISD — VDD = 5 V, VM = 24 V ⎯ 3.0 ⎯ A
High temperature monitor pin
output current Iprotect 12
VDD = 5 V,
TSD = operating condition 1.0 3.0 5.0 mA
Electrical angle monitor pin output
current IMO 12
VDD = 5 V,
electrical angle = 0°
(IB = 100%, IA = 0%)
1.0 3.0 5.0 mA
Vprotect (H) 12
VDD = 5 V,
TSD = operating condition ⎯ ⎯ 5.0
High temperature monitor pin
output voltage
Vprotect (L) —
VDD = 5 V,
TSD = not operating
condition
0.0 ⎯ ⎯
V
VMO2 (H) 12
VDD = 5 V,
electrical angle = except 0°
(IB = 100%,
IA = Except 0% set)
⎯ ⎯ 5.0
Electrical angle monitor pin output
voltage
VMO2 (L) —
VDD = 5 V,
electrical angle = 0°
(IB = 100%, IA = 0%)
0.0 ⎯ ⎯
V
Note 1: Thermal shut down circuit (TSD)
When the IC junction temperature reaches the specified value and the TSD circuit is activated, the internal
reset circuit is activated switching the outputs of both motors to off.
When the temperature is set between 130°C (min) to 170°C (max), the TSD circuit operates. When the TSD
is activated, the output of motors is stopped until the stand-by function is reset.
When the TSD circuit is activated, the charge pump is halted, and PROTECT pin outputs VDD voltage.
Even if the TSD circuit is activated and Standby goes H → L → H instantaneously, the IC is not reset until
the IC junction temperature drops −20°C (typ.) below the TSD operating temperature (hysteresis function).
Note 2: Overcurrent protection circuit (ISD)
When current exceeding the specified value flows to the output, the internal reset circuit is activated, and the
ISD turns off the output.
Until the Standby signal goes Low to High, the overcurrent protection circuit remains activated.
During ISD, IC turns Standby mode and the charge pump halts.
TB62209FG
2010-07-02 19
AC Characteristics (Ta = 25°C, VM = 24 V, VDD = 5 V, 6.8 mH/5.7Ω)
Characteristics Symbol
Test
Circuit Test Condition Min Typ. Max Unit
Clock frequency fCLK — ⎯ ⎯ ⎯ 120 kHz
tw (tCLK) — ⎯ 100 ⎯ ⎯
twp — ⎯ 50 ⎯ ⎯
Minimum clock pulse width
twn — ⎯ 50 ⎯ ⎯
ns
tr — Output Load: 6.8 mH/5.7 Ω ⎯ 100 ⎯
tf — ⎯ ⎯ 100 ⎯
tpLH — CLK to OUT ⎯ 1000 ⎯
tpHL — Output Load: 6.8 mH/5.7 Ω ⎯ 2000 ⎯
tpLH — CR to OUT ⎯ 500 ⎯
Output transistor switching
characteristic
tpHL — Output Load: 6.8 mH/5.7 Ω ⎯ 1000 ⎯
ns
tr — ⎯ ⎯ 20 ⎯
tf — ⎯ ⎯ 20 ⎯
tpLH — ⎯ ⎯ 20 ⎯
Transistor switching characteristics
(MO, PROTECT)
tpHL — ⎯ ⎯ 20 ⎯
ns
Noise rejection dead band time tBRANK — IOUT = 1.0 A 200 300 400 ns
CR reference signal oscillation
frequency fCR — Cosc = 560 pF, Rosc = 3.6 kΩ ⎯ 800 ⎯ kHz
Chopping frequency range
fchop (min)
fchop (max)
—
VM = 24 V, VDD = 5 V,
Output ACTIVE (IOUT = 1.0 A)
Step fixed, Ccp1 = 0.22 μF,
Ccp2 = 0.022 μF
40 100 150 kHz
Chopping frequency fchop —
Output ACTIVE (IOUT = 1.0 A),
CR CLK = 800 kHz ⎯ 100 ⎯ kHz
Charge pump rise time tONG —
Ccp = 0.22 μF, Ccp = 0.022 μF
VM = 24 V, VDD = 5 V,
STANDBY = ON L→ H
⎯ 100 200 μs
TB62209FG
2010-07-02 20
11. Current Waveform and Setting of Mixed Decay Mode
At constant current control, in current amplitude (pulsating current) Decay mode, a point from 0 to 3 can
be set using 2-bit parallel data.
NF is the point where the output current reaches the set current value. RNF is the timing for monitoring
the set current.
The smaller the MDT value, the smaller the current ripple (peak current value). Note that current decay
capability deteriorates.
NF
fchop
12.5%
MIXED
DECAY
MODE
CR pin
internal
CLK
waveform
Charge mode → NF: set current value reached → Slow mode
→ Mixed decay timing → Fast mode → current monitored
(when set current value > output current) Charge mode
NF
RNF
Set current value
RNF
MDT
DECAY MODE 0
37.5%
MIXED
DECAY
MODE
Charge mode → NF: set current value reached → Slow mode
→ Mixed decay timing → Fast mode → current monitored
(when set current value > output current) Charge mode
RNF
Set current value DECAY MODE 1
75%
MIXED
DECAY
MODE
Charge mode → NF: set current value reached → Slow mode
→ Mixed decay timing → Fast mode → current monitored
(when set current value > output current) Charge mode
RNF
Set current value
MDT
NF
DECAY MODE 2
FAST
DECAY
MODE
Fast mode → RNF: current monitored (when set current value
> output current) Charge mode → Fast mode RNF
Set current value
DECAY MODE 3
100% 75% 50% 25% 0
MDT
TB62209FG
2010-07-02 21
12. CURRENT MODES
(MIXED (SLOW + FAST) DECAY MODE Effect)
○ Current value in increasing (Sine wave)
○ Sine wave in decreasing (When using MIXED DECAY Mode with large attenuation ratio (MDT%) at
attenuation)
○ Sine wave in decreasing (When using MIXED DECAY Mode with small attenuation ratio (MDT%) at
attenuation)
If RNF, current watching point, was the set current value (output current) in the mixed decay mode and
in the fast decay mode, there is no charge mode but the slow + fast mode (slow to fast is at MDT) in the
next chopping cycle.
Note: The above charts are schematics. The actual current transient responses are curves.
Slow Slow
Slow Slow
Fast Fast
Charge
Charge
FastCharge
Fast Charge
Set current
value
Set current
value
Set current
value
Set current
value
Slow Slow
Fast
Charge
Fast
Charge
Slow
Fast
Slow
Fast
Charge
Because current attenuates so quickly, the current
immediately follows the set current value.
Set current
value
Set current
value
Slow
Fast
Charge
Slow
Fast
Charge
Fast
Slow
Fast
Slow
Because current attenuates slowly, it takes a long time
for the current to follow the set current value (or the
current does not follow).
TB62209FG
2010-07-02 22
13. MIXED DECAY MODE waveform (Current Waveform)
• When NF is after MIXED DECAY TIMING
• In MIXED DECAY MODE, when the output current > the set current value
NF
NF
25%
MIXED
DECAY
MODE
IOUT
fchop fchop
Set current
value
CLK signal input
fchop
MDT (MIXED DECAY TIMING) point
Set current value
RNF
RNF
Because of the set current value > the
output current, no CHARGE MODE in the
next cycle.
NF
NF
25%
MIXED
DECAY
MODE
IOUT
fchop fchop
Set current
value
Set current value
NF
MDT (MIXED DECAY TIMING) point
CLK signal input
Fast Decay mode after Charge mode
RNF
NF
NF
25%
MIXED
DECAY
MODE
Internal
CR CLK
signal
IOUT
fchop fchop
Set current
value
Set current value
RNF
MDT (MIXED DECAY TIMING) point
TB62209FG
2010-07-02 23
14. FAST DECAY MODE waveform
The output current to the motor is in supply voltage mode after the current value set by Vref, RRS, or
Torque reached at the set current value.
fchop
CLK signal input
FAST
DECAY
MODE
(100%
MIXED
DECAY
MODE)
Set current
value
IOUT
NF
Because of the set current value > the
output current, CHARGE MODE → NF →
FAST DECAY MODE in the next cycle.
Because of the set current value > the
output current, FAST DECAY MODE in the
next cycle. (Charge cancel function)
RNF
RNF
RNF
Set current value
TB62209FG
2010-07-02 24
12.5％ MIXED DECAY MODE
15. CLK SIGNAL, INTERNAL CR CLK, AND OUTPUT CURRENT waveform
(When CLK signal is input in SLOW DECAY MODE)
When CLK signal is input, the chopping counter (CR-CLK counter) is forced to reset at the next CR-CLK
timing.
Because of this, compared with a method in which the counter is not reset, response to the input data is
faster.
The delay time, the theoretical value in the logic portion, is expected to be a one-cycle CR waveform: 5 μs
at 100 kHz CHOPPING.
When the CR counter is reset due to CLK signal input, CHARGE MODE is entered momentarily due to
current comparison.
Note: In FAST DECAY MODE, too, CHARGE MODE is entered momentarily due to current comparison.
CLK signal input
Set current value
IIOUT
IOUT
RNF
Set current value
fchop
Internal
CR CLK
si
g
nal
Momentarily enters CHARGE MODE
Reset CR-CLK counter here
NF
RNF
MDT
NF
MDT
fchop fchop
TB62209FG
2010-07-02 25
16. CLK SIGNAL, INTERNAL CR CLK, AND OUTPUT CURRENT waveform
(When CLK signal is input in CHARGE MODE)
12.5％ MIXED DECAY MODE
CLK signal input
Set current
value
IOUT
RNF
Set current value
fchop
Internal
CR CLK
signal
Momentarily enters CHARGE MODE
Reset CR-CLK counter here
NF
RNF
MDT
MDT
fchop fchop
TB62209FG
2010-07-02 26
12.5％ MIXED DECAY MODE
17. CLK SIGNAL, INTERNAL CR CLK, AND OUTPUT CURRENT waveform
(When CLK signal is input in FAST DECAY MODE)
NF
CLK signal input
Set current
value
IOUT
RNF
Set current value
fchop
Internal
CR CLK
signal
Momentarily enters CHARGE MODE
Reset CR-CLK counter here
fchop fchop
MDT
NF
RNF
MDT
MDT
TB62209FG
2010-07-02 27
18. CLK SIGNAL, INTERNAL CR CLK, AND OUTPUT CURRENT waveform
(When CLK signal is input in 2 EXCITATION MODE)
12.5％ MIXED DECAY MODE
CLK signal input
fchop
Reset CR-CLK counter here
fchop fchop
Set current
value
IOUT
RNF
Set current value
NF
RNF
0
MDT
NF
TB62209FG
2010-07-02 28
Current Discharge Path when ENABLE=L Input During Operation
In Slow Mode, when all output transistors are forced to switch off, coil energy is discharged in the
following MODES:
Note: Parasitic diodes are located on dotted lines. In normal MIXED DECAY MODE, the current does not flow
to the parasitic diodes.
As shown in the figure at above, an output transistor has parasitic diodes.
To discharge energy from the coil, each transistor is switched on allowing current to flow in the reverse
direction to that of normal operation. As a result, the parasitic diodes are not used. If all the output
transistors are forced to switch off, the energy of the coil is discharged via the parasitic diodes.
U1
L1
U2
L2
PGND
OFF
OFF
U1
L1
U2
L2
OFF
ON
(Note)
Load
PGND
U1
L1
U2
L2
OFF
OFF
(Note)
Load
PGND
(Note)
RS pin
RRS
VM
ON
ON
Load
Charge mode Slow mode Forced OFF mode
ON
RS pin
RRS
VM
RS pin
RRS
VM
OFF
OFF
Input ENABLE=L
OFF
TB62209FG
2010-07-02 29
Output Transistor Operating Mode
Output Transistor Operation Functions
CLK U1 U2 L1 L2
CHARGE ON OFF OFF ON
SLOW OFF OFF ON ON
FAST OFF ON ON OFF
Note: The above table is an example where current flows in the direction of the arrows in the above figures.
When the current flows in the opposite direction of the arrows, see the table below.
CLK U1 U2 L1 L2
CHARGE OFF ON ON OFF
SLOW OFF OFF ON ON
FAST ON OFF OFF ON
U1
L1
U2
L2
PGND
OFF
OFF
U1
L1
U2
L2
OFF
ONON
(Note)
Load
PGND
U1
L1
U2
L2
(Note)
Load
PGND
(Note)
RS pin
RRS
VM
ON
ON
Load
Charge mode Slow mode Fast mode
ON
RS pin
RRS
VM
RS pin
RRS
VM
OFF
OFF ON
OFF
TB62209FG
2010-07-02 30
Power Supply Sequence (Recommended)
Note 1: If the VDD drops to the level of the VDDR or below while the specified voltage is input to the VM pin, the IC is
internally reset.
This is a protective measure against malfunction. Likewise, if the VM drops to the level of the VMR or below
while regulation voltage is input to the VDD, the IC is internally reset as a protective measure against
malfunction.
To avoid malfunction, when turning on VM or VDD, to input the Standby signal at the above timing is
recommended.
It takes time for the output control charge pump circuit to stabilize. Wait up to tONG time after power on
before driving the motors.
Note 2: When the VM value is between 3.3 to 5.5 V, the internal reset is released, thus output may be on. In such a
case, the charge pump cannot drive stably because of insufficient voltage. The Standby state should be
maintained until VM reaches 13 V or more.
Note 3: Since VDD = 0 V and VM = voltage within the rating are applied, output is turned off by internal reset.
At that time, a current of several mA flows due to the Pass between VM and VDD.
When voltage increases on VDD output, make sure that specified voltage is input.
VDD (max)
VDD (min)
VDDR
GND
VDD
VM
VM (min)
VMR
GND
VM
NON-RESET
RESET
Internal reset
H
L
STANDBY
INPUT (Note 1)
Takes up to tONG until operable.
Non-operable area
STANDBY
TB62209FG
2010-07-02 31
How to Calculate Set Current
This IC controls constant current in CLK-IN mode.
At that time, the maximum current value (set current value) can be determined by setting the sensing
resistor (RRS) and reference voltage (Vref).
1/5.0 is Vref (gain): Vref attenuation ratio. (For the specifications, see the electrical characteristics.)
For example, when inputting Vref = 3 V and torque = 100% to output IOUT = 0.8 A, RRS = 0.75 Ω (0.5 W
or more) is required.
How to Calculate the Chopping and OSC Frequencies
At constant current control, this IC chops frequency using the oscillation waveform (saw tooth waveform)
determined by external capacitor and resistor as a reference.
The TB62209FG requires an oscillation frequency of eight times the chopping frequency.
The oscillation frequency is calculated as follows:
C)600R(C0.523
1
fCR ×+××
=
For example, when Cosc = 560 pF and Rosc = 3.6 kΩ are connected, fCR = 813 kHz.
At this time, the chopping frequency fchop is calculated as follows:
fchop = fCR/8 = 101 kHz
When determining the chopping frequency, make the setting taking the above into consideration.
IC Power Dissipation
IC power dissipation is classified into two: power consumed by transistors in the output block and power
consumed by the logic block and the charge pump circuit.
• Power consumed by the Power Transistor (calculated with RON = 0.60 Ω)
In Charge mode, Fast Decay mode, or Slow Decay mode, power is consumed by the upper and lower
transistors of the H bridges.
The following expression expresses the power consumed by the transistors of an H bridge.
P (out) = 2 (Tr) × IOUT (A) × VDS (V) = 2 × IOUT2 × RON..............................(1)
The average power dissipation for output under 4-bit micro step operation (phase difference between
phases A and B is 90°) is determined by expression (1).
Thus, power dissipation for output per unit is determined as follows (2) under the conditions below.
RON = 0.60 Ω (@ 1.0 A)
IOUT (Peak: max) = 1.0 A
VM = 24 V
VDD = 5 V
P (out) = 2 (Tr) × 1.02 (A) × 0.60 (Ω) = 1.20 (W)..............................................(2)
Power consumed by the logic block and IM
The following standard values are used as power dissipation of the logic block and IM at operation.
I (LOGIC) = 2.5 mA (typ.):
I (IM3) = 10.0 mA (typ.): operation/unit
I (IM1) = 2.0 mA (typ.): stop/unit
The logic block is connected to VDD (5 V). IM (total of current consumed by the circuits connected to
VM and current consumed by output switching) is connected to VM (24 V). Power dissipation is
calculated as follows:
P (Logic&IM) = 5 (V) × 0.0025 (A) + 24 (V) × 0.010 (A) = 0.25 (W) ...............(3)
Thus, the total power dissipation (P) is
P = P (out) + P (Logic&IM) = 1.45 (W)
Power dissipation at standby is determined as follows:
P (standby) + P (out) = 24 (V) × 0.002 (A) + 5 (V) × 0.0025 (A) = 0.06 (W)
For thermal design on the board, evaluate by mounting the IC.
100%)(
RS
R
50%) 70, 85, 100, (Torque Torque
(V)
ref
V
5.0
1
(max) OUT
I
×Ω
=
××=
TB62209FG
2010-07-02 32
Test Waveforms
CK
tCK t
CK
tpLH
tpHL
VM
GND
tr t
f
10%
50%
90% 90%
50%
10%
Figure 1 Timing Waveforms and Names
TB62209FG
2010-07-02 33
OSC-charge delay:
Because the rising edge level of the OSC waveform is used for converting the OSC waveform to the
internal CR CLK, a delay of up to 1.25 ns (@fchop = 100 kHz: fCR = 400 kHz) occurs between the OSC
waveform and the internal CR CLK.
tchop
OSC-Charge Delay
H
L
Set current
OSC-Fast Delay
OSC (CR)
50%
50%
L
H
H
L
L
Charge
50%
Slow Fast
OUTPUT
Voltage A
OUTPUT
Voltage A
OUTPUT
Current
CR Waveform
Internal CR CLK
Waveform
CR-CR CLK delay
Figure 2 Timing Waveforms and Names (CR and output)
TB62209FG
2010-07-02 34
Relationship between Drive Mode Input Timing and MO
• If drive mode input changes before MO timing
Parallel set signal is reflected.
• If drive mode input changes after MO timing
Parallel set signal occurs after the rising edge of CLK, therefore, it is not reflected. The drive mode is
changed when the electrical angle becomes 0°.
Note: The TB62209FG uses the drive mode change reserve method to prevent the motor from step out
when changing drive modes.
Note that the following rules apply when switching drive modes at or near the MO signal output
timing.
Drive Mode Input
Internal Reflection (1)
Drive Mode Input
Waveform (1)
Drive Mode Input
Internal Reflection (2)
Drive Mode Input
Waveform (2)
CLK Waveform
MO Waveform
The setting of the motor drive mode changes.
The motor drive mode changes.
The setting of the motor drive mode changes.
In this case, the drive mode is changed when the electrical
angle becomes 0°.
TB62209FG
2010-07-02 35
Reflecting Points of Signals
Point where Drive Mode
Setting Reflected
(area of 1 in figure)
CW/CCW
2-Phase Excitation mode 45° (MO)
Before half-clock of phase
B = phase A = 100%
At rising edge of CLK input
1-2 Phase Excitation mode
W1-2 Phase Excitation
mode
2W1-2 Phase Excitation
mode
4W1-2 Phase Excitation
mode
0° (MO)
Before half-clock of phase
B = 100%
At rising edge of CLK input
Other parallel set signals can be changed at any time (they are reflected immediately).
Recommended Point for Switching Drive Mode
MO Waveform
CLK Waveform
When Drive Mode
Data Switching
can be Input
During MO output (phase data halted: the area of 3 above) to forcibly switch drive modes, a function to
set RESET = High and to initialize the electrical angle is required.
1 2
3
In the area 2, the drive of the motor doesn't change
even if the input signal of driving mode data switch
t
Driving mode input in the area
of 1 in figure is reflected.
TB62209FG
2010-07-02 36
PD – Ta (Package power dissipation)
(1) HSOP36 Rth (j-a) (96°C/W)
(2) When mounted on the board (140 mm × 70 mm × 1.6 mm: 38°C/W: typ.)
Note: Rth (j-a): 8.5°C/W
Ambient temperature Ta (°C)
PD – Ta
Power dissipation PD (W)
(2)
(1)
0
0
3.5
25 50 75 100 125 150
0.5
1
1.5
2
2.5
3
TB62209FG
2010-07-02 37
Relationship between VM and VH (charge pump voltage)
Note: VDD = 5 V
Ccp 1 = 0.22 μF, Ccp 2 = 0.022 μF, fchop = 150 kHz
(Be aware the temperature changes of capacitance of charge pump capacitor.)
VM – VH (&Vcharge UP)
VH voltage, charge up voltage (V)
S
upp
l
y vo
l
tage
V
M
(V)
Charge pump voltage VH = VDD + VM (= Ccp A) (V)
10
20
0
0
V
H voltage charge up voltage VM voltage
2 3 10 20 30 404 5 6 7 8 9 11 12 13 14 15 16 17 18 21 22 23 24 25 2619 27 28 29 31 32 33 34 35 36 37 38 39 1
30
40
50
Maximum rating
Maximum rating
Operation area
Usable area
Charge pump
voltage
VM voltage
VMR
Input STANDBY
TB62209FG
2010-07-02 38
Operation of Charge Pump Circuit
• Initial charging
(1) When RESET is released, Tr1 is turned ON and Tr2 turned OFF. Ccp 2 is charged from VM via
Di1.
(2) Tr1 is turned OFF, Tr2 is turned ON, and Ccp 1 is charged from Ccp 2 via Di2.
(3) When the voltage difference between VM and VH (Ccp A pin voltage = charge pump voltage)
reaches VDD or higher, operation halts (Steady state).
• Actual operation
(4) Ccp 1 charge (i2) is used at fchop switching and the VH potential drops.
(5) Charges up by (1) and (2) above.
Output switching
Initial charging Steady state
(1) (2) (3) (4)
t
(5) (4) (5)
VH
VM
VH = VM + VDD = charge pump voltage
i1 = charge pump current
i2 = gate block power dissipation
VDD = 5 V
VM = 24 V
Comparator
&
Controller
VM
Output
Output
H switch
i2
Ccp 1
0.22 μF
Ccp A
Ccp B
Ccp C
R1
VH
RS
RRS
Ccp 2
0.022 μF
Di2
Di1
Di3
Vz
i1
(2)
Tr1
Tr2
(1)
(2)
TB62209FG
2010-07-02 39
Charge Pump Rise Time
tONG:
Time taken for capacitor Ccp 2 (charging capacitor) to fill up Ccp 1 (storing capacitor) to VM + VDD after
a reset is released.
The internal IC cannot drive the gates correctly until the voltage of Ccp 1 reaches VM + VDD. Be sure to
wait for tONG or longer before driving the motors.
Basically, the larger the Ccp 1 capacitance, the smaller the voltage fluctuation, though the initial charge
up time is longer.
The smaller the Ccp 1 capacitance, the shorter the initial charge-up time but the voltage fluctuation is
larger.
Depending on the combination of capacitors (especially with small capacitance), voltage may not be
sufficiently boosted.
When the voltage does not increase sufficiently, output DMOS RON turns lower than the normal, and it
raises the temperature.
Thus, use the capacitors under the capacitor combination conditions (Ccp 1 = 0.22 μF, Ccp 2 = 0.022 μF)
recommended by Toshiba.
50%
VDD + VM
VM + (VDD × 90%)
Ccp 1 voltage
VM
5 V
0 V
STANDBY
tONG
TB62209FG
2010-07-02 40
External Capacitor for Charge Pump
When driving the stepping motor with VDD = 5 V, fchop = 150 kHz, L = 10 mH under the conditions of VM
= 13 V and 1.5 A, the logical values for Ccp 1 and Ccp 2 are as shown in the graph below:
Choose Ccp 1 and Ccp 2 to be combined from the above applicable range. We recommend Ccp 1:Ccp 2 at
10:1 or more. (If our recommended values (Ccp1 = 0.22 μF, Ccp 2 = 0.022 μF) are used, the drive conditions
in the specification sheet are satisfied. (There is no capacitor temperature characteristic as a condition.)
When setting the constants, make sure that the charge pump voltage is not below the specified value and
set the constants with a margin (the larger Ccp 1 and Ccp 2, the more the margin).
Some capacitors exhibit a large change in capacitance according to the temperature. Make sure the above
capacitance is obtained under the usage environment temperature.
Ccp 1 capacitance (μF)
Ccp 1 – Ccp 2
Ccp 2 capacitance (μF)
0.05
0
0
Recommended
value
0.005
0.01
0.015
0.02
0.025
0.03
0.035
0.04
0.045
0.05 0.1 0.15 0.2 0.25 0.35 0.4 0.45 0.5
0.3
Applicable range
TB62209FG
2010-07-02 41
(1) Low Power Dissipation mode
Low Power Dissipation mode turns off phases A and B, and also halts the charge pump.
Operation is the same as that when the STANDBY pin is set to Low.
(2) Motor Lock mode
Motor Lock mode turns phase B output only off with phase A off.
From reset, with IA = 0 and IB = 100%, the normal 4W1-2 phase operating current is output.
Use this mode when you want to hold (lock) the rotor at any desired value.
(3) 2-Phase Excitation mode
Electrical angle 360° = 4 CLKs
Note: 2-phase excitation has a large load change due to motor induced electromotive force. If a mode in
which the current attenuation capability (current control capability) is small is used, current increase
due to induced electromotive force may not be suppressed. In such a case, use a mode in which
the mixed decay ratio is large.
We recommend 37.5% Mixed Decay mode as the initial value (general condition).
100
0
Phase B
Phase A
[%]
−100
STEP
IB (%)
2-Phase Excitation Mode (typ. A)
IA (%)
100
0
100
TB62209FG
2010-07-02 42
(4) 1-2 Phase Excitation mode (a)
Electrical angle 360° = 8 CLK
IB (%)
1-2 Phase Excitation Mode (typ. A)
IA (%)
0
100
100
Phase B
Phase A
100
0
[%]
−100
STEP
MO
CLK
TB62209FG
2010-07-02 43
(5) 1-2 Phase Excitation mode (b)
Electrical angle 360° = 8 CLK
IB (%)
1-2 Phase Excitation Mode (typ. B)
IA (%)
0
100
100
71
71
MO
Phase B
Phase A
100
0
[%]
−100
STEP
71
−71
CLK
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(6) W1-2 Phase Excitation mode
Electrical angle 360° = 16 CLK
IB (%)
W1-2 Phase Excitation Mode
(2-bit micro step)
IA (%)
0
100
100
71
71
38 92
38
92
100
0
[%]
−100
STEP
−92
−71
−38
38
92
71
Phase A
Phase B
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(7) 2W1-2 Phase Excitation mode
Electrical angle 360° = 32 CLK
IB (%)
2W 1-2 Phase Excitation Mode
(3-bit micro step)
IA (%)
92 100
0
100
98
71
71 38
38
92
98
83
56
20
83 56 20
100
0
[%]
−100 STEP
−83
−38
−20
38
88
71
−92
−98
−71
−56
20
56
96
Phase A
Phase B
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46
(8) 4W1-2 Phase Excitation mode
Electrical angle 360° = 64 CLK
−100 STE
0
−96
−88
−92
−77
−71
−56
−63
−47
−38
−29
−20
−10
−83
10
20
29
38
47
56
63
71
77
83
88
92
96
100
[
%
]
Phase A
Phase B
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4-Bit Micro Step Output Current Vector Locus (Normalizing each step to 90°)
For input data, see the current function examples.
IA (%)
IB (%)
X = 16
0
100
10 20 29 38 47 56 63 71 77 83 88 92 96 98 100
10
20
29
38
47
56
63
77
71
88
83
98
96
92
X = 0
X = 15 X = 14
X = 13
X = 12
X = 11
X = 10
X = 9
X = 8
X = 7
X = 6
X = 5
X = 4
X = 3
X = 2
X = 1
CW
CCW
θX
θX
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Application Circuit (example)
The values for the devices are all recommended values. For values under each input condition, see the
above-mentioned recommended operating conditions.
Note: Adding bypass capacitors is recommended.
Make sure that GND wiring has only one contact point, and to design the pattern that allows the heat
radiation.
To control setting pins in each mode by SW, make sure to pull down or pull up them to avoid high
impedance.
To input the data, see the section on the recommended input data. Please use DATA MODE fixed at the
L level.
Because there may be shorts between outputs, shorts to supply, or shorts to ground, be careful when
designing output lines, VDD (VM) lines, and GND lines.
M
Rosc = 3.6 kΩ
Cosc = 560 pF
Vref AB
VM
RRS A
A
B
A
B
RRS B
VSS
(FIN)
PROTECT
MO
DMODE 3
DMODE 2
DMODE 1
MDT 1
MDT 2
STANDBY
P-GND
RESET
CW/CCW
ENABLE
CLK
DATA MODE
VDD
CR Vref AB 3 V
1 μF
SGND
RRS A 0.66 Ω
Stepping
Motor
0.66 Ω RRS B
SGND
SGND
SGND
5 V 10 μF
Ccp CCcp BCcp A
Ccp 2
0.022 μF
Ccp 1
0.22 μF
DATA MODE
TORQUE 2
TORQUE 1
OPEN
OPEN
0 V
0 V
5 V
0 V
24 V
SGND
100 μF
5 V
0 V
5 V
0 V
5 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
0 V
5 V
PGND
TB62209FG
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Package Dimensions
Weight: 0.79 g (typ.)
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Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified
for explanatory purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for
explanatory purposes.
3. Timing Charts
Timing charts may be simplified for explanatory purposes.
4. Application Examples
The application examples provided in this data sheet are provided for reference only. Thorough evaluation
and testing should be implemented when designing your application's mass production design.
In providing these application examples, Toshiba does not grant the use of any industrial property rights.
5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These
components and circuits are not guaranteed to prevent malfunction or failure from occurring in the
application equipment.
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be
exceeded, even for a moment. Do not exceed any of these ratings.
Exceeding the rating(s) may cause breakdown, damage or deterioration of the device, which may
result in injury by explosion or combustion.
[2] Do not insert devices incorrectly or in the wrong orientation.
Make sure that the positive and negative terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and
exceeding the rating(s) may cause breakdown, damage or deterioration of the device, which may
result in injury by explosion or combustion.
In addition, do not use any device that has had current applied to it while inserted incorrectly or in
the wrong orientation even once.
[3] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in
the event of over current and/or IC failure. The IC will fully break down when used under
conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when
an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow.
Such a breakdown can lead to smoke or ignition. To minimize the effects of a large current flow in
the event of breakdown, fuse capacity, fusing time, insertion circuit location, and other such suitable
settings are required.
[4] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into
the design to prevent device malfunction or breakdown caused by the current resulting from the
inrush current at power ON or the negative current resulting from the back electromotive force at
power OFF. IC breakdown may cause injury, smoke or ignition.
For ICs with built-in protection functions, use a stable power supply with. An unstable power supply may
cause the protection function to not operate, causing IC breakdown. IC breakdown may cause injury, smoke or
ignition.
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[5] Carefully select power amp, regulator, or other external components (such as inputs and negative feedback
capacitors) and load components (such as speakers).
If there is a large amount of leakage current such as input or negative feedback capacitors, the IC
output DC voltage will increase. If this output voltage is connected to a speaker with low input
withstand voltage, overcurrent or IC failure can cause smoke or ignition. (The over current can
cause smoke or ignition from the IC itself.) In particular, please pay attention when using a Bridge
Tied Load (BTL) connection type IC that inputs output DC voltage to a speaker directly.
Points to remember on handling of ICs
(1) Over current Protection Circuit
Over current protection circuits (referred to as current limiter circuits) do not necessarily protect
ICs under all circumstances. If the Over current protection circuits operate against the over current,
clear the over current status immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings
can cause the over current protection circuit to not operate properly or IC breakdown before
operation. In addition, depending on the method of use and usage conditions, if over current
continues to flow for a long time after operation, the IC may generate heat resulting in breakdown.
(2) Thermal Shutdown Circuit
Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal
shutdown circuits operate against the over temperature, clear the heat generation status
immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings
can cause the thermal shutdown circuit to not operate properly or IC breakdown before operation.
(3) Heat Dissipation Design
In using an IC with large current flow such as a power amp, regulator or driver, please design the device so
that heat is appropriately dissipated, not to exceed the specified junction temperature (Tj) at any time or under
any condition. These ICs generate heat even during normal use. An inadequate IC heat dissipation design can
lead to decrease in IC life, deterioration of IC characteristics or IC breakdown. In addition, please design the
device taking into consideration the effect of IC heat dissipation on peripheral components.
(4) Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s
power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the
device’s motor power supply and output pins might be exposed to conditions beyond maximum ratings. To avoid
this problem, take the effect of back-EMF into consideration in your system design.
TB62209FG
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RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information
in this document, and related hardware, software and systems (collectively “Product”) without notice.
• This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with
TOSHIBA’s written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product’s quality and reliability, Product can malfunction or fail. Customers are
responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the
Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of
all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
for Product and the precautions and conditions set forth in the “TOSHIBA Semiconductor Reliability Handbook” and (b) the
instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their
own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such
design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts,
diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating
parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS’ PRODUCT DESIGN OR
APPLICATIONS.
• Product is intended for use in general electronics applications (e.g., computers, personal equipment, office equipment, measuring
equipment, industrial robots and home electronics appliances) or for specific applications as expressly stated in this document.
Product is neither intended nor warranted for use in equipment or systems that require extraordinarily high levels of quality and/or
reliability and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage or serious
public impact (“Unintended Use”). Unintended Use includes, without limitation, equipment used in nuclear facilities, equipment used
in the aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling
equipment, equipment used to control combustions or explosions, safety devices, elevators and escalators, devices related to electric
power, and equipment used in finance-related fields. Do not use Product for Unintended Use unless specifically permitted in this
document.
• Do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part.
• Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any
applicable laws or regulations.
• The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any
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• ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND CONDITIONS OF SALE
FOR PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1) ASSUMES NO LIABILITY
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Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances,
including without limitation, the EU RoHS Directive. TOSHIBA assumes no liability for damages or losses occurring as a result of
noncompliance with applicable laws and regulations.
