Absolute Maximum Ratings
Parameter Units
ID @ VGS = 10V, TC = 25°C Continuous Drain Current 2.5
ID @ VGS = 10V, TC = 100°C Continuous Drain Current 1.5
IDM Pulsed Drain Current ➀11
PD @ TC = 25°C Max. Power Dissipation 25 W
Linear Derating Factor 0.20 W/°C
VGS Gate-to-Source Voltage ±20 V
EAS Single Pulse Avalanche Energy ➁0.31 mJ
IAR Avalanche Current ➀-A
EAR Repetitive Avalanche Energy ➀-mJ
dv/dt Peak Diode Recovery dv/dt ➂6.2 V/ns
TJOperating Junction -55 to 150
TSTG Storage Temperature Range
Pckg. Mounting Surface Temp. 300 (for 5 S)
Weight 0.42(typical) g
PD - 91719B
The leadless chip carrier (LCC) package represents the
logical next step in the continual evolution of surface
mount technology. Desinged to be a close replacement
for the TO-39 package, the LCC will give designers the
extra flexibility they need to increase circuit board den-
sity. International Rectifier has engineered the LCC pack-
age to meet the specific needs of the power market by
increasing the size of the bottom source pad, thereby
enhancing the thermal and electrical performance. The
lid of the package is grounded to the source to reduce
RF interference.
oC
A
1/17/01
www.irf.com 1
LCC-18
Product Summary
Part Number BVDSS RDS(on) ID
IRFE430 500V 1.50Ω 2.5A
Features:
!Surface Mount
!Small Footprint
!Alternative to TO-39 Package
!Hermetically Sealed
!Dynamic dv/dt Rating
!Avalanche Energy Rating
!Simple Drive Requirements
!Light Weight
For footnotes refer to the last page
REPETITIVE AVALANCHE AND dv/dt RATED JANTX2N6802U
HEXFETTRANSISTORS
JANTXV2N6802U
SURFACE MOUNT (LCC-18)
[REF:MIL-PRF-19500/557]
IRFE430
500V, N-CHANNEL
IRFE430
2www.irf.com
Thermal Resistance
Parameter Min Typ Max Units Test Conditions
RthJC Junction to Case — — 5.0
RthJ-PCB Junction to PC Board — — 19"" Soldered to a copper clad PC board
°C/W
Source-Drain Diode Ratings and Characteristics
Parameter Min Typ Max Units Test Conditions
ISContinuous Source Current (Body Diode) — — 2.5
ISM Pulse Source Current (Body Diode) ➀—— 11
VSD Diode Forward Voltage — — 1.4 V Tj = 25°C, IS =2.5A, VGS = 0V ➃
trr Reverse Recovery Time — — 900 nS Tj = 25°C, IF =2.5A, di/dt ≤100A/µs
QRR Reverse Recovery Charge — — 2.0 µc VDD ≤50V ➃
ton Forward Turn-On Time Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
A
For footnotes refer to the last page
Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)
Parameter Min Typ Max Units Test Conditions
BVDSS Drain-to-Source Breakdown Voltage 500 — — V VGS = 0V, ID = 1.0mA
∆BVDSS/∆TJTemperature Coefficient of Breakdown — 0.59 — V/°C Reference to 25°C, ID = 1.0mA
Voltage
RDS(on) Static Drain-to-Source On-State — — 1.50 VGS = 10V, ID =1.5A➃
Resistance — — 1.725 VGS =10V, ID =2.5A ➃
VGS(th) Gate Threshold Voltage 2.0 — 4.0 V VDS = VGS, ID =250µA
gfs Forward Transconductance 2.0 — — S ( ) V
DS > 15V, IDS =1.5A➃
IDSS Zero Gate Voltage Drain Current — — 25 VDS=400V, VGS=0V
— — 250 VDS =400V
VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Leakage Forward — — 100 VGS =20V
IGSS Gate-to-Source Leakage Reverse — — -100 VGS =-20V
QgTotal Gate Charge — — 3 0 VGS =10V, ID= 2.5A
Qgs Gate-to-Source Charge — — 4.5 nC VDS =250V
Qgd Gate-to-Drain (‘Miller’) Charge — — 28
td(on) Turn-On Delay Time — — 30 VDD =250V, ID =2.5A,
trRise Time — — 3 0 RG =7.5Ω
td(off) Turn-Off Delay Time — — 55
tfFall Time — — 30
LS + LDTotal Inductance — 6.1 —
Ciss Input Capacitance — 750 VGS = 0V, VDS =25V
Coss Output Capacitance — 240 — pF f = 1.0MHz
Crss Reverse Transfer Capacitance — 6 7 —
nA
Ω
nH
ns
µA
Ω
Measured from the center of
drain pad to center of source
pad
www.irf.com 3
IRFE430
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1
1
10
100
0.1 1 10 100
20µs PULSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
0.1
1
10
100
1 10 100
20µs PULSE WIDTH
T = 150 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
-60 -40 -20 0 20 40 60 80 100 120 140 160
0.0
0.5
1.0
1.5
2.0
2.5
3.0
T , Junction Temperature( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
2.5A
0.1
1
10
100
4.0 5.0 6.0 7.0 8.0
V = 50V
20µs PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 150 C
J°
IRFE430
4www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0.1
1
10
0.4 0.6 0.8 1.0
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J°
T = 150 C
J°
0.1
1
10
100
10 100 1000 10000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Single Pulse
T
T
= 150 C
= 25 C
°
°
J
C
V , Drain-to-Source Voltage (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
1 10 100
0
400
800
1200
1600
V , Drain-to-Source Voltage (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1MHz
+ C
+ C
C SHORTED
GS
iss gs gd , ds
rss gd
oss ds gd
Ciss
Coss
Crss
0 5 10 15 20 25 30
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
2.5A
V = 100V
DS
V = 250V
DS
V = 400V
DS
www.irf.com 5
IRFE430
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
25 50 75 100 125 150
0.0
0.5
1.0
1.5
2.0
2.5
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
J DM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRFE430
6www.irf.com
QG
QGS QGD
VG
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
10V
25 50 75 100 125 150
0.00
0.20
0.40
0.60
0.80
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
1.1A
1.6A
2.5A
www.irf.com 7
IRFE430
Foot Notes:
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd, Whyteleafe, Surrey CR3 OBL, UK Tel: ++ 44 (0)20 8645 8000
IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 (0) 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 011 451 0111
IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo 171 Tel: 81 (0)3 3983 0086
IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 (0)838 4630
IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673 Tel: 886-(0)2 2377 9936
Data and specifications subject to change without notice. 1/01
➂ ISD ≤ 2.5A, di/dt ≤86A/µs,
VDD≤ 500V, TJ ≤ 150°C
Suggested RG =7.5 Ω
➀ Repetitive Rating; Pulse width limited by
maximum junction temperature.
➁ VDD = 50V, starting TJ = 25°C,
Peak IL = 2.5A, ➃ Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
Case Outline and Dimensions — LCC-18
