19-959; Rev. 2; 11/05 General Description The Maxim 1CM7211 (LCD) and ICM7212 (LED) four digit, seven segment display drivers include input data latches, BCD to segment decoders, and all level translation and timing circuits needed to drive non- multiplexed displays. Both the ICM7211 and ICM7212 are available in two data input configurations: a multiplexed BCD interface version and a microprocessor interface version. The multiplexed BCD interface version has four BCD data inputs and four separate digit strobes. The micro- processor interface versions, designated by an M suffix, have four BCD data inputs, two digit address lines, and two chip selects or WRITE inputs. The ICM7211 and ICM7212 decode the BCD data via an onboard character font ROM. There are two different character fonts available, hexadecimal and Code B. Applications The low power consumption of the ICM7211 LCD driver makes it ideal for battery powered and portable applications. The 1CM7212 LED display driver reduces system cost by eliminating external level translators, external segment drivers, and segment current limiting resistors. Digital Panel Displays Intelligent Instruments Remote Display Units Microprocessor-to-Visual Communication Typical Operating Circuit soiait | [7 [7 LCD DISPLAY 28 + 26 sv MAXIM MAXIM xt sicuren XT icm7ai1A) 4 44 | : 4 BCD/BINARY r DATA ps D7 D6 DIGIT } DS SELECTS | D4 D3 D2 \p1 (Detailed Circuit DiagramFigure 14) MAXIM SU AAIL/VI Four Digit Display Decoder/Drivers Features @ Improved 2nd Source! (See 3rd page for Maxim Advan tage). @ Directly drives Four Digit, 7 Segment Displays 1CM7211 - Non-multiplexed Liquid Crystal Display (LCD) ICM7212 - Non-multiplexed Common Anode LED Multiplexed BCD interface and .P Interface Versions @ No external components needed @ Low Power CMOS - 25..W typ. (display blanked) Ordering Information OUTPUT INPUT DEVICE TYFE CODE _| CONFIGURATION 1CM7211 (LCD) Hexadecimal Multiplexed 4-Bit 1CM7211A (LCD) Code B _ 1CM7211M (LCD) Hexadecimal uP Interface ICM7211AM (LCD) Code B | 1CM7212 (LED) Hexadecimal : ss <= *_| Multiplexed 4-B ICM 7212A (LED) | CodeB eee 2 | | ICM7212M (LED) Hexadecimal ed uP Interface | | 1CM7212AM (LED) Code B } (Ordering information continued ). Pin Configurations Top View 49 Lead DIP v Gj] e [40] 01 e1(2] 39) C1 oi] [38] B1 Fi (4] 37] Al ep [5] [36] OSCILLATOR a2 [6] [35] GND B2 (7) [34] D4 cz (ey [33] 03 SELECT 0219] pvnaxim [22] 22 | inputs E2 [10 ICM7211 31} D1 62 Gi} jcm7211a [30 83 F2 G2] (29) B2 | DATA aa lo Fa] 81 { 'NPUTS B3 [14 27) 80 c3 [is 26) F4 o3 [6 [25] G4 E3 [17 24) 4 G3 [18 23} D4 F3 [ig [22] c4 a [20] [21] B4 (Pin Configurations continued ) Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com. CLEL/LLCLNOI1CM7211/7212 Four Digit Display Decoder/Drivers ABSOLUTE MAXIMUM RATINGS Power Dissipation (Note 1) ..... SUPPIY VONAGE sica vse vawaeeiva waa ae eee. 6.5V Input Voltage (Any Terminal) (Note 2) ............ Operating Temperature Range .. Storage Temperature Range .... Lead Temperature (Soldering 10 sec.) V* +0.3V, GROUND -0.3V seaetexe reise -20C to +85C eaatateters -55C to +125C 0.5 W@ 70C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other Seae 300C ELECTRICAL CHARACTERISTICS (V* = 5V; T, = 25C, Test circuit unless noted) 1ICM7211 CHARACTERISTICS (LCD) conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Operating Supply Voltage Range Vsupp 3 5 6 Vv Operating Current lop Test circuit, Display blank 10 50 BA Oscillator Input Current losci Pin 36 +242 +10 Segment Rise/Fall Time tres Ci = 200pF Se" Backplane Rise/Fall Time tree Cy = S000pF "75 te Oscillator Frequency fosc Pin 36 Floating ig 16 kHz Backplane Frequency fep Pin 36 Floating * 125 Hz 1CM7212 CHARACTERISTICS (COMMON ANODE LED) & PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Operating Supply Voltage Range VsUPP 4 5 6 Vv | Operating Current lop Pin 5 (Brightness), 10 50 uA Display Off Pin 27-34 - GROUND Ne Operating Current lop Pin 5at V, Display all 8's .% 200 mA _| Segment Leakage Current IsLK Segment Off > +0.01 +1 BA Segment On Current ISEG Segment On, Vo =43V 5 8 mA INPUT CHARACTERISTICS 4 PARAMETER SYMBOL MIN TYP MAX UNIT | Logical 1 input voltage Vin e a 3 y Logical "0" input voltage Vit ss owt 1 Input leakage current NILK ath pring +,01 +4 BA Input capacitance Cyr. | Pins 27-3 5 pF BP/Brightness input leakage = Measured at Pin 5 with Pin 36 at GND +.01 +1 pA BP/Brightness input capacitance S BR a All Devices 200 pF AC CHARACTERISTICS - MU EDANPUT CONFIGURATION Digit Select Active Pulse Wid oF tsa Refer to Timing Diagrams 1 us Data Setup Time = tos 500 fig Data Hold Time . tou 200 ; tins 2 us AC CHARAGTERISTICS - MICROPROCESSOR INTERFACE tcsa other chip select either held active, 200 or both driven together ng Data Setup Time tos 100 Data Hold Time tbH 10 0 | Inter-Chip Select Time tics 2 Mm) Note 1: This limit refers to that of the package and will not be realized during normal operation. Note 2: Due to the SCR structure inherent in the CMOS process, connecting any terminal to voltages greater than V* orless than GROUND may cause destructive device latchup. For this reason, it is recommended that no inputs from external sources not operating on the same power supply be applied to the device before its supply is established, and that in multiple supply systems, the supply to the ICM7211/ICM7212 be turned on first. The electrical characteristics above are a reproduction of a portion of Intersil's copyrighted (1981) data book. This information does not constitute any representation by Maxim that Intersil's products will perform in accordance with these specifications. The Electrical Characteristics Table" along with the descriptive excerpts from the original manufacturer's data sheet have been included in this data sheet solely for comparative purposes. MAAIM@ Key Parameters Guaranteed Over Temperature @ Increased Segment-On Current MAXIM Four Digit Display Decoder/Drivers @ Low Power (Typically 25.W) @ Maxim Quality and Reliability @ Improved ESD Protection (Note 3) ABSOLUTE MAXIMUM RATINGS this device conforms to the Absolute Maximum Ratings on adjacent page. ELECTRICAL CHARACTERISTICS (V* = +5V; T, = 25C, Test circuit unless noted.) 1CM7211 CHARACTERISTICS (LCD) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS | Operating Supply Voltage Range Vsupp . 3 5 6 Vv oie a ae ee . ee : Oscillator Input Current loscl Pin 36, Voge = 2.5V +2 10 nA Segment Rise/Fall Time tres Cy = 200pF 05 ae Backplane Rise/Fall Time tRFB C_ = 5000pF 15 Oscillator Frequency ~ fosc Pin 36 Floating 19 kHz Backplane Frequency fap Pin 36 Floating 150 Hz ICM7212 CHARACTERISTICS (COMMON ANODE LED) PARAMETER s'|s- SYMBOL Vv Operating Current lop Pin 5 (Brightness), Display Off _ Pin 27-34 - GROUND Current : - lop Pin5atv, all 8's Current IsiK Off on INPUT CHARACTERISTICS (ICM7211 AND ICM7212) MAX 6 50 UNITS Vv BA mA pA PARAMETER SYMBOL CONDITIONS MIN TYP | MAX | UNITS Logical 1" input voltage | Pins 27-34, -20C to +85C_ 3 Logical O" inputvoltage Vin Pins 27-34, -2 Input leakage current lick Pins 27-34 Input capacitance | Cin Pins 27-34 BP/Brightness input leakage lBPLK Measured at Pin 5 with Pin 36 at GND +01 H BA BP/Brightness input capacitance Cap) All Devices ] 200 pF AC CHARACTERISTICS - MULTIPLEXED INPUT CONFIGURATION Digit Select Active Pulse Width | {SA Refer to Timing Diagrams | 1 ; BS | Data Setup Time tos __ a0 ns Data Hold Time toH 200 Inter-Digit Select Time ; tios - oO 2 I BS AC CHARACTERISTICS - MICROPROCESSOR INTERFACE Chip Select Active Pulse Width tesa Other chip select either held active, 200 Pe or both driven together fig Data Setup Time tos 100 Data Hold Time toy 10. 0 | Inter-Chip Select Time tics 2 us Note 1: This limit refers to that of the package and will not be realized during normal operation. Note 2: Due tothe SCR structure inherent in the CMOS process, connecting any terminal to voltages greater than V orless than GROUND may cause destructive device latchup. For this reason, it is recommended that no inputs from external sources not coved onthe same power supply be applied to the device before its supply is established, and that in multiple supply systems, the supp ICM7211/ICM7212 be turned on first. y tothe Note 3: All pins except pin 29 are designed to withstand electrostatic discharge (ESD) levels in excess of 2000V (Mil STD 883B Method 3015.1 Test Circuit). Due to the special test functions associated with pin 29, this pin is designed to withstand up to 1500V (same test circuit). MMAAIM ChEL/LELCLINOIICM7211/7212 Four Digit Display Decoder/Drivers Ordering Information (Cont. ) PART TEMP. RANGE PACKAGE PART TEMP. RANGE PACKAGE | ICM72111Q -20C to +85C 44 Lead Plastic ICM72111PL -20C to+85C 40 Lead Plastic DIP | Chip Carrier_ | ICM7211AIPL -20C to +85C 40 Lead Plastic DIP lOM7211AlQ eo COG Cee reve ICM7211MIPL___-20C to +85C __40 Lead Plastic DIP ip i 3 : ICM7211AMIPL _-20C to +85C _40 Lead Plastic DIP CMMI AO CChp cane ICM7212IPL____-20C to +85C _ 40 Lead Plastic DIP ICM7211AMIQ -20C to +B5C 44 Lead Plastic ICM7212AIPL -20C to +85C 40 Lead Plastic DIP Chip Carrier ICM7212MIPL -20C to+85C 40 Lead Plastic DIP ICM7212I1Q -20C to +85C 44 Lead Plastic ICM7212AMIPL _-20C to +85C 40 Lead Plastic DIP | Chip Carrier Each device type listed is available in dice form: ICM7212AIQ -20C to +85C 44 Lead Plastic Order basic part number followed by C/D; Chip Carrier (i.e. |OM7211C/D). ICM7212MIQ -20C to +85C 44 Lead Plastic Chip Carrier ICM7212AMIQ -20C to +85C 44 Lead Plastic Chip Carrier Pin Configurations (Cont. ) Top View 40 Lead DIP 40 Pin DIP 40 Lead DIP voje = [40] 01 vw fi] e = 40) D1 vO] e bod [40] 01 e1(@] 39] C1 e1[2 33] C1 e1({2 (39) c1 aG (38) 81 o1(3] EQ oi] [38] 81 Fi(a4 37) At Fi (4] 37) At Fi [a] 137) a1 BAT (5 | [36] GND ep(s] [36] OSCILLATOR Bat [5] [36] GND a2 (6 ] [35] GND a2 (6 ] 35] GND a2 [6 | [35] GNO 827] [34] D4 B2(7] [34] CHIP SELECT 2 a2 [7] [34] CHIP SELECT 2 c2 (B] [33] D3 oe c2 @] 33] CHIP SELECT i c2 3] 33) CHIP SELECT o2 [3] [32] D2 | INPUTS o2 [3] 32] DIGIT SELECT 2 v2 [3 [32] DIGIT SELECT 2 E2 [0 Goa 31] D1 E2 [0] Loan 31] DIGIT SELECT 1 e2 [0] MAXIM P57) picit seLect 1 62 Gt] icm7or2, fades | 62 Gi) om7211AM [20] 83 a fi ie 30) 83 | F2 G2] [29] B2 | OATA F2 2 [29] B2 | DATA r2fz] ~ 29) 82 | DATA a3 [3 28) 81 J INPUTS a3 [is [2a] B1 \ INPUTS aa [3] f2a}].e1 { INPUTS B3 [ia 27] 60 B3 [14] [27] BO e3, [14 }27) Bo ) c3 (5 | 26) Fa c3 [5 26] Fa c3 [35] [26] Fa o3 [6 [25] G4 o3 [6] 25] Ga p3 [46 [25] Ga e3 [7 24) 4 e3 G7 [24] 4 e3 [7] [24] &4 G3 [is 23) D4 G3 [a [23] 04 G3 [i] [23] 04 F3 [19 22) C4 F3 (3) [22] C4 Fa [ig [22] ca aa [20] [21] 84 aa [2a] [21] 84 aa [20 [21] 84 3) GND [38] CHIP SELECT 2 DIGIT [37] CHIP SELECTI eee [36] DIGIT SELECT CODE BIT 2 [35] DIGIT SELECT CODE BIT 1 ICM7211 ICM7211M [34] NIC ICM7211A ICM7211AM [33] 83 DATA [32)62 | DATA INPUT rai] B1 | INPUT [30] Bo [23] Fa MAXIMFour Digit Display Decoder/Drivers Pin Configurations (Cont.) Top View ICM7212 ICM7212A 44 Lead Chip Carrier 39] GND 38) 04 ) 37) 03 | DIGIT SELECT [36] 02 | INPUT 35) 0+ | [34] N/C [33] 83 [32] 82 | oar [31] 81 INPUT [30] 80 [29] F4 44 Lead Chip Carrier [39] GND [38] CHIP SELECT 2 [37] CHIP SELECT 1 36] DIGIT SELECT CODE BIT 2 35] DIGIT SELECT CODE BIT 1 | DATA INPUT 2 [i] nic [2] 1CM7212M 34) NIC G2 [13] ICM7212AM Fa] 83 F2 [a] [32] B2 A3 (15 | [31] 81 B3 [30] 80 | c3 [7] [29] F4 =lelialisiisilallal s) aigtksg $adaas 1CM7211 OPERATING SUPPLY CURRENT AS A FUNCTION OF SUPPLY VOLTAGE 1CM7211 BACKPLANE FREQUENCY AS A FUNCTION OF SUPPLY VOLTAGE 12 lop(wA) c DISPLAY BLANK t PIN 36 OPEN Fa --20C : Ths 2s Ta= 70C 180 Ta: 25 150 a ase 120 zn 7 5% rod sol tc 32 Cosc = 220pF 22 er 2 3 4 5 6 v+ (VOLTS) 1CM7212 LED SEGMENT CURRENT 1CM7212 LED SEGMENT CURRENT AS A FUNCTION OF OUTPUT VOLTAGE PIN 5 AT vt Ta= 2c IseaimA) Vo(VOLTS) MAAIM IseatmA) AS A FUNCTION OF BRIGHTNESS CONTROL VOLTAGE SEGMENT OUTPUT AT +3. Ta: 25C ves 8V 1 2 3 4 5 6 VOLTAGE ON BRT PIN 5 (VOLTS) 3 4 5 v* (VOLTS) __ Typical Operating Characteristics 1CM7212 OPERATING POWER (LED DISPLAY) AS A FUNCTION OF SUPPLY VOLTAGE 1800 1200 F POWER (mW) ry 2 oS a Ss 300 . p DISPLAY ALL EIGHTS __ a 1500 te FORWARD VOLTAGE DROP FLED 17 + rs 4 v* (VOLTS) CLEL/SLLCLINOI1CM7211/7212 Four Digit Display Decoder/Drivers DIGIT 4 DIGIT 3 DIGIT 2 DIGIT) 9999000 SEGMENT OUTPUTS LE 2 ? i a sea he Secs does a. r a or-- q peedoey SEGMENT | LJ bowl DRIVERS ; 1 rt ! | 1 | t7 | ' 4 1 1 1 t i DATA I 1 DECODER | | DECODER | | DECODER | | DECODER | LATCHES rat ! oprver !' ') orwer ! ! orien ! 1 DRIVER | ! : to ; i ! I ' 4 | \ ba 1 | a i! : | 1 4707 LINE 1 : i: I ! i i | | | ROMDECODER [| ! too \ | | | bee be rT etd L.-~ | eit i o + a + i pata | O- i : INPUT l ! i o ? : i o_ DIGIT LATCH | oiGit =| go DIGIT SELECT | SELECT | LOGIC AND :=9 ONE ' - SHOT STROBE OSCILLATOR BACK- | 19kHz PLANE | | FREE 128 DRIVER | | OSCILLATOR . RUNNING | INPUT. INPUT y [ENABLE BP ouTPUT __ | ENABLE 4 DETECTOR Figure 1. Block diagram of |CM7211 and ICM7271A. DIGIT 4 DIGIT 3 DIGIT 2 DIGIT 1 SEGMENT OUTPUTS i oat i at h i, I, | BRIGHTNESS | ; pester preter q eet n4 ie | SEGMENT J LJ i CONTROL O~ DRIVERS ; 1! | i I ' Guo O-b> T7 | ' 4 tt ' ote I ' oi too ' GND DATA i { DECODER ; 4 DECODER 4 4 DECODER | | LATCHES T | oRveR ! | DRIVER | | onver } ! | ' 4 4 ' DEcoper } f7 i ot tA ' DRIVER | 4 TO 7 LINE L ' i ; 1! 4 ROM DECODER 1 1 too rt ' I \ apewd: keane: & i nt 0 o = pata | INPUT ) O o o ae DIGIT LATCH piait =| o L SELECT LOGIC AND Q ONE 5 SHOT STROBE cee LJ 19kHz i osc Figure 2. Block diagram of ICM7212 and ICM7212A. SAAAXIMIFour Digit Display Decoder/Drivers DATA } INPUTS ] T ENABLE pa SEGMENT OUTPUTS EEL 02 SEGMENT OUTPUTS itttttt D2 SEGMENT OUTPUTS Piet D1 SEGMENT OUTPUTS tittttt 7 WIDE DRIVER 7 WIDE DRIVER 7 WIDE DRIVER 7 WIDE DRIVER iit ty 7 WIDE LATCH EN Litt 17 WIDE LATCH EN Litt | 7 WIDE LATCH EN Litt 7 WIDE LATCH EN fee ede LEEL Ld Titi | el PROGRAMMABLE 4TO 7 DECODER PROGRAMMABLE 4TO 7 DECODER PROGRAMMABLE 47TO 7 DECODER PROGRAMMABLE 470 7 DECODER 4-BIT LATCH 1 yt yt J 2-BI7 2-BIT 2704 DIGIT SELECT *T LATCH DECODER CODE INPUT = ENABLE ENABLE . j CHIP SELECT i > ONE CHIP SELECT 2 } SHOT OSCILLATOR BACK. AL col meee | | -m| | ones FREE- : DRIVER OSCILLATOR RUNNING || es INPUT INPUT ENABLE = 8P output ENABLE 4 DETECTOR Figure 3. Block diagram of 1CM7211M and ICM7211AM. D4 pI SEGMENT OUTPUTS SEGMENT OUTPUTS SEGMENT OUTPUTS SEGMENT OUTPUTS. ttttttt tittttt ttttttt tittt tt 7 WIDE DRIVER 7 WIDE DRIVER 7 WIDE DRIVER 7 WIDE DRIVER [- BRIGHTNESS Litt ? WIDE LATCH EN Litt ity |? WIDE LATCH EN LET | 7 WIDE LATCH EN | 7 WIDE LATCH EN Litt Litt tt Litt tty Li tit | Litt tt PROGRAMMABLE 4TO 7 DECODER PROGRAMMABLE 470 7 DECODER PROGRAMMABLE 4 TO 7 DECODER PROGRAMMABLE 4TO 7 DECODER 4 J J own o} 8, INPUTS ] *] enaB_e | A. 2-BIT 2-B1T 2704 DIGIT SELECT LATCH DECODER CODE INPUT an ENABLE | CHIP SELECT 1 ONE CHIP SELECT 2 } SHOT F i JL Figure 4. Block diagram of I1CM7212M and ICM7212AM. MIAALVI SESL/ELCLNNDI1CM7211/7212 Four Digit Display Decoder/Drivers Detailed Description Display Interface The ICM7211 and ICM7212 differ only in the type of display interface. The ICM7211 is designed to drive non-multiplexed liquid crystal displays (LCDs), while the ICM7212 is designed to drive non-multiplexed, common anode LED displays. 1CM7211 LCD Display Driver The display driver section of the |CM7211 includes an oscillator, a 7 stage binary divider, a backplane driver, backplane slaving detector and logic, and 28 segment drivers. The RC oscillator has a nominal oscillation frequency of 19kHz with no external components. Ordinarily this frequency is suitable and no external oscillator components are needed, but if desired, the frequency may be lowered by connecting a capacitor between pin 36 (Oscillator) and either ground or V*. A graph showing the relationship between capacitor value and oscillator frequency is shown in the Typical Character- istics section. The oscillator may also be overdriven by an external clock source with a frequency of 128 times the desired backplane frequency. The external clock source should swing from approximately 1.5V to 5V when V* is 5V. The external clock signal must not go below 1V for more than one microsecond, or the backplane disable circuitry may be activated (see below). Figure 7 shows an external clock drive circuit that meets the above requirements. The 19kHz nominal output of the onboard oscillator is divided by a7 stage binary divider (+128) to generate the backplane frequency of 150Hz. The backplane drive is simply an inverter whose input is the output of the last divider. The backplane output swings from ground to V* with a 50% duty cycle. The backplane has alow (200 ohm typical) output resistance so that it can drive the capacitance of large displays. The backplane output driver can be disabled by tying pin 36 (Oscillator) to ground. The Backplane Input/ Output (pin 5) then becomes an input which can be driven by the backplane output of another 1CM7211 (see Figures 14, 16 and 17). Each backplane is a load of about 200 pF when driven, and no more than 4 ICM7211s (16 digits total) should be slaved together using one master 1CM7211 as the backplane source, since power dissipation and the DC offset increase when the ICM7211 backplane output drives very large capacitive loads. For more than 16 digits on acommon backplane, a separate, external driver with a low impedance should be used to drive all ICM7211s. The segment drivers are CMOS inverters that swing between ground and V* with an output resistance of about 2 kf. The input to the inverter is switched between two signals, so that the segment driver output is the same as the backplane when LCD segment is to be turned OFF, and is BACKPLANE when the LCD segment is to be turned ON. The segment and backplane drivers are designed to have equal rise and fall times, so that the average DC component across the LCD is less than 25 millivolts. Sv lt , iw Li} ry: 1 pes J i 5BP OSC 36f- EACH SEGMENT | | a SND: 3S | V7 MICROPROCESSOR \ TO BACKPLANE i >} oieitcuip | 34 | VERSIONS | WITH 200pF i; | SELECT \ 55 CAPACITOR Ij 4 inPUT | 31 i | ae (2b GND | MULTIPLEXED | | -4 Data } 29 rt vy: (VERSIONS A 7 INPUTS | 2 iy | iJ ae | ! _ , | 1 | aa] a 1 | | + 20 ak | | yp _u-------------- 3 MAXLYI ICM7211; A)(M} Figure 5. |M7211 Test Circuit (all versions). OSCILLATOR FREQUENCY -~-. 128 CYCLES _| BACKPLANE INPUT-OUTPUT ae 64 CYCLES + 64 CYCLES OFF SEGMENTS ON SEGMENTS | | | Figure 6. Display Waveforms. +5V 1 v 4-30kHz osc MAXIM ICM7211 GND i Figure 7 External Clock Drive. MAAI/VIICM7212 LED Drivers The ICM7212 has 28 open drain constant current n- channel outputs, which eliminate the need for external segment resistors. The LED current vs. output voltage of a typical segment driver is shown in the Typical Characteristics section. The Brightness input (pin 5) supplies the segment driver gate voltage, and it can be used to either control the brightness of the LED display or to completely blank the display. Two methods of controlling display brightness are shown in Figure 8. The first method simply controls the voltage on the brightness pin by means of a potentiometer. The Brightness input draws negligible current and the potentiometer is normally in the range of 100 kilohms to 1 megohm. By replacing the potentiometer with a resistor and a photoresistor, the display brightness can be automatically adjusted in response to changes in the ambient lighting. A second method of display brightness contro! is to duty-cycle modulate the Brightness input between full on and blanked states. As with the simple potentiometer method, the display brightness can be automatically adjusted for ambient lighting conditions by replacing one of the timing resistors with a photoresistor. The ICM7212 has two ground pins to support the high total display current that flows into the segment outputs and then is returned to ground through the ICM7212 ground pins. Since the ICM7212 will drive the LED display at high total display current, care must be taken not to exceed the absolute maximum power dissipation limit of the ICM7212 at high ambient temperatures. For example, at 70C, the absoulute maximum power dissipation specification is 500 mW. If all 28 segments are turned on (a display of 8888), and each segment is drawing 8 mA, the total power dissipation in the ICM7212 would be Pd = 28 segments. (8mA).(Vseg) Where Vseg = V* - Vied = 5V - 1.6V = 3.4V Therefore Pd = 28.(8).(3.4) = 760 mW; greater than the absolute maximum limit. There are two ways to keep the power dissipation below the ICM7212 power dissipation limits: reduce the LED current, or reduce the voltage across the ICM7212 segment drivers. The LED current can be reduced by the display brightness control circuits shown in figure 8. The other alternative, reducing the voltage across the segment drivers can be accom- plished by either reducing the V* supply to the entire system, or by reducing the V* supply to just the LED display by placing diodes in series with the LED display (see Figure 9). Two silicon diodes in series with the anode of the LED display will reduce the voltage across the segment drivers from 3.4V to 2.2V, resulting in a power reduction of approximately 35%, while only slightly reducing the LED current and brightness. A third diode in series with the LED display would further reduce the power dissipation, but the segment current would also be reduced since there would be only about 1.6V across the n-channel segment driver. MAALVI Four Digit Display Decoder/Drivers Digital Interface There are two different types of digital interfaces available for the ICM7211 and ICM7212, a multiplexed BCD interface and a microprocessor interface. Multiplexed BCD Data Interface On the multiplexed BCD data entry versions of ICM7211 and ICM7212 there are 8 lines used for entering data: 4 BCD data lines and 4 digit strobes. The multiplexed BCD input timing and truth table is shown in Figure 10. When one of the four digit strobes is taken high, a short internal pulse is generated which latches the decoded segment data in the 7 bit latch associated with that digit. If the digit strobe is continuously held high, each transition of the backplane will cause another internal latch pulse to be generated, latching new segment data if the BCD data has changed. When the digit strobe goes low the data in the latch is held constant with no further updates until the digit strobe is again taken high. As shown in the electrical specifications table, the data setup time is is anegative 100ns, which means that the digit strobe can be taken high as much as 100ns before the BCD data is valid. (a) v BRIGHT TO BRIGHTNESS /f __ ve TO BRIGHTNESS PINS DIM +5 +5 8 a DISCHARGE 3 TO BRIGHTNESS IMii(DARK) ouT/-\_ 10K (1@2FTC ICMT212 PIN 5 6 THRESHOLD TRIGGER OF MAXIM (b) ak ICM7555 4 DIGIT 7 SEGMENT COMMON ANODE LED DISPLAY v rere ree meen ees ee tre + Tt I maxim | F ff 2 yf I 7579 | OY M oneee 28 eneee tOMiaie : SEGMENTS ' Al BI oN aa ea eee oe eer ee ee eee concen 4 Fa G4 GND GND a Figure 9. Reducing |CM7212 Power Dissipation. CLeL/bLCLNNGII1ICM7211/7212 Four Digit Display Decoder/Drivers Character Fonts Table 1 shows the two different output codes or fonts available. Both versions have the same display for 0-9 and differ only in the display of the last 6 input codes. The Code B versions have the suffix A in their part number. Table 1: Output Codes Microprocessor or Data Interface The microprocessor data interface versions of the ICM7211 and I|CM7212 are denoted by an M suffix in their part number. The microprocessor data interface also uses 8 lines for the data interface: 4 BCD data lines, 2 digit address lines, and 2 active low chip select lines. Atypical data write cycle and the truth table are shown inFigure 11. Data is entered into the input latches DATA AND DIGIT SELECT CODE DON'T CARE BINARY CMTE) ICMTZITA(M) whenever both CS (chip select) lines are low. When either CS line goes high an internal one shot is B3 | B2 | B1 | BO 1CM7212(M) 1CM7212A(M) activated, transferring the decoded 7-segment data to 0 0 0 0 o g the appropriate digit latch. One CS line is ordinarily 0 0 0 1 ft / driven by an address decoder and the other CS line is 0 | 0 1 0 e & driven by the microprocessor WR (write) line (see oO; oO; 1) 1 J q Figure 15). In this type of application, the 1CM7211/12is e fa B dG : accessed as 4 write only memory locations. 0 1 1 0 6 6 oO; 1]1]1 i 7 1 0 0 0 4 a e 1} 0/0] 1 g g Application Notes 1 0 1 0 A Z ' ; i ; H Backplane Frequency 1) 1) 07] 4 : The ICM7211 onboard oscillator generates a backplane ii 4 / e frequency of approximately 150Hz with no external (Bla components. This is suitable for most displays, but Seige fees gga TRUTH TABLE pits SELECT aF Di | D2 | D3 | D4 Function N-T > ton 0 0 0 0 No change Boe A | o/;/oj)];oj} 41 Store Data in D4 Latch | ee x o | o | 1 | 0 | Store Data in D3 Latch - KX 5 0 d 0 0 Store Data in D2 Latch DATA VALID DATA VALID 1 010] 0 Store Data in D1 Latch 1 1 1 1 Store Data in All Data Latches Figure 10. Multiplexed input timing diagram and truth table. TRUTH TABLE DS2 ps1 CS2 csi Function csi No change Store D4 Data Store D3 Data Store D2 Data Store D1 Data ala]}/-/=3/ 0/0] oO] oO; =| -/-)/0;/0/0}]| O| O| <| x Ol| O]/-| O]+| Oo | | | | O]+} o]-| o]/-+|] o| =| x Figure 11. Microprocessor Interface input timing diagram and truth table. MAAIMI 10150Hz is too high a frequency when driving very large displays or low threshold displays with high segment trace resistance. When driving very large displays (>1" height), the very large capacitance of the display will significantly slow the rise and fall times of the backplane and segment drivers. These drivers are designed to have matching rise and fali times, but any residual mismatch will resultin a DC offset across the LCD. This DC offset is directly proportional to the backplane frequency, so the lowest acceptable backplane frequen- cy (usually 30Hz) should be used when driving very large LCDs. A simple way of lowering the backplane frequency is to connect an external capacitor from the OSCillator (pin 36) to either ground or V*. The graph in the Typical Characteristics curves shows the relation- ship between the value of this external capacitor and the backplane frequency. The backplane frequency can also be controlled by externally driving the OSCillator pin. Figure 12 shows a method of setting the backplane frequency to precisely 32Hz. If the indium traces on the LCD glass itself are very long and they have high sheet resistance, the resistance of the trace will form an RC delay with the capacitance of the LCD. The phase shift caused by this RC delay causes a small voltage to appear across the LCD segments that are supposed to be in the off state. This may cause ghosting or a slight turn-on of segments that are supposed to be off. Reducing the backplane frequency or using LCDs that have a higher threshold will eliminate this problem. Annunciators or Flags Many LCD displays have annunciators or flags in ad- dition to the 7 segment digits. Figure 13 shows several different methods of driving LCD segments used as annuciators or flags. Output A of Figure 13 is driven by a CMOS exclusive OR (XOR) gate. The XORs output is either the same as the backplane or the complement of the backplane, depending on the logic level on the input. With a 1 at the logic input the XOR output is the complement of the backplane and the LCD segment is turned on. Output B is connected to the backplane through a 1 Mf resistor. When the analog switch is open, output B will be the backplane signal and the segment will be off. When the analog switch is closed, output B will be the complement of the backplane signal and the segment will be on. Output C is simply the complement of the backplane signal, and any segment (such as a decimal point) connected to output C will always be turned on. Output D is another way of turning on a decimal point, but since the voltage at D is simply the average DC voltage of the backplane signal, the total applied voltage across a segment connected to D is only 5 Vpk-pk (assuming 5V V*) rather than the 10Vpk-pk drive received by a segment connected to output C. The resistor-capacitor drive method of output D should be used only with low threshold LCDs. Unused LCD segments should be tied to the backplane, NOT allowed to float. A floating segment, while usually remaining off, may be driven by leakage currents or SA AAIM Four Digit Display Decoder/Drivers Capacitive coupling with other segments and becomea ghost or slightly turned on. If one or more of the 1CM7211 digits are not used, they can be used to drive annunciator segments without using any external logic. If only two annunciator segments need to be driven, connect the annunciators to segments B and D of the unused digit. That digit is then loaded with the data A2, A1 11, where Al and A2 are the data for the two annunciators. Three annunciators can be driven from one unused digit, but the input data to select all 8 possible combinations of annunciator states must be obtained from a look-up table. Two possible arrangements are shown in Table 2. Driving an 8 Digit LCD with Common Backplane In order to drive 8 LCD digits that have a common backplane, the backplanes of two ICM7211s must be synchronized. In figure 14 the left hand ICM7211's Backplane pin is turned into an input by grounding its oscillator pin. The right hand 1CM7211 then drives both the LCD backplane and the Backplane pin of the left hand ICM7211. Memory Mapped 8048 Microprocessor Interface In figure 15 the digit select lines DS1 and DS2 are driven by the address latched from the 8048's multiplexed data and address bus. The data is then written into the selected digit by the WR line. The 74LS138 is used to decode eight blocks, each four bytes long, starting at address 32 (decimal). The |CM7211s are addressed by MOVX instructions to these external ram locations. The extra decoded outputs of the 74LS138 can be used as chip selects for other |/O devices. Microprocessor Interface via 1/O Port Figure 16 shows one 8 bit I/O port driving two ICM7211s or ICM7212s. The data and digit selects are controlled by the lower 6 bits, while the upper two bits control which display driver receives the data. Remote Display via UART The serial input stream is assembled into an 8 bit parallel output by the UART, then the UART brings the DR (data ready) line high (See Figure 17). The schmitt trigger and RC delay ave both the CS inputs of the ICM7211s and the DRR (data ready reset) pin of the UART. When the schmitt trigger drives the DRR low, the DR pin goes low, and after a short delay, the output of the schmitt trigger output goes back high. This low- going pulse on the schmitt trigger output latches the data into the ICM7211s. Display Interface for 1CL7135 A/D Figure 18 shows an ICM7212 interfaced to the 4% digit A/D, 1CL7135. The polarity and % digit segments are driven by D flip-flops that latch polarity and % digit data at the end of each measurement. The ICL7135 11 ChSL/ELCLINOIICM7211/7212 Four Digit Display Decoder/Drivers 22M. eis V6 4069 32.768 Hz 0 == 10pF a3 > 470k 2 47% 18k TO PIN 36 ICMT211 OSCILLATOR Figure 12. Crystal Controlled Backplane Frequency. BP ICM7211 PIN 5 4030 OR 4070 LOGIC INPUT 1= SEGMENT ON 0 = SEGMENT OFF LoGic INPUT 1 SEGMENT ON 0 SEGMENT OFF peacssceauaeteoly NAY HH To Lco SEGMENT TOLCD SEGMENT TO ALWAYS ON LCD SEGMENT TO ALWAYS ON LCD SEGMENT TO ALWAYS OFF OR UNUSED LCD SEGMENTS Figure 13. Driving Annunciators, Flags and Decimal Points. SELECTS ie MAXIM ICM721TI A! 8 DIGIT Lc oispLay | BAC D8 o7 06 O05 | O4 D3 O2 O1 2 ! II PEE = a ! BACKPLANE KPLANE t 28 SLAVE *saV" ET ose SEGMENTS HIGH ORDER 63-80 D4 D3 D2 D1 BP SEGMENTS LOW ORDER 83-B0 D4 D3 D2 D1 BP | af | | 4s t BCO/BINARY *. DATA Ds p7 D oicit } os D3 Be m1 Figure 14. Two ICM7211's Driving 8-Digit LCD Display. 12 Overrange output drives the |CM7212 Brightness input, blanking the four least significant digits when the input voltage is greater than full-scale. Similar to the LED display system, Figure 19 uses Maxim's 1CM7211 LCD display driver to drive 4 digits of LCD display. The backplane signal of the |CM7211 and the CMOS exclusive OR gates are used to drive the 1/2 digit and the polarity sign. The 4 AND gates combine the ICM7135's digit outputs with its Strobe output to generate the digit select signals that latch data into the ICL7211. Since the Strobe occurs in the middle of each digit's data there is more than enough data setup and hold time to ensure that valid data is latched. The OR gates will force the BCD data to all ones when over- range goes high. The 1CM7211A will blank the display when all ones (hex F) is loaded. SEGMENT INPUT DATA FOR ICM7211 F E A B3 | B2 | B1 | BO 0 0 0 0 0 0 1 0 0 1 0 0 1 1 0 1 0 1 1 0 1 0 1 1 0 0 1 0 1 0 0 0 1 0 0 1 0 1 0 1 0 1 1 1 0 1 0 1 1 1 1 1 0 0 0 0 0 = OFF 1=ON Table 2A: Using Segments to Drive Annunciators, |CM7211 SEGMENT INPUT DATA FOR ICM7211 F E A B3 | B2 | B1 | BO 0 0 0 1 1 1 1 0 0 1 0 1 0 1 0 1 0 0 0 0 1 0 1 1 0 0 1 1 1 0 0 1 1 0 1 1 0 1 0 1 1 0 1 1 0 1 1 0 0 1 1 1 0 0 0 0 0 = OFF 1=ON Table 2B: Using Segments to Drive Annunciators, ICM7211A MA MAI/VIFour Digit Display Decoder/Drivers TO CHIP SELECTS OF OTHER ICMT211's OR OTHER I/O _ ALE MAXI i 15138 ICM7211M 8065 a oo 7 OR fr iss ot yicm721em N E3 Qs DISPLAY a po7 92-4b4ap.c Oo} csi 3 at Ds2 Q0 DSi | 80-83 cs2 5 Figure 15. 8048 Memory Mapped Interface 8 DIGIT LCD DISPLAY -] CI 7 i j SEGMENT BACKPLANE | SEGMENT DRIVER DRIVE 28) >= | 28 osc osc MAXIM MAXIM ICM7211 BP; [+ BP ICM7211 - f ie Gaga oa0 1 6 6aeeans PA PA2 PAR PAS z z 1/0 PERIPHERAL b> TOP SUCH AS 8255, 6820 or 6522 Figure 16. uP Interface via 1/O Port 8 DIGIT LCD DISPLAY MICO ee) Ere ey HAHAHA (| [et I OSC BP BP MAXIM __ MAXIM ICM7211. S25 4-482 ICM7211 5i 0512 B0-3 80-3 0812 Si +2 fa fa 72 RBRS6 he RBRB n rt o c RABRI 24576 C TR 1602 10K An, UART DR 9600 BAND . F SERIAL INPUT lu WKY _ Ps OR OT pi BAT 2 2 28 SEGMENT DRIVERS D3 = D4 pa D5 MAXIAA M1 A Xe _/f foo ered ICL7135 ICM7212 df A CI ENET STROBE : B3 B3 i B2 B2 | 81 Bt | Po. BOl-F 80 ao GT | Poe Figure 18. LED Display Interface for 1CL7135 A/D +5V 4-1/2 DIGIT LCD DISPLAY (AAA B4 B2 Bt 12 DS 26 STROBE MAXIM a7 OR ICM7211(A) ICL7135 ita ee 4 Figure 17 Remote Display via UART MAALWI Figure 19. LCD Display for 1CL7135 A/D 13 CLEL/EELCLNNII1CM7211/7212 Four Digit Display Decoder/Drivers vr = 5V *)T vk ak 1 MAXIM a bs ICM7211A LCD DISPLAY D4} 34 37-40 p3}33 cl A TI D2] 32 E AA orf : 2-26 B3 hapa] vie B2 4 4's 28 SEGMENTS / 81 oe 5 7 60. AND BACKPLANE BO a1? ~~ GND a COUNT D1 38 STORE 7a D2 37 yeon vo] Sakae 4 25 MAXIM ICM72177 JI DEVICE WITH COMMON ANODE LED MULTIPLEXED +5V {+ LCD DISPLAY tl / / hye / / ty fy ty Me ve BO B1 B2 B3 D4 DIGIT DIGIT DIGIT DIGIT 4 3 2 1 MAXIMA BP ICM7211(A) D3 D2 D1 GND wT | OUTPUT v alt 74C915 , Brjb 5 cric c ord D Ele FLit LE Gris OE GND L D4 D3 D2 D1 Figure 20. 1CM7217 to LCD Interface. 14 Figure 21. Multiplexed LED Driver to LCD Interface. MAAI/NIFour Digit Display Decoder/Drivers Chip Topography ICM7211, 7211A BP Fi Gi &* woo: C1 B1 Al OSC GND A2 | ez C2 De E2 | 19 G2 {3.02mm) F2 AQ Ba $$ _ an (2.84mm) ICM7212, 12A BRT Fi Gi 1 vt D1 Ci B1 Al GND GND G3 Fa Ad Bo C4 pa E4 Ga | Wz (2.64mm) D4 DI D2 DI B3 B2 a1 BO Fa 1CM7211M, 7211AM BP Fi Gt Et we Di Ci Bi At OSC GND A2 cs(2) B2 cs(1) i 2 DSC(2) pe DSC(1) | I I | E2 83 aly 82 (3.02mm) | F2 | aa | | 83 |e .-- 1CM7212M, 7212AM BRT Fi Gi E1 VW oO C1 B81 Al GND GND ane BOLLE A2 cS(2) B2 cs(1) C2 Dsc(2) Dz Dsc(1) E2 B3 119" 2 fe (3.02mm) Bi F2 AG B3 c3 O03 3 G3 FR Aad Ba ca p4 E4 G4 <a 112 : (2.84mm) Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. MAAKIMNI 15 SELEL/ELSLINAIICM7211/7212 Four Digit Display Decoder/Drivers Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages. ) 0.580 (0.762) (14.730) 9.10020.010 1, MIN + aD 54020.254) 0.090 }+__ 2070 - 0.070 (2-208) (52.578) Gas) 206) pnecoesceecO5ESecoos 0.600 - 0.620 NN 0.55020.005 (15.240 -15.748) BS MAXIM (73.97020.127) j 0.030 [1 ee leer erererererer (1.270) 0.15020.005 (5.81020.127) 4 010 MAX "= ( 254) t i O10 MAK (254) 690 + .005 17526 + 127 9525 = 0.07520.015 cee 01820.003 owns 125 0.020 Je o.east 3Otg (1.90520.381) (0. a 076) (3.175) (0.508) i5.a757 0-655 vk a _ a a7s* ase 0.009 -0.015 (0.229 - 0.381) 40 Lead Plastic (PL) Oya = 100C/W Bic = 45C/W PIN (1 PIN (1) IDENT - o50- on Bc cies _ ~~ 127: 025 ae 035 RAD gan (889) ! 2. 44 Lead Plastic Chip Carrier (Quad Pack) (Q) 4s x 143 ip ane =x L = r 650 = 005 > 620: 005 (15.75 = 127) > (16 51 = 127) 8c oF BEND RADI = =r t =o 026 S 660) PARTING ~ i LINE i = = 021 (.553) 102 (2.59) we 170 (4.318) Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 16 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 2005 Maxim Integrated Products Printed USA MAXIAA is a registered trademark of Maxim Integrated Products, Inc.