WEDPF2M64-XBX3 HI-RELIABILITY PRODUCT 2Mx64 3.3V Simultaneous Operation Multi-Chip Package *Preliminary FEATURES Access Times of 100, 120, 150ns Unlock Bypass Program command * Reduces overall programming time when issuing multiple program command sequences Packaging * 119 ball stacked TSOP BGA Ready/Busy output (RY/BY) * Hardware method for detecting program or erase cycle completion 1,000,000 Erase/Program Cycles Sector Architecture * One 16KByte, two 8KBytes, one 32KByte, and fifteen 64kBytes in byte mode Hardware reset pin (RESET) * Hardware method of resetting the internal state machine to the read mode * Any combination of sectors can be concurrently erased. Also supports full chip erase WP/ACC input pin * Write protect (WP#) function allows protection of two outermost boot sectors, regardless of sector protect status Organized as 2Mx64 Commercial, Industrial and Military Temperature Ranges 3.3 Volt for Read and Write Operations Simultaneous Read/Write Operation * Acceleration (ACC) function accelerates program timing * Data can be continuously read from one bank while executing erase/program functions in other banks Sector Protection * Hardware method of locking a sector, either in-system or using programming equipment, to prevent any program or erase operation within that sector Embedded Erase and Program Algorithms Erase Suspend/Resume * Supports reading data from or programing data to a sector not being erased * Temporary Sector Unprotect allows changing data in protected sectors in-system Data Polling and Toggle Bits * Provides a software method of detecting the status of program or erase cycles Note: For programming information refer to Flash Programming WEDPF2M64-XXX3 Application Note. * Preliminary data sheet. This data sheet describes a product that is not fully qualified or characterized and is subject to change without notice. Note: This data sheet describes a product that is not fully qualified or characterized and is subject to change without notice. February 2001 Rev. 0 1 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com WEDPF2M64-XBX3 PIN CONFIGURATION FOR WF1M32B-XG2TX3 PIN DESCRIPTION TOP VIEW 1 A 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A2 A1 DQ57 DQ48 DQ35 DQ34 DQ4 DQ32 DQ19 DQ18 DQ24 CE4 CE2 A B A5 A4 A3 DQ5 DQ56 DQ43 DQ42 DQ41 DQ33 DQ27 DQ26 DQ17 CE3 CE1 OE C A18 A17 A7 A6 DQ49 VCC VCC VCC VCC VCC DQ25 DQ16 DQ DQ8 DQ1 D A21 E A19 RESET WE1 A20 A08 RY/BY WP/AC A09 DQ61 VCC VCC VCC VCC VCC DQ09 DQ2 DQ1 DQ3 DQ11 VSS VSS VSS VSS VSS DQ47 DQ12 DQ05 DQ13 DQ04 F A11 A10 A13 WE4 DQ53 VSS VSS VSS VSS VSS DQ39 DQ21 DQ30 DQ14 DQ06 G A12 A15 WE2 DQ51 DQ52 DQ62 DQ63 DQ44 DQ37 DQ38 DQ20 DQ29 DQ23 DQ15 DQ07 H A14 WE3 DQ58 DQ59 DQ60 DQ54 DQ55 DQ36 DQ45 DQ46 DQ28 DQ22 DQ31 A16 NC I/O0-31 Data Inputs/Outputs A0-19 Address Inputs WE1-4 Write Enables CS1-4 Chip Selects OE Output Enable RESET Reset/Powerdown VCC Power Supply GND Ground BLOCK DIAGRAM W E1 W E3 W E2 CS 1 W E4 CS 4 CS3 CS2 RY/BY RESET OE A0-20 VCC 2M x 16 BYTE 2M x 16 BYTE 2M x 16 BYTE 2M x 16 WP/ACC I/O0-15 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com 2 I/O16-31 I/O32-47 I/O48-63 BYTE WEDPF2M64-XBX3 ABSOLUTE MAXIMUM RATINGS Parameter CAPACITANCE (TA = +25C) Unit Operating Temperature -55 to +125 C Conditions Max Supply Voltage Range (VCC) -0.5 to +4.0 V OE capacitance COE VIN = 0 V, f = 1.0 MHz 50 pF -0.5 to Vcc +0.5 V WE1-4 capacitance CWE VIN = 0 V, f = 1.0 MHz 20 pF -65 to +150 C CS1-4 capacitance CCS VIN = 0 V, f = 1.0 MHz 20 pF +300 C Data I/O capacitance CI/O VI/O = 0 V, f = 1.0 MHz 20 pF 1,000,000 min. cycles Address input capacitance CAD VIN = 0 V, f = 1.0 MHz 50 pF Signal Voltage Range Storage Temperature Range Lead Temperature (soldering, 10 seconds) Endurance (write/erase cycles) Parameter Symbol This parameter is guaranteed by design but not tested. NOTES: 1. Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. DATA RETENTION RECOMMENDED OPERATING CONDITIONS Parameter Symbol Min Max Unit Parameter Unit Supply Voltage V CC 3.0 3.6 V Minimum Pattern Data Input High Voltage V IH 0.7 x Vcc V CC + 0.3 V Retention Time Input Low Voltage V IL -0.5 +0.8 V Operating Temp. (Mil.) TA -55 +125 C Operating Temp. (Ind.) TA -40 +85 C Test Conditions Min Unit 150C 10 Years 125C 20 Years DC CHARACTERISTICS - CMOS COMPATIBLE (VCC = 3.3V, VSS = 0V, TA = -55C to +125C) Parameter Max Unit I LI V CC = 3.6, V IN = GND or VCC 10 A I LOx32 V CC = 3.6, V IN = GND or VCC 10 A ICC1 CS = VIL, OE = VIH, f = 5MHz 65 mA VCC Active Current for Program or Erase (2) ICC2 CS = VIL, OE = VIH 120 mA V CC Standby Current I CC3 V CC = 3.6, CS = VIH, f = 5MHz 20 mA V CC Reset Current (2) I CC4 RESET = V SS 0.3V 1 20 mA Automatic Sleep Mode (2,4) I CC5 V IH = V CC 0.3 V; V IL = V SS 0.3 V 1 20 mA V CC Active Read-While-Program Current (1,2) I CC6 V CC Active Program-While-Erase Current (1,2) I CC7 V CC Active Program-While-Erase-Suspended Current (2,5) I CC8 A CC Accelerated Program Current I ACC Output Low Voltage VOL I OL = 5.8 mA, V CC = 3.0 Output High Voltage V OH1 I OH = -2.0 mA, V CC = 3.0 Low V CC Lock-Out Voltage (4) V LKO Input Leakage Current Output Leakage Current VCC Active Current for Read (1) Symbol Conditions Min Typ CE = V IL, OE = V IH Word 86 180 mA CE = V IL, OE = V IH Word 85 180 mA CE = V IL, OE = V IH 70 140 mA CE = V IL, OE = V IH 60 120 mA ACC Pin 0.45 0.85 X 2.3 V CC V V 2.5 V NOTES: 1. The I CC current listed includes both the DC operating current and the frequency dependent component (at 5 MHz). The frequency component typically is less than 8 mA/MHz, with OE at V IH. 2. I CC active while Embedded Algorithm (program or erase) is in progress. 3. DC test conditions: V IL = 0.3V, VIH = V CC - 0.3V 4. Guaranteed by design, but not tested. 3 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com WEDPF2M64-XBX3 AC CHARACTERISTICS - WRITE/ERASE/PROGRAM OPERATIONS,CS CONTROLLED (VCC = 3.3V, VSS = 0V, TA = -55C to +125C) Parameter Symbol -100 Min -120 Max Min -150 Max Min Unit Max Write Cycle Time t AVAV t WC 100 120 150 Write Enable Setup Time t WLEL t WS 0 0 0 ns Chip Select Pulse Width t ELEH t CP 45 50 50 ns Address Setup Time t AVEL t AS 0 0 0 ns Data Setup Time t DVEH t DS 45 50 50 ns Data Hold Time t EHDX t DH 0 0 0 ns Address Hold Time t ELAX t AH 45 50 50 ns t EHEL t CPH 20 Chip Select Pulse Width High 20 ns 20 ns Duration of Byte Programming Operation (1) t WHWH1 300 300 300 s Sector Erase Time t WHWH2 15 15 15 sec 50 sec Read Recovery Time (2) t GHEL 0 Chip Programming Time 0 50 s 0 50 1. Typical value for tWHWH1 is 9s. 2. Guaranteed by design, but not tested. AC TEST CIRCUIT AC TEST CONDITIONS Parameter I OL Current Source VZ D.U.T. 1.5V (Bipolar Supply) C eff = 50 pf I OH Current Source White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com 4 Typ Unit Input Pulse Levels VIL = 0, VIH = 2.5 V Input Rise and Fall 5 ns Input and Output Reference Level 1.5 V Output Timing Reference Level 1.5 V NOTES: V Z is programmable from -2V to +7V. I OL & IOH programmable from 0 to 16mA. Tester Impedance Z 0 = 75 . V Z is typically the midpoint of V OH and V OL. I OL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance. WEDPF2M64-XBX3 AC CHARACTERISTICS - WRITE/ERASE/PROGRAM OPERATIONS - WE CONTROLLED (VCC = 3.3V, T A = -55C to +125C) Parameter Symbol -100 Min tWC -120 Max 100 Min -150 Max 120 Min Unit Max Write Cycle Time tAVAV 150 ns Chip Select Setup Time tELWL tCS 0 0 0 ns Write Enable Pulse Width tWLWH tWP 50 50 65 ns Address Setup Time tAVWL tAS 0 0 0 ns Data Setup Time tDVWH tDS 50 50 65 ns Data Hold Time tWHDX tDH 0 0 0 ns ns Address Hold Time tWLAX tAH 50 50 65 Write Enable Pulse Width High tWHWL tWPH 30 30 35 Duration of Byte Programming Operation (1) tWHWH1 300 300 300 s Sector Erase tWHWH2 15 15 15 sec Read Recovery Time before Write (3) tGHWL 0 V CC Setup Time t VCS 50 0 s 0 50 Chip Programming Time ns s 50 50 50 50 sec Output Enable Setup Time tOES 0 0 0 ns Output Enable Hold Time (2) tOEH 10 10 10 ns Address Setup Time to OE# low during toggle bit polling t ASO 7 15 ns Address Hold Time From CE# or OE# high during toggle t AHT 0 0 0 ns Output Enable High during toggle bit polling t OEPH 20 20 20 ns t TS/W 0 0 0 ns t WHWH1 4 4 4 s Latency Between Read and Write Operations Accelerated Programming Operation Write Recovery Time from RY/BY# Program/Erase Valis to RY.BY# t RB 0 0 0 ns t BUSY 90 90 90 ns 1. Typical value for tWHWH1 is 9s. 2. For Toggle and Data Polling. 3. Guaranteed by design, but not tested. AC CHARACTERISTICS - READ-ONLY OPERATIONS (VCC = 3.3V, T A = -55C to +125C) Parameter Symbol -100 Min -120 Max 100 Min -150 Max 120 Min Unit Max Read Cycle Time t AVAV t RC Address Access Time t AVQV t ACC 100 120 150 150 ns Chip Select Access Time t ELQV t CE 100 120 150 ns Output Enable to Output Valid t GLQV t OE 40 50 55 ns ns Chip Select High to Output High Z (1) t EHQZ t DF 30 30 40 ns Output Enable High to Output High Z (1) t GHQZ t DF 30 30 40 ns Output Hold from Addresses, CS or OE Change, whichever is First t AXQX t OH 0 0 0 ns 1. Guaranteed by design, not tested. 5 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com WEDPF2M64-XBX3 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com 6 RY/BY RESET Outputs WE OE CS Addresses OV High Z tACC tCE tOE Addresses Stable tRC Output Valid tOH tDF High Z fig3/waveforms.eps AC WAVEFORMS FOR READ OPERATIONS WEDPF2M64-XBX3 AC CHARACTERISTICS - HARDWARE RESET (RESET#) Parameter Symbol -100 Min -120 Max Min -150 Max Min Unit Max RESET# Pin Low (During Embedded Algorithms) to Read Mode (See Note) t ready RESET# Pin Low (NOT During Embedded Algorithms) to Read Mode (See Note) t ready RESET # Pulse Width t RP 500 500 500 ns RESET High Time Before Read (See Note) t RH 50 50 50 ns RESET # Low to Standby Mode t RPD 20 20 20 s RY/BY# Recovery Time t RB 0 0 0 ns 20 20 500 20 500 500 s ns Note: Not 100% tested. RY/BY# CE#, OE# tRH RESET# tRP tReady Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms tReady RY/BY# tRB CE#, OE# RESET# tRP 7 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com A0H tDS RY/BY Data WE OE CS tCS tGHWL tWP 8 tWC AAAH White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com Addresses NOTES: 1. PA is the address of the memory location to be programmed. 2. PD is the data to be programmed at byte address. 3. D7 is the output of the complement of the data written to each chip. 4. DOUT is the output of the data written to the device. 5. Figure indicates last two bus cycles of four bus cycle sequence. tDH tWPH tAS PA PD tAH tbusy tWHWH1 Data Polling D7 PA DOUT trb tOE tRC tDF WRITE/ERASE/PROGRAM OPERATION, WE CONTROLLED tOH WEDPF2M64-XBX3 WEDPF2M64-XBX3 AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS NOTE: 1. SA is the sector address for Sector Erase. 9 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com WEDPF2M64-XBX3 AC WAVEFORMS FOR DATA POLLING DURING EMBEDDED ALGORITHM OPERATIONS CE OE WE RY/BY Fig. 21 Data Polling Timings (During Embedded Algorithms) White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com 10 WEDPF2M64-XBX3 ALTERNATE CS CONTROLLED PROGRAMMING OPERATION TIMINGS NOTES: 1. PA represents the address of the memory location to be programmed. 2. PD represents the data to be programmed at byte address. 3. D7 is the output of the complement of the data written to each chip. 4. DOUT is the output of the data written to the device. 5. Figure indicates the last two bus cycles of a four bus cycle sequence. 11 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com WEDPF2M64-XBX3 PACKAGE 509: 68 LEAD, LOW PROFILE CERAMIC QUAD FLAT PACK, CQFP (G2T) ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com 12 WEDPF2M64-XBX3 PACKAGE 401: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H) ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES 13 White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com WEDPF2M64-XBX3 ORDERING INFORMATION WED P F 2M64 B - XXX X B 3 PROGRAMMING VOLTAGE 3 = 3.3V DEVICE GRADE: M = Military Screened I = Industrial C = Commercial -55C to +125C -40C to +85C 0C to +70C PACKAGE TYPE: B = 119 Stacked TSOP BGA ACCESS TIME (ns) IMPROVEMENT MARK B = Boot Block (Bottom Sector) ORGANIZATION, 2M x 64 User configurable as 2M x 32, 8 x 16 or 16M x 8 Flash Plastic WHITE ELECTRONIC DESIGNS CORP. White Electronic Designs Corporation * (602) 437-1520 * www.whiteedc.com 14