THS3110
THS3111
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........................................................................................................................................ SLOS422E –SEPTEMBER 2003–REVISED OCTOBER 2009
PRINTED-CIRCUIT BOARD LAYOUT • Connections to other wideband devices on the
TECHNIQUES FOR OPTIMAL board may be made with short direct traces or
PERFORMANCE through onboard transmission lines. For short
connections, consider the trace and the input to
Achieving optimum performance with a the next device as a lumped capacitive load.
high-frequency amplifier, such as the THS3110 and Relatively wide traces [0.05 inch (1,3 mm) to 0.1
THS3111, requires careful attention to board layout inch (2,54 mm)] should be used, preferably with
parasitic and external component types. ground and power planes opened up around
Recommendations that optimize performance include: them. Estimate the total capacitive load and
• Minimize parasitic capacitance to any ac ground determine if isolation resistors on the outputs are
for all of the signal I/O pins. Parasitic capacitance necessary. Low parasitic capacitive loads (< 4 pF)
on the output and input pins can cause instability. may not need an RSsince the THS3110 and
To reduce unwanted capacitance, a window THS3111 are nominally compensated to operate
around the signal I/O pins should be opened in all with a 2-pF parasitic load. Higher parasitic
of the ground and power planes around those capacitive loads without an RSare allowed as the
pins. Otherwise, ground and power planes should signal gain increases (increasing the unloaded
be unbroken elsewhere on the board. phase margin). If a long trace is required, and the
• Minimize the distance [< 0.25 inch (6,35 mm)] 6-dB signal loss intrinsic to a doubly-terminated
from the power-supply pins to high frequency transmission line is acceptable, implement a
0.1-μF and 100-pF decoupling capacitors. At the matched impedance transmission line using
device pins, the ground and power plane layout microstrip or stripline techniques (consult an ECL
should not be in close proximity to the signal I/O design handbook for microstrip and stripline layout
pins. Avoid narrow power and ground traces to techniques). A 50-Ωenvironment is not necessary
minimize inductance between the pins and the onboard, and in fact, a higher impedance
decoupling capacitors. The power-supply environment improves distortion as shown in the
connections should always be decoupled with distortion versus load plots. With a characteristic
these capacitors. Larger (6.8 μF or more) board trace impedance based on board material
tantalum decoupling capacitors, effective at lower and trace dimensions, a matching series resistor
frequency, should also be used on the main into the trace from the output of the
supply pins. These may be placed somewhat THS3110/THS3111 is used as well as a
farther from the device and may be shared among terminating shunt resistor at the input of the
several devices in the same area of the PC board. destination device. Remember also that the
terminating impedance is the parallel combination
• Careful selection and placement of external of the shunt resistor and the input impedance of
components preserve the high-frequency the destination device: this total effective
performance of the THS3110 and THS3111. impedance should be set to match the trace
Resistors should be a very low reactance type. impedance. If the 6-dB attenuation of a
Surface-mount resistors work best and allow a doubly-terminated transmission line is
tighter overall layout. Again, keep their leads and unacceptable, a long trace can be
PC board trace length as short as possible. Never series-terminated at the source end only. Treat
use wirewound-type resistors in a high-frequency the trace as a capacitive load in this case. This
application. Because the output pin and inverting does not preserve signal integrity as well as a
input pins are the most sensitive to parasitic doubly-terminated line. If the input impedance of
capacitance, always position the feedback and the destination device is low, there is some signal
series output resistors, if any, as close as possible attenuation due to the voltage divider formed by
to the inverting input pins and output pins. Other the series output into the terminating impedance.
network components, such as input termination
resistors, should be placed close to the • Socketing a high-speed part like the THS3110 and
gain-setting resistors. Even with a low parasitic THS3111 is not recommended. The additional
capacitance shunting the external resistors, lead length and pin-to-pin capacitance introduced
excessively high resistor values can create by the socket can create an extremely
significant time constants that can degrade troublesome parasitic network which can make it
performance. Good axial metal-film or almost impossible to achieve a smooth, stable
surface-mount resistors have approximately 0.2 frequency response. Best results are obtained by
pF in shunt with the resistor. For resistor values soldering the THS3110/THS3111 parts directly
greater than 2.0 kΩ, this parasitic capacitance can onto the board.
add a pole and/or a zero that can affect circuit
operation. Keep resistor values as low as
possible, consistent with load driving
considerations.
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Product Folder Link(s): THS3110 THS3111