Document Number: 60066
Revision 24-Feb-06
www.vishay.com
150
TA 33
Vishay Sfernice
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Dual Value, Chip Resistor Center Tap
Actual Size
SCHEMATIC
These tantalum chips combine excellent stability 0.07 %
(2000 hours, rated power at 70 °C) with great power han-
dling capacity. Two bonding pads per termination allow
greater flexibility in hybrid layout design.
RT
R1R2
RT = R1 + R2 with R1 = R2 Standard
FEATURES
• Center tap feature
• Resistor material: self - passivating
Tantalum Nitride
• Silicon substrate for good power dissipation
• Low cost
TEST SPECIFICATIONS CONDITIONS
MATERIAL TANTALUM NITRIDE
Resistance Range 50 ohms to 500 Kohms for RT = R1 + R2
TCR: Tracking ± 5 ppm/°C
-
55 °C to + 155 °C
Absolute ± 100 ppm/°C (± 50 ppm/°C on Request)
-
55 °C to + 155 °C
Tolerance: Ratio 1/1 standard
Absolute ± 0.5 %, ± 1 %, ± 2 %
Matching ± 0.5 % Standard
Power Dissipation 250 mW at + 25 °C, 125 mW at + 70 °C, 50 mW at + 125 °C
Stability ± 0.07 % typical, ± 0.1 Max. 2000 hrs. at +70 °C under Pn
Working Voltage 50 Volts DC on RT
Operating Temperature Range
-
55 °C to + 155 °C
Storage Temperature Range
-
55 °C to + 155 °C
Noise <
-
35 dB typical MIL-STD-202 Method 308
Thermal EMF 0.01 µV/°C
Shelf Life Stability 100 ppm 1 year at + 25 °C
STANDARD ELECTRICAL SPECIFICATIONS
ABS TRACKING
TCR 100 ppm/°C 5 ppm/°C
ABS RATIO
TOL 0.5 % 0.5 %
◆
TYPICAL PERFORMANCE
RoHS
COMPLIANT