LM4916
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LM4916 1.5V, Mono 85mW BTL Output, 14mW Stereo
Headphone Audio Amplifier
Check for Samples: LM4916
1FEATURES DESCRIPTION
The unity gain stable LM4916 is both a mono
2• Single-Cell 0.9V to 2.5V Battery Operation differential output (for bridge-tied loads or BTL) audio
• BTL Mode for Mono Speaker power amplifier and a Single Ended (SE) stereo
• Single-Ended Headphone Operation with headphone amplifier. Operating on a single 1.5V
Coupling Capacitors supply, the mono BTL mode delivers 85mW into an
8Ωload at 1% THD+N. In Single Ended stereo
• Unity-Gain Stable headphone mode, the amplifier delivers 14mW per
• "Click and Pop" Suppression Circuitry channel into a 16Ωload at 1% THD+N.
• Active-Low Micropower Shutdown With the LM4916 packaged in the MM and WSON
• Low Current, Active-Low Mute Mode packages, the customer benefits include low profile
• Thermal Shutdown Protection Circuitry and small size. These packages minimize PCB area
and maximizes output power.
APPLICATIONS The LM4916 features circuitry that reduces output
transients ("clicks" and "pops") during device turn-on
• Portable One-Cell Audio Products and turn-off, an externally controlled, low-power
• Portable One-Cell Electronic Devices consumption, active-low shutdown mode, and thermal
shutdown. Boomer audio power amplifiers are
KEY SPECIFICATIONS designed specifically to use few external components
and provide high quality output power in a surface
• Mono-BTL Output Power mount package.
• (RL=8Ω, VDD=1.5V, THD+N=1%), 85mW (typ)
• Stereo Headphone Output Power
• (RL=16Ω, VDD=1.5V, THD+N=1%), 14mW (typ)
• Micropower Shutdown Current, 0.02µA (typ)
• Supply Voltage Operating Range,
0.9V<VDD<2.5V
• PSRR 1kHz, VDD=1.5V, 66dB (typ)
Typical Application
Figure 1. Block Diagram
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2003–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM4916
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Connection Diagrams
Top View Top View
Figure 2. VSSOP Package Figure 3. WSON Package
See Package Number DGS0010A See Package Number NGY0010A
Typical Connections
Figure 4. Typical Single Ended Output Configuration Circuit
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Figure 5. Typical BTL Speaker Configuration Circuit
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS(1)(2)
Supply Voltage 3.6V
Storage Temperature −65°C to +150°C
Input Voltage −0.3V to VDD +0.3V
Power Dissipation(3) Internally limited
ESD Susceptibility(4) 2000V
ESD Susceptibility(5) 200V
Junction Temperature 150°C
Soldering Information Small Outline Package Vapor Phase (60sec) 215°C
Infrared (15 sec) 220°C
Thermal Resistance θJA (typ) DGS0010A 175°C/W
θJA (typ) NGY0010A 73°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) The maximum power dissipation is dictated by TJMAX,θJA, and the ambient temperature TAand must be derated at elevated
temperatures. The maximum allowable power dissipation is PDMAX = (TJMAX −TA)/θJA. For the LM4916, TJMAX = 150°C. For the θJAs,
please see the APPLICATION INFORMATION section or the ABSOLUTE MAXIMUM RATINGS()() section.
(4) Human body model, 100pF discharged through a 1.5kΩresistor.
(5) Machine model, 220pF–240pF discharged through all pins.
OPERATING RATINGS
Temperature Range TMIN ≤TA≤TMAX −40°C ≤TA≤85°C
Supply Voltage(1) 0.9V ≤VDD ≤2.5V
(1) When operating on a power supply voltage of 0.9V, the LM4916 willl not function below 0°C. At a power supply voltage of 1V or greater,
the LM4916 will operate down to -40°C.
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ELECTRICAL CHARACTERISTICS FOR THE LM4916(1)(2)
The following specifications apply for the circuit shown in Figure 38 operating with VDD = 1. 5V, unless otherwise specified.
Limits apply for TA= 25°C. LM4916 Units
Parameter Test Conditions (Limits)
Typ(3) Limit(4)
0.9 V (min)
VDD Supply Voltage(5)(6))2.5 V (max)
IDD Quiescent Power Supply Current VIN = 0V, IO= 0A, RL=∞See(7) 1.0 1.4 mA (max)
ISD Shutdown Current VSHUTDOWN = GND 0.02 μA (max)
VOS Output Offset Voltage BTL 5 50 mV (max)
f = 1kHz
POOutput Power(8) RL= 8ΩBTL, THD+N = 1% 85 70 mW (min)
RL= 16ΩSE, THD+N = 1% 14 mW
RL= 8Ω, BTL, PO= 25mW, f = 1kHz 0.1
THD+N Total Harmonic Distortion + Noise 0.5 %
RL= 16Ω, SE, PO= 5mW, f = 1kHz 0.2
VNO Output Voltage Noise 20Hz to 20kHz, A-weighted 10 µVRMS
IMUTE Mute Current VMUTE = 0, SE 15 µA
Crosstalk RL= 16Ω, SE 55 dB (min)
VRIPPLE = 200mVP-P
CBYPASS = 4.7µF, RL= 8Ω62 dB
f = 1kHz, BTL
PSRR Power Supply Rejection Ratio VRIPPLE = 200mVP-P sine wave
CBYPASS = 4.7µF, RL= 16Ω66 dB (min)
f = 1kHz, SE
VIH Control Logic High 0.7 V (min)
VIL Control Logic Low 0.3 V (max)
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(2) All voltages are measured with respect to the ground (GND) pins unless otherwise specified.
(3) Typicals are measured at 25°C and represent the parametric norm.
(4) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(5) When operating on a power supply voltage of 0.9V, the LM4916 willl not function below 0°C. At a power supply voltage of 1V or greater,
the LM4916 will operate down to -40°C.
(6) Ripple on power supply line should not exceed 400mVpp.
(7) The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier.
(8) Output power is measured at the device terminals.
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THD + N (%)
OUTPUT POWER (W)
1m 10m 100m
0.001
0.2
10
0.002
0.005
0.01
0.02
0.05
0.1
0.5
1
2
5
2m 5m 20m 50m
1 3 630
OUTPUT POWER (mW)
0.01
0.1
1
10
0.02
0.05
.02
0.5
2
5
THD + N (%)
875
42
0.001
0.002
0.005
20
10
20 200 2k 20k
FREQUENCY (Hz)
0.01
0.1
1
10
0.02
0.05
.02
0.5
2
5
THD + N (%)
10k
5k
1k
500
10050
20 200 2k 20k
FREQUENCY (Hz)
0.01
0.1
1
10
0.02
0.05
.02
0.5
2
5
THD + N (%)
10k
5k
1k
500
10050
20 200 2k 20k
FREQUENCY (Hz)
0.01
0.1
1
10 R
0.02
0.05
.02
0.5
2
5
THD + N (%)
10k
5k500
10050 1k
20 200 2k 20k
FREQUENCY (Hz)
0.01
0.1
1
10
0.02
0.05
.02
0.5
2
5
THD + N (%)
10k
5k
1k
500
10050
LM4916
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TYPICAL PERFORMANCE CHARACTERISTICS
THD+N
vs THD+N
Frequency vs Frequency
VDD = 1.5V, PO= 5mW, RL= 16ΩVDD = 1.5V, RL= 8Ω, PO= 25mW
BW < 80kHz, Single Ended Output BTL Output, AV= -1
Figure 6. Figure 7.
THD+N THD+N
vs Frequency vs Frequency
VDD = 1.2V, PO= 5mW VDD = 1.2V, RL= 8Ω, PO= 25mW
RL= 16Ω, Single Ended Output, AV= -1 BTL Output, AV= -1
Figure 8. Figure 9.
THD+N THD+N
vs Output Power vs Output Power
VDD = 1.5V, RL= 16Ω, f = 1kHz VDD = 1.5V, RL= 8Ω, f = 1kHz
Single Ended Output, AV= -1 BTL Output, AV= -1
Figure 10. Figure 11.
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OUTPUT POWER (mW)
10 20 30
0
120
40
60
80
100
140
20
LOAD RESISTANCE :
1% THD + N
10% THD + N
OUTPUT POWER (mW)
16 32 48 64 80 96 112 128
0
18
10
12
14
16
20
2
4
6
8
LOAD RESISTANCE :
10% THD + N
1% THD + N
1 1.5 2 2.5
0
5
10
15
20
25
30
35
40
45
50
OUTPUT POWER (mW)
SUPPLY VOLTAGE (V)
1% THD + N
10% THD + N
0.75 11.25 1.5 1.75 2.0 2.25 2.5
SUPPLY VOLTAGE (V)
0
50
100
150
200
250
300
350
OUTPUT POWER (mW)
10% THD + N
1% THD + N
13630
OUTPUT POWER (mW)
0.01
0.1
1
10
0.02
0.05
.02
0.5
2
5
THD + N (%)
8
75
42
0.001
0.002
0.005
20
10
THD + N (%)
OUTPUT POWER (W)
1m 10m 100m
0.001
0.2
10
0.002
0.005
0.01
0.02
0.05
0.1
0.5
1
2
5
2m 5m 20m 50m
LM4916
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
THD+N THD+N
vs Output Power vs Output Power
VDD = 1.2V, RL= 16Ω, f = 1kHz VDD = 1.2V, RL= 8Ω, f = 1kHz
Single Ended Output, AV= -1 BTL Output, AV= -1
Figure 12. Figure 13.
Output Power Output Power
vs Supply Voltage vs Supply Voltage
f = 1kHz, RL= 16Ω, f = 1kHz, RL= 8Ω,
Single Ended Output, AV= -1 BTL Output, AV= -1
Figure 14. Figure 15.
Output Power Output Power
vs Load Resistance vs Load Resistance
VDD = 1.5V, f = 1kHz VDD = 1.5V, f = 1kHz
Single Ended Output, AV= -1 BTL Output, AV= -1
Figure 16. Figure 17.
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20 500 2k
-85
-75
-65
-55
-45
-30
-20
-10
0
OUTPUT LEVELS (dB)
-60
-50
-40
-35
-25
-15
-5
50
-100
-95
-80
-70
-90
100 20k10k5k200 1k
FREQUENCY (Hz)
20 500 2k
-85
-75
-65
-55
-45
-30
-20
-10
0
PSRR (dB)
-60
-50
-40
-35
-25
-15
-5
50
-100
-95
-80
-70
-90
100 50k
20k
10k
5k
200 1k 100k
FREQUENCY (Hz)
POWER DISSIPATION (mW)
OUTPUT POWER (mW)
040 60 100
0
10
30
40
50
60
70
80
20
20
VDD = 1.2V
VDD = 1.5V
016 32 48 64 80 96 112 128
0
2
4
6
8
10
12
OUTPUT POWER (mW)
10% THD + N
1% THD + N
LOAD RESISTANCE :
OUTPUT POWER (mW)
10 20 30
0
10
20
30
40
50
60
70
80
90
LOAD RESISTANCE :
1% THD+N
10% THD+N
LM4916
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Output Power Output Power
vs Load Resistance vs Load Resistance
VDD = 1.2V, f = 1kHz VDD = 1.2V, f = 1kHz
Single Ended Output, AV= -1 BTL Output, AV= -1
Figure 18. Figure 19.
Power Dissipation Power Dissipation
vs Output Power vs Output Power
f = 1kHz, THD+N < 1%, AV= -1 f = 1kHz, THD+N < 1%
Single Ended Output, Both Channels BTL Output, AV= -1
Figure 20. Figure 21.
Power Supply Rejection Ratio
Channel Separation VDD = 1.5V, VRIPPLE = 200mVPP
RL= 16Ω, PO= 5mW RL= 16Ω, Single Ended Output
Single Ended Output, AV= -1 Input Terminated into 10Ω
Figure 22. Figure 23.
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20 50 100 200
FREQUENCY (Hz)
-12
-8
-6
-4
-2
0
+2
+4
+6
+8
+10
OUTPUT LEVEL (dB)
-10
-14
1k
500 2k 20k10k5k
0.47 PF
0.1 PF
0.33 PF
1.0 PF
20 500 2k
-85
-75
-65
-55
-45
-30
-20
-10
0
PSRR (dB)
-60
-50
-40
-35
-25
-15
-5
50
-100
-95
-80
-70
-90
100 50k
20k
10k
5k
200 1k 100k
FREQUENCY (Hz)
20 500 2k
-85
-75
-65
-55
-45
-30
-20
-10
0
PSRR (dB)
-60
-50
-40
-35
-25
-15
-5
50
-100
-95
-80
-70
-90
100 50k
20k
10k
5k
200 1k 100k
FREQUENCY (Hz)
20 100 1k 10k 100k
FREQUENCY (Hz)
-80
-75
-65
-50
-35
-15
0
PSRR (dB)
-55
-60
-45
-40
-30
-25
-20
-10
-5
-70
-100
-95
-90
-85
2k200
50 5k 20k 50k
500
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Power Supply Rejection Ratio Power Supply Rejection Ratio
VDD = 1.5V, VRIPPLE = 200mVPP VDD = 1.2V, VRIPPLE = 200mVPP
RL= 8Ω, BTL RL= 16Ω, Single Ended Output
Input Terminated into 10ΩInput Terminated into 10Ω
Figure 24. Figure 25.
Power Supply Rejection Ratio Frequency Response
VDD = 1.2V, VRIPPLE = 200mVPP vs Input Capacitor Size
RL= 8Ω, BTL VDD = 1.5V, RL= 16Ω
Input Terminated into 10ΩAV = -1, BW < 80kHz, Single Ended Output
Figure 26. Figure 27.
Frequency Response
vs Input Capacitor Size
VDD = 1.5V, RL= 8ΩOpen Loop Frequency Response
AV = -1, BW < 80kHz, BTL Output VDD = 1.5V, No load
Figure 28. Figure 29.
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0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
SHUTDOWN VOLTAGE (V)
SUPPLY CURRENT (mA)
SD OFF
(Play)
SD ON
AMBIENT TEMPERATURE (C)
0 50 200
0
.03
.04
.05
.06
.07
POWER DISSIPATION (W)
150100
.01
.02
BTL
SE
0.8 1.3 1.8 2.3
SUPPLY VOLTAGE (V)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
SUPPLY CURRENT (mA)
BTL
SE
0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5
SUPPLY VOLTAGE (V)
0
0.05
0.1
0.15
0.2
0.25
0.3
DROPOUT VOLTAGE (V)
Top
Bottom
LM4916
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Supply Voltage Clipping Voltage
vs Supply Current vs Supply Voltage
Figure 30. Figure 31.
Noise Floor Noise Floor
VDD = 1.5V, Single Ended Output VDD = 1.5V, BTL Output
16Ω, 80kHz Bandwith 8Ω, 80kHz Bandwith
Figure 32. Figure 33.
Shutdown Hystresis Voltage Power Derating Curve
VDD = 1.5V VDD = 1.5V
Figure 34. Figure 35.
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1 10 1k 100k
90
50
40
30
20
10
0
MUTE ATTENUATION (dB)
10k
100
80
70
60
LOAD RESISTANCE :
00.0
10.0
20.0
3
Shutdown Current (uA)
0.04
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Mute Attenuation Shutdown Current
vs Load Resistance Distribution
Figure 36. Figure 37.
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APPLICATION INFORMATION
SINGLE ENDED (SE) CONFIGURATION EXPLANATION
As shown in Figure 4, the LM4916 has two operational amplifiers internally, which have externally configurable
gain. The closed loop gain of the two configurable amplifiers is set by selecting the ratio of Rf to Ri.
Consequently, the gain for each channel of the IC is
AVD = -(Rf/ Ri) (1)
When the LM4916 operates in Single Ended mode, coupling capacitors are used on each output (VoA and VoB)
and the SE/BTL pin (Pin 8) is connected to ground. These output coupling capacitors blocks the half supply
voltage to which the output amplifiers are typically biased and couples the audio signal to the headphones or
other single-ended (SE) loads. The signal return to circuit ground is through the headphone jack's sleeve.
BRIDGED (BTL) CONFIGURATION EXPLANATION
As shown in Figure 5, the LM4916 has two internal operational amplifiers. The first amplifier's gain is externally
configurable, while the second amplifier should be externally fixed in a unity-gain, inverting configuration. The
closed-loop gain of the first amplifier is set by selecting the ratio of Rfto Riwhile the second amplifier's gain
should be fixed by the two external 20kΩresistors. Figure 5 shows that the output of amplifier one serves as the
input to amplifier two which results in both amplifiers producing signals identical in magnitude, but out of phase
by 180°. Consequently, the differential gain for the IC is
AVD = 2 *(Rf/ Ri). (2)
By driving the load differentially through outputs Vo1 and Vo2, an amplifier configuration commonly referred to as
"bridged mode" is established. Bridged mode operation is different from the classical single-ended amplifier
configuration where one side of the load is connected to ground. A bridge amplifier design has a few distinct
advantages over the single-ended configuration. It provides a differential drive to the load, thus doubling output
swing for a specified supply voltage. Four times the output power is possible as compared to a single-ended
amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not
current limited or clipped. In order to choose an amplifier's closed-loop gain without causing excessive clipping,
please refer to the AUDIO POWER AMPLIFIER DESIGN section.
A bridge configuration, such as the one used in LM4916, also creates a second advantage over single-ended
amplifiers. Since the differential outputs, Vo1 and Vo2, are biased at half-supply, no net DC voltage exists across
the load. This eliminates the need for an output coupling capacitor which is required in a single supply, single-
ended amplifier configuration.
MODE SELECT DETAIL
The LM4916 can be configured in either Single Ended or BTL mode (see Figure 4 and Figure 5). The default
state of the LM4916 at power up is single ended. During initial power up or return from shutdown, the LM4916
must detect the correct mode of operation by sensing the status of the SE/BTL pin. When the bias voltage of the
part ramps up to 60mV (as seen on the Bypass pin), an internal comparator detects the status of SE/BTL; and at
10mV, latches that value in place. Ramp up of the bias voltage will proceed at a different rate from this point on
depending upon operating mode. BTL mode will ramp up about 11 times faster than Single Ended mode.
Shutdown is not a valid command during this time period (TWU) and should not enabled to ensure a proper power
on reset (POR) signal. In addition, the slew rate of VDD must be greater than 2.5V/ms to ensure reliable POR.
Recommended power up timing is shown in Figure 39 along with proper usage of Shutdown and Mute. The
mode-select circuit is suspended during CBdischarge time. The circuit shown in Figure 38 presents an
applications solution to the problem of using different supply voltages with different turn-on times in a system with
the LM4916. This circuit shows the LM4916 with a 25-50kΩ. Pull-up resistor connected from the shutdown pin to
VDD. The shutdown pin of the LM4916 is also being driven by an open drain output of an external microcontroller
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on a separate supply. This circuit ensures that shutdown is disabled when powering up the LM4916 by either
allowing shutdown to be high before the LM4916 powers on (the microcontroller powers up first) or allows
shutdown to ramp up with VDD (the LM4916 powers up first). This will ensure the LM4916 powers up properly
and enters the correct mode of operation. Please note that the SE/BTL pin (Pin 8) should be tied to GND for
Single Ended mode, and to VDD for BTL mode.
Figure 38. Recommended Circuit for Different Supply Turn-On Timing
Figure 39. Turn-On, Shutdown, and Mute Timing for Cap-Coupled Mode
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POWER DISSIPATION
Power dissipation is a major concern when designing a successful amplifier, whether the amplifier is bridged or
single-ended. A direct consequence of the increased power delivered to the load by a bridge amplifier is an
increase in internal power dissipation. Since the LM4916 has two operational amplifiers in one package, the
maximum internal power dissipation is 4 times that of a single-ended amplifier. The maximum power dissipation
for a given BTL application can be derived from the power dissipation graphs or from Equation 3.
PDMAX = 4*(VDD)2/ (2π2RL) (3)
When operating in Single Ended mode, Equation 4 states the maximum power dissipation point for a single-
ended amplifier operating at a given supply voltage and driving a specified output load.
PDMAX = (VDD)2/ (2π2RL) (4)
Since the LM4916 has two operational amplifiers in one package, the maximum internal power dissipation point
is twice that of the number that results from Equation 4. From Equation 4, assuming a 1.5V power supply and a
16Ωload, the maximum power dissipation point is 7mW per amplifier. Thus the maximum package dissipation
point is 14mW.
The maximum power dissipation point obtained from either Equation 3 or Equation 4must not be greater than the
power dissipation that results from Equation 5:
PDMAX = (TJMAX - TA) / θJA (5)
For package DGS0010A, θJA = 175°C/W. TJMAX = 150°C for the LM4916. Depending on the ambient
temperature, TA, of the system surroundings, Equation 5 can be used to find the maximum internal power
dissipation supported by the IC packaging. If the result of Equation 3 or Equation 4 is greater than that of
Equation 5, then either the supply voltage must be decreased, the load impedance increased or TAreduced. For
the typical application of a 1.5V power supply, with a 16Ωload, the maximum ambient temperature possible
without violating the maximum junction temperature is approximately 146°C provided that device operation is
around the maximum power dissipation point. Thus, for typical applications, power dissipation is not an issue.
Power dissipation is a function of output power and thus, if typical operation is not around the maximum power
dissipation point, the ambient temperature may be increased accordingly. Refer to the Typical Performance
Characteristics curves for power dissipation information for lower output powers.
EXPOSED-DAP PACKAGE PCB MOUNTING CONSIDERATIONS
The LM4916's exposed-DAP (die attach paddle) package (LD) provides a low thermal resistance between the die
and the PCB to which the part is mounted and soldered. This allows rapid heat transfer from the die to the
surrounding PCB copper traces, ground plane, and surrounding air.
The LD package should have its DAP soldered to a copper pad on the PCB. The DAP's PCB copper pad may be
connected to a large plane of continuous unbroken copper. This plane forms a thermal mass, heat sink, and
radiation area. Further detailed and specific information concerning PCB layout, fabrication, and mounting an LD
(WSON) package is available from Texas Instruments' Package Engineering Group under application note AN-
1187.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is important for low noise performance and high power supply
rejection. The capacitor location on the power supply pins should be as close to the device as possible. Typical
applications employ a battery (or 1.5V regulator) with 10µF tantalum or electrolytic capacitor and a ceramic
bypass capacitor that aid in supply stability. This does not eliminate the need for bypassing the supply nodes of
the LM4916. A bypass capacitor value in the range of 0.1µF to 1µF is recommended.
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MICRO POWER SHUTDOWN
The voltage applied to the SHUTDOWN pin controls the LM4916's shutdown function. Activate micro-power
shutdown by applying a logic-low voltage to the SHUTDOWN pin. When active, the LM4916's micro-power
shutdown feature turns off the amplifier's bias circuitry, reducing the supply current. The trigger point varies
depending on supply voltage and is shown in the Shutdown Hysteresis Voltage graphs in the Typical
Performance Characteristics section. The low 0.02µA (typ) shutdown current is achieved by applying a voltage
that is as near as ground as possible to the SHUTDOWN pin. A voltage that is higher than ground may increase
the shutdown current. There are a few ways to control the micro-power shutdown. These include using a single-
pole, single-throw switch, a microprocessor, or a microcontroller. When using a switch, connect an external
100kΩpull-up resistor between the SHUTDOWN pin and VDD. Connect the switch between the SHUTDOWN pin
and ground. Select normal amplifier operation by opening the switch. Closing the switch connects the
SHUTDOWN pin to ground, activating micro-power shutdown. The switch and resistor ensure that the
SHUTDOWN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or
microcontroller, use a digital output to apply the control voltage to the SHUTDOWN pin. Driving the SHUTDOWN
pin with active circuitry eliminates the pull-up resistor.
MUTE
When in single ended mode, the LM4916 also features a mute function that enables extremely fast turn-on/turn-
off with a minimum of output pop and click with a low current consumption (≤20µA, typical). The mute function
leaves the outputs at their bias level, thus resulting in higher power consumption than shutdown mode, but also
provides much faster turn on/off times. Providing a logic low signal on the MUTE pin enables mute mode.
Threshold voltages and activation techniques match those given for the shutdown function as well. Mute may not
appear to function when the LM4916 is used to drive high impedance loads. This is because the LM4916 relies
on a typical headphone load (16-32Ω) to reduce input signal feed-through through the input and feedback
resistors. Mute attenuation can thus be calculated by the following formula:
Mute Attenuation (dB) = 20Log[RL/(Ri+RF)]
Parallel load resistance may be necessary to achieve satisfactory mute levels when the application load is known
to be high impedance. The mute function, described above, is not necessary when the LM4916 is operating in
BTL mode since the shutdown function operates quickly in BTL mode with less power consumption than mute. In
these modes, the Mute signal is equivalent to the Shutdown signal. Mute may be enabled during shutdown
transitions, but should not be toggled for a brief period immediately after exiting or entering shutdown. These
brief time periods are labeled X1 (time after returning from shutdown) and X2 (time after entering shutdown) and
are shown in the timing diagram given in Figure 39. X1 occurs immediately following a return from shutdown
(TWU) and lasts 40ms±25%. X2 occurs after the part is placed in shutdown and the decay of the bias voltage
has occurred (2.2*250k*CB) and lasts for 100ms±25%. The timing of these transition periods relative to X1 and
X2 is also shown in Figure 39. While in single ended mode, mute should not be toggled during these time
periods, but may be toggled during the shutdown transitions or any other time the part is in normal operation.
Failure to operate mute correctly may result in much higher click and pop values or failure of the device to mute
at all.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using integrated power amplifiers is critical to optimize
device and system performance. While the LM4916 is tolerant of external component combinations,
consideration to component values must be used to maximize overall system quality. The LM4916 is unity-gain
stable that gives the designer maximum system flexibility. The LM4916 should be used in low gain configurations
to minimize THD+N values, and maximize the signal to noise ratio. Low gain configurations require large input
signals to obtain a given output power. Input signals equal to or greater than 1Vrms are available from sources
such as audio codecs. Very large values should not be used for the gain-setting resistors. Values for Riand Rf
should be less than 1MΩ. Please refer to the section, AUDIO POWER AMPLIFIER DESIGN, for a more
complete explanation of proper gain selection. Besides gain, one of the major considerations is the closed-loop
bandwidth of the amplifier. To a large extent, the bandwidth is dictated by the choice of external components
shown in Figure 4 and Figure 5. The input coupling capacitor, Ci, forms a first order high pass filter that limits low
frequency response. This value should be chosen based on needed frequency response and turn-on time.
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SELECTION OF INPUT CAPACITOR SIZE
Amplifying the lowest audio frequencies requires a high value input coupling capacitor, Ci. A high value capacitor
can be expensive and may compromise space efficiency in portable designs. In many cases, however, the
headphones used in portable systems have little ability to reproduce signals below 60Hz. Applications using
headphones with this limited frequency response reap little improvement by using a high value input capacitor. In
addition to system cost and size, turn on time is affected by the size of the input coupling capacitor Ci. A larger
input coupling capacitor requires more charge to reach its quiescent DC voltage. This charge comes from the
output via the feedback. Thus, by minimizing the capacitor size based on necessary low frequency response,
turn-on time can be minimized. A small value of Ci(in the range of 0.1µF to 0.47µF), is recommended.
Bypass Capacitor Value Selection
Besides minimizing the input capacitor size, careful consideration should be paid to value of CB, the capacitor
connected to the BYPASS pin. Since CBdetermines how fast the LM4916 settles to quiescent operation, its
value is critical when minimizing turn-on pops. The slower the LM4916's outputs ramp to their quiescent DC
voltage (nominally VDD/2), the smaller the turn-on pop. Choosing CBequal to 4.7µF along with a small value of Ci
(in the range of 0.1µF to 0.47µF), produces a click-less and pop-less shutdown function. As discussed above,
choosing Cino larger than necessary for the desired bandwidth helps minimize clicks and pops. This ensures
that output transients are eliminated when power is first applied or the LM4916 resumes operation after
shutdown.
Minimizing External Components
Operating the LM4916 at higher gain settings can minimize the use of external components. For instance, a BTL
configuration with a gain setting greater than 8V/V (AV> 8) makes the output capacitor COunnecessary. For the
Single Ended configuration, a gain setting greater than 4V/V (AV> 4) eliminates the need for output capacitor CO2
and output resistor RO, on each output channel.
If the LM4916 is operating with a lower gain setting (AV< 4), external components can be further minimized only
in Single Ended mode. For each channel, output capacitor (CO2 ) and output resistor (RO) can be eliminated.
These components need to be compensated for by adding a 7.5kΩresistor (RC) between the input pin and
ground pin on each channel (between Pin 1 and GND, and between Pin 5 and GND).
OPTIMIZING CLICK AND POP REDUCTION PERFORMANCE
The LM4916 contains circuitry that eliminates turn-on and shutdown transients ("clicks and pops"). For this
discussion, turn-on refers to either applying the power supply voltage or when the micro-power shutdown mode
is deactivated.
As the VDD/2 voltage present at the BYPASS pin ramps to its final value, the LM4916's internal amplifiers are
configured as unity gain buffers. An internal current source charges the capacitor connected between the
BYPASS pin and GND in a controlled, linear manner. Ideally, the input and outputs track the voltage applied to
the BYPASS pin. The gain of the internal amplifiers remains unity until the voltage on the bypass pin reaches
VDD/2. As soon as the voltage on the bypass pin is stable, the device becomes fully operational and the amplifier
outputs are reconnected to their respective output pins. Although the BYPASS pin current cannot be modified,
changing the size of CBalters the device's turn-on time. There is a linear relationship between the size of CBand
the turn-on time. Here are some typical turn-on times for various values of CB:
Table 1. Single-Ended
CB(µF) TON
0.1 117ms
0.22 179ms
0.47 310ms
1.0 552ms
2.2 1.14s
4.7 2.4s
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Table 2. BTL
CB(µF) TON (ms)
0.1 72
0.22 79
0.47 89
1.0 112
2.2 163
4.7 283
In order to eliminate "clicks and pops", all capacitors must be discharged before turn-on. Rapidly switching VDD
may not allow the capacitors to fully discharge, which may cause "clicks and pops".
AUDIO POWER AMPLIFIER DESIGN
A 25mW/32ΩAudio Amplifier
Given:
Power Output 10mWrms
Load Impedance 16Ω
Input Level 0.4Vrms
Input Impedance 20kΩ
A designer must first choose a mode of operation (SE or BTL) and determine the minimum supply rail to obtain
the specified output power. By extrapolating from the Output Power vs. Supply Voltage graphs in the Typical
Performance Characteristics section, the supply rail can be easily found. 1.5V is a standard voltage in most
applications, it is chosen for the supply rail. Extra supply voltage creates headroom that allows the LM4916 to
reproduce peak in excess of 10mW without producing audible distortion. At this time, the designer must make
sure that the power supply choice along with the output impedance does not violate the conditions explained in
the Power Dissipation section. Once the power dissipation equations have been addressed, the required gain
can be determined from Equation 6.
(6)
From Equation 6, the minimum AV is 1; use AV= 1. Since the desired input impedance is 20k, and with a AVgain
of 1, a ratio of 1:1 results from Equation 3 for Rfto R. The values are chosen with Ri= 20k and Rf= 20k. The
final design step is to address the bandwidth requirements which must be stated as a pair of -3dB frequency
points. Five times away from a -3dB point is 0.17dB down from passband response which is better than the
required ± 0.25dB specified.
fL= 100Hz/5 = 20Hz
fH= 20kHz * 5 = 100kHz
As stated in the Proper Selection of External Components section, Riin conjunction with Cicreates a
Ci≥1 / (2π* 20kΩ* 20Hz) = 0.397µF; use 0.39µF.
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The high frequency pole is determined by the product of the desired frequency pole, fH, and the differential gain,
AV. With an AVV= 1 and fH= 100kHz, the resulting GBWP = 100kHz which is much smaller than the LM4916
GBWP of 3MHz. This example displays that if a designer has a need to design an amplifier with higher
differential gain, the LM4916 can still be used without running into bandwidth limitations.
Revision History
Rev Date Description
1.0 7/11/03 Re-released the D/S to the WEB.
1.1 7/25/06 Deleted the RL labels on curves E5, E6, E3,
and E4, per Allan S., then re-released the
D/S to the WEB.
E 5/03/13 Changed layout of National Data Sheet to TI
format.
Copyright © 2003–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
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PACKAGE OPTION ADDENDUM
www.ti.com 9-Aug-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM4916LD/NOPB ACTIVE WSON NGY 10 1000 Green (RoHS
& no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 L4916
LM4916LDX/NOPB ACTIVE WSON NGY 10 4500 Green (RoHS
& no Sb/Br) CU SN Level-3-260C-168 HR -40 to 85 L4916
LM4916MM/NOPB ACTIVE VSSOP DGS 10 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 GA9
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 9-Aug-2013
Addendum-Page 2
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM4916LD/NOPB WSON NGY 10 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1
LM4916LDX/NOPB WSON NGY 10 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1
LM4916MM/NOPB VSSOP DGS 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Sep-2016
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM4916LD/NOPB WSON NGY 10 1000 210.0 185.0 35.0
LM4916LDX/NOPB WSON NGY 10 4500 367.0 367.0 35.0
LM4916MM/NOPB VSSOP DGS 10 1000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Sep-2016
Pack Materials-Page 2
MECHANICAL DATA
NGY0010A
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LDA10A (Rev B)
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