picoPACK™ General Purpose I/O
Product Technical Brief
Date: 05/2001
picoPACK™ General Purpose I/O
Introduction
The Genera l Purpose I/O module is a synthesiz able
intellectual property block that provides digital input
and output port capabilities for connecting intelligent
components such as microprocessors to the system’s
environment. Several modes are supported for dealing
with asynchronous signals. The module i s part of the
picoPACK IP s eries from picoTurbo, Inc.
Features
•32 bit APB bus
•16 multiple function I/O pins
•Progra mmable direction of the pins
•Events on input lines may generate interrupts
•Event detection modes
–si gnal le vel ch a n ges
–asynchronous signal edges
•Progra mmable polarity of the pins
•Status registers provide information on the pins
•Configuration options
•Targeted at gate a rray and standard cell technologies
•Equivalent NAND2 gate count ≈ 4.4K
Architecture
Applications
•Mobile applications
•High performance multi-CPU controllers
•Low cost single chip controllers
Interface Ports
•32 bit APB bus interface
•16 ge nera l purpose pins
APB Bus Interrupt
Controller
APB
Control
Config
Registers
GPIO Logic
GPIO Interrupt
Data
Select
Address
Control
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[n]
picoPACK™ General Purpose I/O
Bus S uppor t
•AMBA™ 2.0
Functional Description
The General Purpose I/O module pro vides a set of I/O
sig nals being p rogra mmed by an y i ntell ige nt component
such as a microprocessor. In the output direction, logical
values are program med for each signal. In the input
direc tion, t he ra w signal value may be read or level trig-
gered respectively e dge triggered interrupts are gener-
ated.
The General Purpose I/O module is a little endian
device. Please refe r to the AMBA 2.0 spe cificat ion for
further de tails.
Deliverables
•Fully synthe sizabl e VHDL-RTL source code
•Full y synthe sizable VERILOG-RTL source code
•Synopsys synthesis s cripts
•Testbench with functional test vectors
•User documentation
Operating Conditions
For the minimum clock speed there is no limitation due
to fully st atic design. The maximum clock speed
depends on target technology a nd constraining. There-
fore a ny clock frequency from 0 MHz to the ac tual m ax-
imum frequency may be chosen for safe operation.
For more information, please contact:
picoTurbo, Inc.
860 Hillview Court, Suite 160
Milpitas, CA. 95035
Ph: (408) 586-8801
Fax: (408) 586-8802
www.picoturbo.com
info@picoturbo.com
Abo ut picoTurbo, Inc.
pico T urb o, Inc. is a premi er pr ovi der of 16/3 2-bit RISC micro proce ssor cor es, designed f or use with applic atio ns that requi re ARM® (version 4T)
instructions.
pT-100 , pT-10 0Ax, pT-11 0, pT-110Ax , pT-1 20, and picoPA C K are trade mar ks of pi coT u rbo, Inc. ARM is a regi ste red tra demark of ARM Limited.
AMBA is a trademark of ARM Limited.
