©2002 Fairchild Semiconductor Corporation RFD8P05, RFD8P05SM, RFP8P05 Rev. B
RFD8P05, RFD8P05SM, RFP8P05
8A, 50V, 0.300 Ohm, P-Channel Power
MOSFETs
These products are P-Channel power MOSFETs
manufactured using the MegaFET process. This process,
which uses feature sizes approaching those of LSI circuits,
gives optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, and relay drivers. These transistors can be operated
directly from integrated circuits.
Formerly developmental type TA09832.
Features
• 8A, 50V
•r
DS(ON)
= 0.300
Ω
• UIS SOA Rating Curve
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
Ordering Information
PART NUMBER PACKAGE BRAND
RFD8P05 TO-251AA D8P05
RFD8P05SM TO-252AA D8P05
RFP8P05 TO-220AB RFP8P05
NOTE: When ordering, use the entire part number. Add the suffix 9A
to obtain the TO-252AA variant in tape and reel, i.e.,
RFD8P05SM9A.
D
G
S
JEDEC TO-220AB JEDEC TO-251AA
JEDEC TO-252AA
GATE
DRAIN (FLANGE)
SOURCE
DRAIN
SOURCE
DRAIN (FLANGE) GATE
DRAIN
GATE
SOURCE
DRAIN (FLANGE)
Data Sheet January 2002
©2002 Fairchild Semiconductor Corporation RFD8P05, RFD8P05SM, RFP8P05 Rev. B
Absolute Maximum Ratings
T
C
= 25
o
C Unless Otherwise Specified
RFD8P05,
RFD8P05SM, RFP8P05 UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
-50 V
Drain to Gate Voltage (R
GS
= 20K
Ω)
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DGR
-50 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
D
-8 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
-20 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
GS
±
20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
48 W
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.27 W/
o
C
Single Pulse Avalanche Energy Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
See Figure 6
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
-55 to 175
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
pkg
300
260
o
C
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 150
o
C.
Electrical Specifications
T
C
= 25
o
C Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
DSS
I
D
= 250
µ
A, V
GS
= 0V (Figure 9) -50 - - V
Gate Threshold Voltage V
GS(TH)
V
GS
= V
DS
, I
D
= 250
µ
A (Figure 8) -2 - -4 V
Zero Gate Voltage Drain Current I
DSS
V
DS
= Rated BV
DSS
, V
GS
= 0V - - 1
µ
A
V
DS
= 0.8 x Rated BV
DSS
, T
J
= 150
o
C--25
µ
A
Gate to Source Leakage Current I
GSS
V
GS
=
±
20V - -
±
100 nA
Drain to Source On Resistance (Note 2) r
DS(ON)
I
D
= 8A, V
GS
= -10V (Figure 7) - - 0.300
Ω
Turn-On Time t
ON
V
DD
= -25V, I
D
≈
4A, R
G
= 9.1
Ω
, R
L
= 6.25
Ω,
V
GS
= -10V
- - 60 ns
Turn-On Delay Time t
d(ON)
-16- ns
Rise Time t
r
-30- ns
Turn-Off Delay Time t
d(OFF)
-42- ns
Fall Time t
f
-20- ns
Turn-Off Time t
OFF
- - 100 ns
Total Gate Charge Q
g(TOT)
V
GS
= 0 to -20V V
DD
= -40V, I
D
= 8A,R
L
= 5
Ω,
I
G(REF)
= -0.3mA
- - 80 nC
Gate Charge at -5V Q
g(-10)
V
GS
= 0 to -10V - - 40 nC
Threshold Gate Charge Q
g(TH)
V
GS
= 0 to -2V - - 2 nC
Thermal Resistance Junction to Case R
θ
JC
- - 3.125
o
C/W
Thermal Resistance Junction to Ambient R
θ
JA
TO-251AA, TO-252AA - - 100
o
C/W
TO-220AB 62.5
o
C/W
Source to Drain Diode Specifications
T
C
= 25
o
C Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage (Note 2) V
SD
I
SD
= -8A - - -1.5 V
Reverse Recovery Time t
rr
I
SD
= -8A, dI
SD
/dt = 100A/
µ
s - - 125 ns
NOTE:
2. Pulse test: pulse width
≤
300
µ
s, Duty Cycle
≤
2%.
3. Repetitive rating: pulse width is limited by maximum junction temperature.
RFD8P05, RFD8P05SM, RFP8P05
©2002 Fairchild Semiconductor Corporation RFD8P05, RFD8P05SM, RFP8P05 Rev. B
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
FIGURE 5. SATURATION CHARACTERISTICS FIGURE 6. TRANSFER CHARACTERISTICS
TC, CASE TEMPERATURE (oC)
25 50 75 100 125 150 175
0
POWER DISSIPATION MULTIPLIER
0
0
0.2
0.4
0.6
0.8
1.0
1.2
-4
-2
0
25 50 75 100 125 150
-8
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
-10
-6
175
10
1
0.1 -1 -10 -100
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
TC = 25oC
DC OPERATION
TJ = 175oC
OPERATION IN THIS
AREA IS LIMITED BY rDS(ON)
100
10
1
0.1 1 10 100
tAV , TIME IN AVALANCHE (ms)
IAS, AVALANCHE CURRENT (A)
STARTING TJ = 150oC
STARTING TJ = 25oC
If R = 0
tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD)
If R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
IDM
00 -2 -4 -6 -10
-8
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = -6V
VGS = -10V
-8
VGS = -7V
VGS = -5V
VGS = -8V
-20
-12
-16
-4
PULSE DURATION = 80µs
TC = 25oC
VGS = -9V
VGS = -4V
DUTY CYCLE = 0.5% MAX
0 -6 -9 -12 -15-3
0
8
175oC
PULSE DURATION = 80µs
VDD = 15V
IDS(ON), DRAIN TO SOURCE CURRENT (A)
VGS , GATE TO SOURCE VOLTAGE (V)
-55oC
25oC
20
16
12
4
DUTY CYCLE = 0.5% MAX
RFD8P05, RFD8P05SM, RFP8P05
©2002 Fairchild Semiconductor Corporation RFD8P05, RFD8P05SM, RFP8P05 Rev. B
FIGURE 7. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Application Notes AN7254 and AN7260.
FIGURE 11. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
Typical Performance Curves Unless Otherwise Specified
NORMALIZED ON RESISTANCE
3.0
1.0
0.5
0
050
TJ, JUNCTION TEMPERATURE (oC)
150
1.5
100
2.0
2.5
200-50
PULSE DURATION = 80µs
VGS = -10V, ID = -8A
DUTY CYCLE =0.5% MAX
-50 500 100 150
1.50
NORMALIZED GATE
THRESHOLD VOLTAGE
TJ, JUNCTION TEMPERATURE (oC)
200
VGS = VDS, ID = -250µA
1.25
1.00
0.75
0.50
0.25
0
NORMALIZED DRAIN TO SOURCE
2.0
1.0
0.5
0
050
TJ, JUNCTION TEMPERATURE (oC)
100
1.5
BREAKDOWN VOLTAGE
150 200
ID = -250µA
-50
800
600
400
200
00 -5 -10 -15 -20
C, CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
1000
-25
CISS
CRSS
COSS
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGS
-10
-8
-6
-4
-2
0
-12.5
-25
-37.5
-50
0
TIME (µs)
VGS , GATE TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
VDD = BVDSS
20 IG(REF)
IG(ACT) 80 IG(REF)
IG(ACT)
GATE
SOURCE
VOLTAGE
RL = 6.25Ω
IG(REF) = 0.3mA
VGS = 10V
VDD = BVDSS
DRAIN TO SOURCE
0.75BVDSS
0.50BVDSS
0.25BVDSS
VOLTAGE
RFD8P05, RFD8P05SM, RFP8P05
©2002 Fairchild Semiconductor Corporation RFD8P05, RFD8P05SM, RFP8P05 Rev. B
Test Circuits and Waveforms
FIGURE 12. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 13. UNCLAMPED ENERGY WAVEFORMS
FIGURE 14. SWITCHING TIME TEST CIRCUIT FIGURE 15. RESISTIVE SWITCHING WAVEFORMS
FIGURE 16. GATE CHARGE TEST CIRCUIT FIGURE 17. GATE CHARGE WAVEFORMS
tP
0.01Ω
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VGS
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS
RL
RG
DUT
+
-
VDD
td(ON)
tr
90%
10%
VDS 90%
tf
td(OFF)
tOFF
90%
50%
50%
10%
PULSE WIDTH
VGS
tON
10%
0
0
RL
VGS
+
-
VDS
VDD
DUT
Ig(REF)
VDD
Qg(TH)
VGS= -1V
Qg(-5)
VGS= -5V
Qg(TOT)
VGS= -10V
VDS
-VGS
Ig(REF)
0
0
RFD8P05, RFD8P05SM, RFP8P05
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
OPTOLOGIC™
OPTOPLANAR™
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QFET™
QS™
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Quiet Series™
SILENT SWITCHER
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
Rev. H4
ACEx™
Bottomless™
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CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
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Stealth™
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SuperSOT™-6
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STAR*POWER is used under license
VCX™