MMPQ6700/D - ON Semiconductor

Motorola Small–Signal Transistors, FETs and Diodes Device Data

Quad Complementary Pair

Transistor

PNP/NPN Silicon

MAXIMUM RATINGS

Rating Symbol Value Unit

Collector–Emitter Voltage VCEO 40 Vdc

Collector–Base Voltage VCB 40 Vdc

Emitter–Base Voltage VEB 5.0 Vdc

Collector Current — Continuous IC200 mAdc

Each

Transistor

Four

Transistors

Equal Power

Total Power Dissipation @ TA = 25°C

Derate above 25°CPD0.4

3.2 0.72

6.4 Watts

mW/°C

Total Power Dissipation @ TC = 25°C

Derate above 25°CPD0.66

5.3 1.92

15.4 Watts

mW/°C

Operating and Storage Junction

Temperature Range TJ, Tstg –55 to +150 °C

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)

Characteristic Symbol Min Max Unit

OFF CHARACTERISTICS

Collector–Emitter Breakdown Voltage(1)

(IC = 10 mAdc, IB = 0) V(BR)CEO 40 — Vdc

Collector–Base Breakdown Voltage (IC = 10

Adc, IE = 0) V(BR)CBO 40 — Vdc

Emitter–Base Breakdown Voltage (IE = 10

Adc, IC = 0) V(BR)EBO 5.0 — Vdc

Collector Cutof f Current (VCB = 30 Vdc, IE = 0) ICBO — 50 nAdc

Emitter Cutof f Current (VEB = 4.0 Vdc, IC = 0) IEBO — 50 nAdc

ON CHARACTERISTICS(1)

DC Current Gain

(IC = 0.1 mAdc, VCE = 1.0 Vdc)

(IC = 1.0 mAdc, VCE = 1.0 Vdc)

(IC = 10 mAdc, VCE = 1.0 Vdc)

hFE 35

—

Collector–Emitter Saturation V oltage (IC = 10 mAdc, IB = 1.0 mAdc) VCE(sat) — 0.25 Vdc

Base–Emitter Saturation V oltage (IC = 10 mAdc, IB = 1.0 mAdc) VBE(sat) — 0.9 Vdc

DYNAMIC CHARACTERISTICS

Current–Gain — Bandwidth Product(1)

(IC = 10 mAdc, VCE = 20 Vdc, f = 100 MHz) fT200 — MHz

Output Capacitance

(VCB = 5.0 Vdc, IE = 0, f = 1.0 MHz) Cob — 4.5 pF

Input Capacitance

(VEB = 0.5 Vdc, IC = 0, f = 1.0 MHz) PNP

NPN

Cib —

—10

8.0

1. Pulse Test: Pulse Width

300

s, Duty Cycle

2.0%.

Thermal Clad is a trademark of the Bergquist Company

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by MMPQ6700/D

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

MMPQ6700

CASE 751B–05, STYLE 4

SO–16

Voltage and current are negative

for PNP transistors

 Motorola, Inc. 1997

MMPQ6700

2 Motorola Small–Signal Transistors, FETs and Diodes Device Data

INFORMATION FOR USING THE SO–16 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the total

design. The footprint for the semiconductor packages must

be the correct size to insure proper solder connection

interface between the board and the package. With the

correct pad geometry, the packages will self align when

subjected to a solder reflow process.

SO–16

inches

0.060

1.52

0.275

7.0

0.024

0.6 0.050

1.270

0.155

4.0

SO–16 POWER DISSIPATION

The power dissipation of the SO–16 is a function of the

pad size. This can vary from the minimum pad size for

soldering to a pad size given for maximum power dissipation.

Power dissipation for a surface mount device is determined

by TJ(max), the maximum rated junction temperature of the

die, RθJA, the thermal resistance from the device junction to

ambient, and the operating temperature, TA. Using the

values provided on the data sheet for the SO–16 package,

PD can be calculated as follows:

PD = TJ(max) – TA

RθJA

The values for the equation are found in the maximum

ratings table on the data sheet. Substituting these values into

the equation for an ambient temperature T A of 25°C, one can

calculate the power dissipation of the device which in this

case is 720 milliwatts.

PD = 150°C – 25°C

174°C/W = 720 milliwatts

The 174°C/W for the SO–16 package assumes the use of

the recommended footprint on a glass epoxy printed circuit

board to achieve a power dissipation of 720 milliwatts. There

are other alternatives to achieving higher power dissipation

from the SO–16 package. Another alternative would be to

use a ceramic substrate or an aluminum core board such as

Thermal Clad. Using a board material such as Thermal

Clad, an aluminum core board, the power dissipation can be

doubled using the same footprint.

SOLDERING PRECAUTIONS

The melting temperature of solder is higher than the rated

temperature of the device. When the entire device is heated

to a high temperature, failure to complete soldering within a

short time could result in device failure. Therefore, the

following items should always be observed in order to

minimize the thermal stress to which the devices are

subjected.

•Always preheat the device.

•The delta temperature between the preheat and

soldering should be 100°C or less.*

•When preheating and soldering, the temperature of the

leads and the case must not exceed the maximum

temperature ratings as shown on the data sheet. When

using infrared heating with the reflow soldering method,

the difference shall be a maximum of 10°C.

•The soldering temperature and time shall not exceed

260°C for more than 10 seconds.

•When shifting from preheating to soldering, the

maximum temperature gradient shall be 5°C or less.

•After soldering has been completed, the device should

be allowed to cool naturally for at least three minutes.

Gradual cooling should be used as the use of forced

cooling will increase the temperature gradient and result

in latent failure due to mechanical stress.

•Mechanical stress or shock should not be applied during

cooling.

* Soldering a device without preheating can cause excessive

thermal shock and stress which can result in damage to the

device.

MMPQ6700

Motorola Small–Signal Transistors, FETs and Diodes Device Data

PACKAGE DIMENSIONS

CASE 751B–05

SO–16

ISSUE J

16 9

SEATING

PLANE

RX 45

8 PLP

–B–

–A–

0.25 (0.010) B S

–T–

16 PL

0.25 (0.010) A S

STYLE 4:

PIN 1. COLLECTOR, DYE #1

2. COLLECTOR, #1

3. COLLECTOR, #2

4. COLLECTOR, #2

5. COLLECTOR, #3

6. COLLECTOR, #3

7. COLLECTOR, #4

8. COLLECTOR, #4

9. BASE, #4

10. EMITTER, #4

11. BASE, #3

12. EMITTER, #3

13. BASE, #2

14. EMITTER, #2

15. BASE, #1

16. EMITTER, #1

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE

MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.127 (0.005) TOTAL

IN EXCESS OF THE D DIMENSION AT

MAXIMUM MATERIAL CONDITION.

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A9.80 10.00 0.386 0.393

B3.80 4.00 0.150 0.157

C1.35 1.75 0.054 0.068

D0.35 0.49 0.014 0.019

F0.40 1.25 0.016 0.049

G1.27 BSC 0.050 BSC

J0.19 0.25 0.008 0.009

K0.10 0.25 0.004 0.009

M0 7 0 7

P5.80 6.20 0.229 0.244

R0.25 0.50 0.010 0.019

____

MMPQ6700

4 Motorola Small–Signal Transistors, FETs and Diodes Device Data

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MMPQ6700/D

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