19-1292; Rev 2; 7/96 General Description The !CL7662/Si7661 is a monolithic charge pump voltage inverter that will convert a positive voltage in the range of +4.5V to +20V to the corresponding negative voltage of -4.5V to -20V. The ICL7662/Si7661 provides performance far superior to previous imple- mentations of charge pump voltage inverters by combining low quiescent current with high efficiency. The 1CL7662/Si7661 has an oscillator, control circuitry, and 4 power MOS switches on-chip, with the only required external components being two low cost capacitors. MA AL/VI CMOS Voltage Converters Features @ +4.5V to +20V Supply to -4.5V to -20V Output @ Cascaded Voltage Multiplication (Voy7 = -n * V*) @ 99.7% Typical Open Circuit Conversion Efficiency @ Requires Only 2 External Capacitors @ Pin Compatible with the ICL7660 Ordering information PART TEMP. RANGE PIN-PACKAGE Applications ICL7662CPA O'Cto+70C _8 Plastic DIP Inexpensive Negative Supplies ICL7662CBD OPC to +70C 14 SO Data A isiti Syst ICL7662CBA 0C to +70C 8 SO ala Acquistion systems ICL7662C/D OC to+70C Dice UP to -20V for Op Amps, and Other Linear ICL7662EPA 40C to +85C 8 Plastic DIP ircuits ICL7662EBD A0C to +85C 14.50 Supply Splitter, Vout = Vs/2 ICL7662EBA -40C to +85C 8 SO RS-232 Power Supplies ICL7662MTV-4 -55C to +125C 8 TO-99 ICL7662MJA -55C ta +125C 8 CERDIP Pin Configurations Ordering Information continued at end of data sheet. Top View NS test [1] ra] v+ capt [2 017662 [7] osc crouno[3l Si7g61_ LS] tv Typical Operating Circuit cap- [4] 15 | Vout V+ (and CASE) Vt {CL7662 | Si7661 nye ~ | Gy icizecs Fa + Cy = =T3] Si7661 6] OUTPUT 4 5 ; ! _ nc. & a] ys = G2 test [2] 3] N.C. i n.c. BLWAxi FZ osc cap+ GI /CL7662 Fil w eno GY 5/7667 Bln. N.C. ie 5) Vout nc. OR Negative Voltage Converter SMA AXISA Maxim Integrated Products 1 For free samples & the latest literature: http:/;www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. 99LIS/CO99OLTIOIICL7662/Si7661 CMOS Voltage Converters ABSOLUTE MAXIMUM RATINGS V+ TO GND 00... eect cee cee eee ect ceneeeeeenennntaeetees -0.3V, +22V Oscillator Input to GND (Note 1) (Vo DOV) cect cn eternity -0.3V, V+ + 0.3V (V4 > DAV) ccc etereteeteetteee V+ -12.3V, V+ 4+ 0.3V Power Dissipation (Note 2) Plastic DIP Operating Temperature Ranges Commercial (ICL7662C_, Si7661C_) oe 0C to +70C Extended (ICL7662E__, Si7661D_ or ESA) .....-40C to +85C Military (ICL7662MTV/MJA, SI7E61AAJAK) ee cece ete ceeneeeeneees -65C to +125C Storage Temperature... ceteris ..*65C to +160C Lead Temperature (soldering, 10sec} Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS: ICL7662 (V4 =+15V, Ta = +25C, Cogc = 0, unless otherwise noted. See Test Cuircuit Figure 1.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage Range-Lo V+L Ry = 10k, LV = GND -56C < Ta < +126C 4.5 11 -40C < Ty <+85C 9 20 V Supply Voltage Range-Hi V+H Ry, = 10k2, LV = Open upply Vorrage "ang L pen |55C <T,<+i25c| 9 16.5 Ta = +25C 0.25 0.60 Supply Current I+ Ry = 0, LV = Open OC < Ty <+70C 030 0.85 mA -BSC < Ta < +126C 0.40 1.0 Ta = +25C 60 100 Output Source Resistance Ro Ig = 20mA, LV = Open | 0C < Ty <+70C 70 120 Q -55C < Ta < +125C 90 150 Ve = 5V Ta = +25C 20. 150 + 5 ' or, Ley Supply Current I+ R= =, LV = GND Orc < Ty <+70C 25 200 pA -56C < Ty < +125C 30 250 Vv 5V Ta = +25C 125 200 += , O, 0, Output Source Resistance Re lp = 3mA, LV = GND OC < Ty <+70C 150 250 2 -55C < Ty < +125C 200 350 Oscillator Frequency fosc 10 kHz Ta = +25C 93 96 P Eff P = 9 ower Efficiency eff R,_ = 2kQ Min <T, < Max 90 95 to Voltage Conversion _ . 3 Efficiency VoEt Ri =< Min < Ta < Max o7 99.9 % Oscillator Sink or Source V+ = 5V (Vosc = OV to +5V) 0.5 yA Current osc V+ = 15V (Vosc = +5V to +15V) 4.0 Note 1: Connecting any terminal to voltages greater than V+ or less than ground may cause destructive fatchup. It is recommended that no input from sources operating from external supplies be applied prior to power-up of the ICL7662. Note 2: Derate linearly above +50C by 5.5mWw/C. Note 3: Pin 1 is a test pin and is not connected in normal use. MAXIWICMOS Voltage Converters ELECTRICAL CHARACTERISTICS: Si7661 (V4 = +15V, Ta = +25C, Cosc = 0, unless otherwise noted. See Test Cuircuit Figure 1.) LIMITS TEST CONDITIONS 1=25C PARAMETER SYMBOL| UNLESS OTHERWISE SPECIFIED: | 2=125, 85, 70c | Siceny E |uNiTs Cosc = 0 3 = -55, -25, 0C F TEMP TYP MIN MAX INPUT Supply Voltage Range (LV) V+iy Ri = 10kQ, LV =0V 1,2,3 45 9 Si7661B, C,D,E 1,2,3 8 20 V Supply V R Rie = 10kQ, LV = 0) . upply Voltage Range V+ L Pen \si7661A 12,3 8 165 V+ = 4.5V, RL =, LV =0V 1 500 pA Supply C | upply Current + | Ve = 45V, RL==, LV= Open 1 2 mA OUTPUT V+ = 4.5V, LV =O0V, Ig = 3mA 1 100 i 4,3 55 Output Source Resistance Rout Vi = 15V, LV = Open, lg = 20mA , a Q Power Conversion Efficiency PE V+ = 15V, RL = 2kQ 1 92 6 Voltage Conversion Efficiency | VouTE | V+ = 15V, RL = ee 1 99.7 97 DYNAMIC Oscillator Frequency fosc | V+ = 15V 1 10 kHz Oscillator Impedan z V+ = 4.5V, LV = 0V 1 1 MQ Somiator impedance Osc Vr = 15V T 100 kQ Typical Operating Characteristics UNLOADED OSCILLATOR OUTPUT SOURCE OUTPUT SOURCE FREQUENCY vs. RESISTANCE vs. RESISTANCE vs. TEMPERATURE SUPPLY VOLTAGE TEMPERATURE 15K 130 TTT 200 = vr = 15V IL = 20mA = Cosc = 0 = Ta = +26C _ 180 > BK 10 Cosc = 0 G N ul 160 i \ z \ Q > 11K = 90 z 140 S o - wy a 2 120 iy g Lv = GND 3 g 9K ~ 70 N 100 e 2 LV = OPEN 5 s = NS & 80 = 7K 2 50 5 3 oT 60 oO 5K 30 40 -55 -20 0 +25 +70 +125 oO 2 4 6 8 W 12 14 16 18 20 -5 -20 0 +25 +70 +125 TEMPERATURE (C) MAAIM v* VOLTS TEMPERATURE (C) LOOLIS/Z99OLTOIICL7662/Si7661 CMOS Voltage Converters OUTPUT VOLTAGE vs, LOAD CURRENT OUTPUT VOLTAGE vs. LOAD CURRENT Typical Operating Characteristics (continued) OSCILLATION FREQUENCY vs. SUPPLY VOLTAGE 7 T T T 0 tT T 12 T T t zc vr = 15V ~ vr = SV AL = 2 2 Ty = +25C S Th = 425C Cosc = 0 A LV = OPEN _4 |. LV = GND | Ta = +25C 9 o -1 10 => -9 > / ros y a 3 y w LV = GND V4 $ VW 9 f/ g Aly g -_ 7 =" VT V, a -1 4 it 9 A % LV = OPEN 8 SLOPE = 650} 5-3 A S 6 f [ tL | & Ya yi z -13 LA 2 | SLOPE = 1400 / 5 V4 So 4 a 4 LA 4 y -15 5 2 0 10 20 30 40 50 60 70 80 90 100 0 2 4 6 8 10 12 14 1% 18 20 0 2 4 6 8 10 12 14 16 18 20 LOAD CURRENT |, (mA) POWER CONVERSION FREQUENCY AND OUTPUT RESISTANCE vs. OSCILLATOR FREQUENCY LOAD CURRENT t, (mA) SUPPLY CURRENT vs. OSCILLATOR FREQUENCY V* (VOLTS) OSCILLATION FREQUENCY vs. EXTERNAL OSCILLATOR CAPACITANCE 10K Vt = 15V Ta = #25C 100 1K 10K = 100 150 is Vt = 15V Zz 95 300 RL == a 2 < Pa = s25C 5 a = az 90 250 2 + 110 WW 4p z 8 2002 Z 90 B 2 = 80 45 70 uw Pr Oo 2 = > 6 75 Oo 2 50 2 3 5 o 70 2 30 2 65 10 10 100 1K 10K RL =< 1K 100 OSCILLATOR FREQUENCY (Hz) 10 1060 1000 10K fose (Hz) Detailed Description All the circuitry necessary to complete a voltage inverter is contained on the ICL7662 (Si7661). Only 2 external capacitors are needed. These may be inex- pensive 10uF polarized electrolytic capacitors. Figure 2, an idealized voltage inverter, illustrates the ICL/7662 (Si7661) operation. During the first half_of the cycle, switches $2 and S4 are open; switches $1 and S3 are closed, and the capacitor C1 is charged to a voltage Vin. During the second half cycle, switches S1 and S3 are opened, and switches S2 and S4 are closed. The capacitor C1 undergoes a negative shift equal to Vj. Assuming ideal switches (Roy = 0) and no load on C2, charge is then transferred from C1 to C2 such that the voltage on C2 is exactly -Vjy. The four switches in Figure 2 are MOS power switches. Switch S1 is a P channel switch and switches $2, $3 and S4 are N channel devices. 4 OSCILLATOR FREQUENCY Cosc (pF) Figure 1. 1CL7662/Si7661 Test Circuit MMAXALWVIC2 $3 S41 5 Ae Vout tH Figure 2. idealized Negative Voltage Converter Efficiency Considerations Theoreticaliy, a voltage multiplier can approach 100% efficiency if certain conditions are met. The ICL 7662 (Si7661) approaches the conditions listed below for negative voltage multiplication if large values of C1 and C2 are used. e The output switches have virtually no offset and extremely low ON resistance. @ Minimal power is consumed by the drive circuitry. @ The impedances of the reservoir and pump capac- itors are negligible. The energy loss per charge pump cycle is: E = % x C1 * (Vin? - Vout?) There will be a substantial voltage difference between Vin and Vout if the impedances of C1 and C2 (at the pump frequency) are high compared to output load R1. To reduce output ripple, make C2 as large in value as is practical. Increasing the value of both C1 and C2 will improve the efficiency. General Precautions The positive terminal of C1 must be connected to Pin 2 of the ICL7662 (Si7661), and the positive terminal of C2 must be connected to Ground. @ Never exceed maximum supply voltages. @ For higher efficiency, connect LV to Ground for supply voltages less than 8 volts. Voyr should not be shorted to V* for extended periods of time. Transient conditions {including startup) are acceptable. Applications Changing Oscillator Frequency Normally the OSC pin of the ICL7662 (Si7661) is left open, and the 10kHz nominal frequency (5kHz charge pump frequency) is used. The oscillator can be low- ered by connecting an external capacitor between MAXI/VI CMOS Voltage Converters OSC and V* (see Figure 3). A graph in the Typical Operating Characteristics section shows the nominal frequency versus capacitor value. Lowering the oscil- lator frequency will improve the conversion efficiency with very low output current values. An undesirable effect of lowering the oscillator frequency is that the impedance level of the pump capacitor will increase. Increasing the value of C1 and C2 will compensate for this effect. o yt maxim Fy Cosc I{CL7662 = [3] size61 Figure 3. Lowering Oscillator Frequency In some applications, particularly audio amplifiers, the 5kHz output rippie frequency is objectionable. The oscillator frequency may be increased by one of two methods. The first method is to overdrive the OSC pin with an external oscillator. To eliminate the possibility of latchup, insert a 1kQ resistor in series with the OSC input (see Figure 4). If the external clock source does not pullup close to V*, then a 10k pullup resistor is suggested. The pump frequency, and, therefore, the output ripple will be one-half of the external clock frequency. Driving the ICL7662 (Si7661) with a higher frequency clock will slightly increase the supply current, but allows the use of smaller external capacitors and increases the ripple frequency. vt vr MAXIM ICL7662 [3] Si7661 Figure 4. External Clocking The second method is to tie pin 1 (TEST) to V*. This disconnects the internal oscillator from the OSC pin. Since there is always a small amount of parasitic capacitance from the OSC pin, tying the TEST pin to V* will allow the capacitor to oscillate faster (depend- ing on how much parasitic capacitance there is from the OSC pin). 99LIS/Z99LTOIICL7662/Si7661 CMOS Voltage Converters Cascading Devices To produce larger negative voltage multiplication of the initial supply voltage, the ICL7662 (Si7661) may be cascaded as shown in Figure 5. The resulting output resistance is approximately equal to the weighted sum of the individual ICL7662 (Si7661) Royrt values. For light loads, the practical limit is 10 devices. The output voltage is defined by Voy7 = -n * Vt (where n is an integer representing {he number of cascaded devices). MAXIM a ICL7662 Si7661 n *Pin 8 tied to Pin 3 of device n-1. Figure 5. Cascading ICL7662s for increased Output Voltage Negative Voltage Converter The most common application of the ICL7662 (Si7661) is as a charge pump voltage inverter, converting a positive voltage to the corresponding negative equiva- lent. The simple circuit of Figure 6 shows that only two external components (C1 and C2) are needed. In most applications C1 and C2 are low cost 10uF elec- trolytic capacitors. The ICL7662 (Si7661) is NOT a voltage regulator, and the output source resistance is approximately 60Q with a +15V supply. This means that with an input voltage of +15V, the output voltage will be -15V, under light loads (less than 1mA load current), but will decrease to -14.4V with a 10mA load current. The output source impedance of the complete circuit is the sum of the ICL7662 (Si7661) output resistance and the impedance of the pump capacitor at the pump frequency. The output ripple of the voltage inverter can be calcu- lated by noting that the output current is supplied solely by the reservoir capacitor during one-half of the charge pump cycle. This introduces an output ripple of: VRIPPLE =x lout x (1/Feume) x (1/C2) For the nominal Feyyp of 5kHz (one-half of the nom- inal 10kHz oscillator frequency) and a 10uF C2, the output ripple will be approximately 10mV with a load current of 10mA. Positive Voltage Doubler The ICL7662 (Si7661) can double a positive voltage as shown in Figure 7. It basically uses the ICL7662 (Si7661) as a power inverter. The only drawback from this circuit is the inevitable voltage drop across the two diodes. vt e NM MAXIM ICL7662 Si7661 L, 10uF Vout TIE] i, ; 10 F + Figure 6. Negative Voltage Converter MAXIM 2] ICL7662 a Vv = 3] Si7661 OUT ov - 2VE + ~ G2 NOTE: D; and Dz can be any suitable diode. Figure 7. Positive Voltage Doubler Paraiieling Devices Paratleling |CL7662s {or Si7661s) reduces the output resistance. As illustrated in Figure 8, each device requires its own pump capacitor C1; however, the reservoir capacitor C2 serves all devices. The equation for calculating output resistance is also shown in Figure 8. _ Rout (of ICL7662_ or Si7661) Rout = n (number of devices) Figure 8. Paralleling ICL7662s to Reduce Output Resistance MAAXAIs/VI 6Combining Positive Supply Multiplication and Negative Voitage Conversion This dual function is illustrated in Figure 9. In this circuit, capacitors C1 and C3 perform the pump and reservoir functions respectively for the generation of the negative voltage. Capacitors C2 (pump capacitor) and C4 (reservoir capacitor) are used for the positive voltage converter. The circuit configuration, however, does lead to a higher source impedance of the gener- ated supplies. This is due to the finite impedance of the common charge pump driver. Voltage Splitting The ICL7662 (Si7661) can also be used to split a power supply or battery. In Figure 10 the ICL7662 (Si7661) has the positive terminal of the power supply connected to V* and the negative terminal connec- ted to Vout. The midpoint of the power supply is found on Bin 3. The output resistance is much lower than in other applications, and higher currents can be drawn from this configuration. Vourt = -V* CMOS Voltage Converters Chip Topography TEST GND 0.110" (279mm) CAP- 0.080" (2.03mm) _Ordering Information (continued) cir PART TEMP.RANGE _PIN-PACKAGE 2 'Sizoot FS ca Si7661CJ OC10+70C _8 Plastic DIP = . Si7661CY OCto+70C -14S0 ~ + oz _Vourz = Gv Si7661CSA OCto+70C -8 SO ca ry c, Fb?) Si7661C/D OC to +70C Dice = Si7661DJ -40C 10 +85C___8 Plastic DIP Si7661DY 40C to +85C__-14SO Si7661ESA -40C 10 +85C_ 8 SO Figure 9. Combined Positive Multiplier and Negative SI7661AA4 SSPE to + 125"C __8 10-99 Converter Si7661AK 65C 10 +125C 8 CERDIP vr MAAXIM 2 ICL7662 Si7661 v Figure 10. Splitting a Supply in Half MIAAISVI 7 LOOZIS/Z9OLTIOIICL7662/Si7661 CMOS Voltage Converters Package Information 315 - 0.335 yp ares 0165 OO Bg as LEAD #1 (4181 - 4.609 ri (088) MAX 1- 1028 - 0045 ae ane a 6.500 a (12.70) 0.040 (1028 - 0.034 MIN. 0040 apy fori 0868 11.016) le nate Sa ola. 8 Lead T0-99 (TV) Oya = 150C/W Oyo = 45C/W na t80 MAX LEAD #1 1025 2.025 ap tad | Ht be itso 700 a329 306 - 0.160 dem) Re pam a min 0-10 a [-- Fanos - 0012 ia 0.385 + 0.025 (203 0.305) lend = 0.002 100+ 0010 (457 = O051) (2540 = 0254) (0779+ 063q 8 Lead CERDIP (JA) O ja = 125C/W Ojo = 55C/W 0385. Tiaoay) MAX. Pond ~ LEAD #1 1750+ 0005 + | BSR0- O10 py (6380 0127 | qe 0782-2704 PAO OULU 025 + 1015 | Ly (LEIS + O38 0.130 = 0.005. 0,040 0.300 - 0.320 0.020, 13.302 + 127) fio YF (720 - 8128 q's (0.508 O - 10 1009 - 0.015 O25 ay 0.229 - 0.381 yy t Fans rasa || ass (ite Jazss B98 | 8 Lead Plastic DIP (PA) 0.018 + 0.003, go ve + 0.010 [0457 + 0.076) (2.540 + 0254) 8), = 160C/W Bye = 75C/W | 0.150 0.158 0.181 -0.705 0.228 - 0.264 {3810 - 4013) (4507 6.207) (5.791 - 6.198) = LEAD |. 1080 ase "lL suas ong (0.388 0.457) vase | | es, _ -n{ Le guna an l. as ~ 0.586] 11346 1.7531 0.004 - 0.008 (0.102 - 0.203) 0.007 - 0.009 (0.178 - 0.229} 14 Lead Small Outline (SD) By, = 115C/W 8 jc = 60C/W Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right io change the circuitry and specifications without notice at any time. 8 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 1996 Maxim Integrated Products Printed USA MAMXIAA is a registered trademark of Maxim Integrated Products.