LMG7420PLFC-X 240*128 Dots
FEATURES
♦ Black on White STN TYPE
♦ Transmissive Mode
♦ High Brightness CFL Backlight
♦ High Contrast LC Material
♦ Built-in LCD Controller T6963C
MECHANICAL DATA
Item Value Unit
Module Dimensions 159.4*101*11 mm
Viewing Area 123*68 mm
Resolution 240*128 dots
Dot Size 0.47*0.47 mm
Dot Pitch 0.5*0.5 mm
Weight 180 g
OPTICAL DATA
Item Symbol Condition Min Typ Max Unit
Contrast Ratio K ¯=10¡,
Q=0¡,
Note 1
-18 - -
Brightness - T=25¡C,
IL=5mA,
Note 8
60.0 80.0 - cd/m2
Viewing
Direction
- 6 oÕclock
Viewing Angle ¯2 - ¯1 K=2,
Note 1
30 40 - degree
Response Time
(Rise)
tR¯=10¡,
Q=0¡,
Note 1
- 160 210 ms
Response Time
(Fall)
tF¯=10¡,
Q=0¡,
Note 1
- 110 160 ms
ABSOLUTE MAXIMUM RATINGS
Item Symbol Condition Min Max Unit
Supply Voltage
(Logic)
VDD
- VSS - 0 6.5 V
Supply Voltage
(LC Drive)
VDD - VEE - 0 20.5 V
Input Voltage VI- -0.3 0.3+VDD V
Operating
Temperature
TOP Note 5,6 0 50 ¡C
Storage
Temperature
TST Note 7 -20 60 ¡C
DATA INTERFACE PIN ASSIGNMENT
Pin No Symbol Level Function
A1 VSS (0V) - Ground
A2 VDD (+5V) - Power supply for logic circuit
A3 V0 - Power supply for LCD drive
A4 C/D - Not WR=Low and C/D=High for
Command Write, C/D= Low for
Data Write, Not RD = Low and
C/D=High for Status Read, C/D =
Low for Data Read
A5 Not WR - DW=Low for Data Write
A6 Not RD - RD=Low for Data read
A7-A14 DB0 - DB7 - Display data
A15 Not CE - Chip enable (Not CE must be Low)
A16 Not RET - Reset
A17 VEE (-15V) - Power supply for LCD drive
A18 Not DISP OFF - NC for Display ON, GND forDisplay
OFF
A19 F/S - Character font selection (F/S=High
for 6x8 font, F/S=Low for 8x8 font)
A20 Reverse - Display mode reverse
CFL INTERFACE PIN ASSIGNMENT
Pin No Symbol Level Function
1 GND - CFL Ground
2 NC - No connection
3 NC - No connection
4 HV - Power supply for CFL
ELECTRICAL CHARACTERISTICS
Item Symbol Condition Min Typ Max Unit
Supply Voltage
(Logic)
VDD
- VSS - 4.75 5.0 5.25 V
Supply Voltage
(LC Drive)
VEE - VSS - -14.5 -15.0 -15.5 V
Supply Current IDD Note 2 - 11.7 14.0 mA
IEE Note 2 - 2.5 4.0 mA
Input Voltage
(High Level)
VIH High Level 0.8*
VDD
- VDD V
Input Voltage
(Low Level)
VIL Low Level 0 - 0.2*
VDD
V
Frame
Frequency
fFLM Note 4 - 75 - Hz
Duty Ratio - 1/128 -
Recommended
LC Drive
Voltage
VDD -VODuty=1/128
T=0¡C,
¯=10¡,
Note 3
- 16.9 - V
Duty=1/128
T=25¡C,
¯=10¡,
Note 3
- 15.8 - V
Duty=1/128
T=50¡C,
¯=10¡,
Note 3
- 15.2 - V
Backlight Lamp
Voltage
VBL T=25¡C - 360 - Vrms
Backlight Lamp
Frequency
fBL T=25 ¡C 30 70 85 kHz
Backlight Lamp
Current
IBL T=25 ¡C 2.5 5.0 5.5 mArms
Lamp Start
Voltage
VST=25¡C,
Note 9
(1000) - - V
TIMING CHARACTERISTICS
Item Symbol Min Typ Max Unit
C/D set up time tCDS 100 - - ns
C/D hold time tCHD 10 - - ns
Not CE, Not RD, Not WR
pulse width
Not tCE, Not
tRD, Not tWR
80 - - ns
Data set up time tDS 80 - - ns
Data hold time tDH 40 - - ns
Access time tACC - - 150 ns
Output hold time tOH 10 - 50 ns
INVERTER AND CONNECTORS
Recommended Inverter Starter Kit
HITACHI INVC191 START74xx
Lamp Connector Lamp Housing Connector
MITSUMI M63M83-04 M61M73-04, M60-04-30-114P or
M60-04-30-134P
Note1: Definition of optical data, see page 84
Note 2: fFRAME=75Hz, VDD-V0=15.8V, Ta=25¡C
Note 3: Recommended LCD driving may fluctuate about +- 1.0V by each module.
Note 4: Need to make sure of flickering and rippling of display when setting the
FRAME Frequency in your set.
Note 5: Background colour of the LCD changes depending on temperature.
Between 40-50¡C optical characteristics of the LCD like contast and viewing
angle change but the display remains readable.
Note 6: Higher starting voltage of CFL and higher LCD driving voltage are needed
while operating at 0¡C. The lifetime of CFL will be reduced at 0¡C
Note 7: Storage at -20¡C < 48 hr, Ta at 60¡C < 168 hr
Note 8: Measurement after 10 minutes of CFL operating. Brightness control: 100%
Note 9: Starting discharge voltage is increased when LCM is operating at lower
temperature. Please check the characteristics of inverter before applying.
MECHANICAL DIMENSIONS
(50)
(50) CN2
1
20
1
10
10.0
3.5
8.5
6.9
(2.015)
139.4
142.4
159.4
123.0 min
68.0 min
82.0 101.0
3.5
(3.015)
6.62.5
0.47 0.03
0.47
0.03
152.4+/-0.3
124.0+/-0.3
0.5*239+0.47=119.97+/-0.1
22.86+/-0.3
12.0+/-0.3
48.26+/-0.3
2.54+/-0.3
12.74+/-0.3
1 4
70.0+/-0.394.0+/-0.3
6.5+/-0.5 1.2+/-0.2
2.015 max
11.0 max.
0.5*127+0.47=63.97+/-0.1
2.54+/-0.3
1.515 max
CN 3
NOTE 1
CN 1
NOTE : DO NOT CONNECT ANY SIGNAL TO CN3
USE CN1 AS INTERFACE
4-∅3.030-∅1.0
BLOCK DIAGRAM POWER SUPPLY / POWER UP TIMING DIAGRAM
LCD
240*128
Y1 Y240
80
IC5
8080
IC4IC3
X128
X1
64
64
IC1
IC2
FLM
CL1
CL2
D1
13
8
RAM
OSC
8
DB0
DB7
VDD
VSS
V0
VEE
TIMING
VLCD
M'
F/S
CE
RET
C/D
WR
RD
D1'
POWER
CIRCUIT
CONTROLLER T6369C
VDD
VSS
V0
VEE
+5V
-15.0V
VR
LCM
VR : 10-20KΩ
VDD-V0 : LCD DRIVING VO
L
VDD
SIGNAL
VEE
4.75V
0 ms min.
VDD
SIGN
A
VEE
0 ms min.
5V
VALID
DATA
POWER ON POWER OFF
0~50 ms 0~50 ms
4.75V
INTERFACE TIMING DIAGRAM
X1 X2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
LOAD
X240
CP
D3
D2
D1
1.4us min
FRM
LOAD
FRM
Y317
Y320
Y319
Y318
D0
240*T
FRM
52.1ms<T<59.5ms
VIH
VIL
VIH
VIL
tCDS tCDH
VIL VIL
VIH
C/D
CE
tCE,tRD,tWR
VIL VIL
VIH
VIH
VIL
VIH
VIL
tDS
tDH
VIH
VIL
VIH
VIL
tACC tOH
RD,WR
D0-D7
(LCM TO MPU)
D0-D7
(MPU TO LCM)
