AT27C040-90PU - ATMEL

0189J–EPROM–10/2012

Features

Fast read access time – 70ns

Low-power CMOS operation

100μA max standby

30mA max active at 5MHz

JEDEC standard packages

32-lead PDIP

32-lead PLCC

5V 10% supply

High-reliability CMOS technology

2000V ESD protection

200mA latchup immunity

Rapid programming algorithm – 100μs/byte (typical)

CMOS- and TTL-compatible inputs and outputs

Industrial temperature range

Green (Pb/halide-free) packaging option

1. Description

The Atmel® AT27C040 is a low-power, high-performance, 4,194,304-bit, One-Time

Programmable, Read-Only Memory (OTP EPROM) organized as 512K by 8 bits. The

AT27C040 requires only one 5V power supply in normal Read mode operation. Any

byte can be accessed in less than 70ns, eliminating the need for speed reducing wait

states on high-performance microprocessor systems.

The Atmel scaled CMOS technology provides low active power consumption and fast

programming. Power consumption is typically 8mA in active mode and less than 10μA

in standby mode.

The AT27C040 is available in a choice of industry standard, JEDEC-approved, PDIP

and PLCC packages. The device features two-line control (CE, OE) to eliminate bus

contention in high-speed systems.

The AT27C040 has additional features to ensure high quality and efficient production

use. The rapid programming algorithm reduces the time required to program the part

and guarantees reliable programming. Programming time is typically only 100μs/byte.

The integrated product identification code electronically identifies the device and

manufacturer. This feature is used by industry standard programming equipment to

select the proper programming algorithms and voltages.

Atmel AT27C040

4Mb (512K x 8) OTP, EPROM

DATASHEET

Atmel AT27C040 [DATASHEET]

0189J–EPROM–10/2012

2. Pin Configurations and Pinouts

3. Switching Considerations

Switching between active and standby conditions via the Chip Enable (CE) pin may produce transient voltage

excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in

device nonconformance. At a minimum, a 0.1μF, high-frequency, low inherent inductance, ceramic capacitor should be

utilized for each device. This capacitor should be connected between the VCC and ground terminals of the device — as

close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large

EPROM arrays, a 4.7μF bulk electrolytic capacitor should be utilized, again connected between the VCC and ground

terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to

the array.

4. Block Diagram

Name Function

VPP Peak to Peak Voltage

A0 - A18 Address Inputs

O0 - O7Outputs

GND Ground

CE Chip Enable

OE Output Enable

VCC Device Power Supply

A14

A13

A11

A10

GND

A12

A15

A16

VPP

VCC

A18

A17

32-lead PLCC

Top view

VPP

A16

A15

A12

GND

VCC

A18

A17

A14

A13

A11

A10

32-lead PDIP

Top view

VCC

GND

VPP

0 – A18

Address

Inputs

OE, CE, and

Program Logic

Y Decoder

X Decoder

Data Outputs

O0 – O7

Output

Buffers

Y-Gating

Cell Matrix

Identification

Atmel AT27C040 [DATASHEET]

0189J–EPROM–10/2012

5. Absolute maximum ratings*

6. Elelectrical Characteristics

6.1 DC and AC characteristics

Table 6-1. Operating modes

Notes: 1. X can be VIL or VIH.

2. Refer to programming characteristics.

3. VH = 12.0 ± 0.5V.

4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH, and A0,

which is toggled low (VIL) to select the manufacturer’s identification byte and high (VIH) to select the device

code byte.

Temperature under bias-55°C to +125°C

Storage temperature . . . . . . . . . . . . . -65°C to +150°C

Voltage on any pin with

respect to ground. . . . . . . . . . . . . . . . . .-2.0V to +7.0V

Voltage on A9 with

respect to ground . . . . . . . . . . . . . . . .-2.0V to +14.0V

VPP supply voltage with

respect to ground. . . . . . . . . . . . . . . . .-2.0V to +14.0V

*Notice: Stresses beyond those listed under “Absolute

maximum ratings” may cause permanent damage

to the device. This is a stress rating only, and

functional operation of the device at these or any

other conditions beyond those indicated in the

operational sections of this specification is not

implied. Exposure to absolute maximum rating

conditions for extended periods may affect device

reliability.

Mode/Pin CE OE Ai VPP Outputs

Read VIL VIL Ai X

(1) DOUT

Output Disable X VIH X X High Z

Standby VIH X X X High Z

Rapid Program(2) VIL VIH Ai VPP DIN

PGM Verify X VIL Ai VPP DOUT

PGM Inhibit VIH VIH X VPP High Z

Product Identification(4) VIL VIL

A9 = VH(3)

A0 = VIH or VIL

A1 – A18 = VIL

X Identification Code

Atmel AT27C040 [DATASHEET]

0189J–EPROM–10/2012

6.2 DC and AC Operating Conditions for Read Operation

6.3 DC and Operating Characteristics for Read Operation

Notes: 1. VCC must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP.

2. VPP may be connected directly to VCC, except during programming. The supply current would then be the

sum of ICC and IPP.

6.4 AC Characteristics for Read Operation

Note: 1. See AC waveforms for read operation.

Atmel AT27C040-70 Atmel AT27C040-90

Industrial Operating Temperature (Case) -40°C to 85°C -40°C to 85°C

VCC Power Supply 5V 10% 5V  10%

Symbol Parameter Condition Min Max Units

ILI Input Load Current VIN = 0V to VCC 1μA

ILO Output Leakage Current VOUT = 0V to VCC 5μA

IPP1(2) VPP(1) Read/Standby Current VPP = VCC 10 μA

ISB VCC1(1) Standby Current

ISB1 (CMOS), CE = VCC  0.3V 100 μA

ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1 mA

ICC VCC Active Current f = 5MHz, IOUT = 0mA, CE = VIL 30 mA

VIL Input Low Voltage -0.6 0.8 V

VIH Input High Voltage 2.0 VCC + 0.5 V

VOL Output Low Voltage IOL = 2.1mA 0.4 V

VOH Output High Voltage IOH = -400μA 2.4 V

Symbol Parameter Condition

Atmel AT27C040

Units

-70 -90

Min Max Min Max

tACC(1) Address to Output Delay CE = OE

= VIL

70 90 ns

tCE(1) CE to Output Delay OE = VIL 70 90 ns

tOE(1) OE to Output Delay CE = VIL 30 35 ns

tDF(1) OE or CE High to Output Float; whichever occurred first. 20 20 ns

tOH

Output Hold from Address, CE or OE; whichever occurred

first. 0 0 ns

Atmel AT27C040 [DATASHEET]

0189J–EPROM–10/2012

Figure 6-1. AC Waveforms for Read Operation(1)

Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless

otherwise specified.

2. OE may be delayed up to tCE – tOE after the falling edge of CE without impact on tCE.

3. OE may be delayed up to tACC – tOE after the address is valid without impact on tACC.

4. This parameter is only sampled, and is not 100% tested.

5. Output float is defined as the point when data is no longer driven.

Figure 6-2. Input Test Waveforms and Measurement Levels

Figure 6-3. Output Test Load

Table 6-2. Pin Capacitance

Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.

f = 1MHz, T = 25°C

(1)

Symbol Typ Max Units Conditions

CIN 4 8 pF VIN = 0V

COUT 8 12 pF VOUT = 0V

ddress Address Valid

Output

tCE

tOE

tACC

High Z

tDF

tOH

Output

Valid

Driving

Levels

Measurement

Level

2.40V

0.45V

2.00

0.80

OUTPUT

1.3V

(1N914)

3.3K

Atmel AT27C040 [DATASHEET]

0189J–EPROM–10/2012

Figure 6-4. Programming Waveforms(1)

Notes: 1. The input timing reference is 0.8V for VIL and 2.0V for VIH.

2. tOE and tDFP are characteristics of the device, but must be accommodated by the programmer.

3. When programming the AT27C040, a 0.1μF capacitor is required across VPP and ground to suppress

spurious voltage transients.

Table 6-3. DC Programming Characteristics

TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V.

Symbol Parameter Test Conditions

Limits

UnitsMin Max

ILI Input Load Current VIN = VIL, VIH 10 μA

VIL Input Low Level -0.6 0.8 V

VIH Input High Level 2.0 VCC + 0.7 V

VOL Output Low Voltage IOL = 2.1mA 0.4 V

VOH Output High Voltage IOH = -400μA 2.4 V

ICC2 VCC Supply Current (Program And Verify) 40 mA

IPP2 VPP Supply Current CE = VIL 20 mA

VID A9 Product Identification Voltage 11.5 12.5 V

tAS

tDS

tOES

VIH

VIL

VIH

VIL

13.0V

5.0V

6.5V

5.0V

VIH

VIL

VIH

VIL

ddress

Data

VPP

VCC

Program

Address Stable

Read

(Verify)

Data In Data Out

Valid

tPRT tVPS

tPW

tOE

tDH tDFP

tAH

tVCS

Atmel AT27C040 [DATASHEET]

0189J–EPROM–10/2012

Table 6-4. AC Programming Characteristics

Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP.

2. This parameter is only sampled, and is not 100% tested. Output float is defined as the point where data is no

longer driven. See timing diagram.

3. Program pulse width tolerance is 100μs 5%.

Table 6-5. Atmel AT27C040 Integrated Product Identification Code

TA = 25  5°C, VCC = 6.5  0.25V, VPP = 13.0  0.25V

Symbol Parameter Test Conditions(1)

Limits

UnitsMin Max

tAS Address Setup Time

Input rise and fall times:

(10% to 90%) 20ns

Input pulse levels:

0.45V to 2.4V

Input timing reference level:

0.8V to 2.0V

Output timing reference level:

0.8V to 2.0V

2μs

tOES OE Setup Time 2μs

tDS Data Setup Time 2μs

tAH Address Hold Time 0μs

tDH Data Hold Time 2μs

tDFP OE High to Output Float Delay(2) 0 130 ns

tVPS Vpp Setup Time 2μs

tVCS Vcc Setup Time 2 μs

tPW CE Program Pulse Width(3) 95 105 μs

tOE Data Valid from OE(2) 150 ns

tPRT

VPP Pulse Rise Time During

Programming 50 ns

Codes

Pins

Hex DataA0O7O6O5O4O3O2O1O0

Manufacturer 000011110 1E

Device Type 100001011 0B

Atmel AT27C040 [DATASHEET]

0189J–EPROM–10/2012

7. Rapid programming algorithm

A 100μs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is

raised to 13.0V. Each address is first programmed with one 100μs CE pulse without verification. Then a

verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to ten

successive 100μs pulses are applied with a verification after each pulse. If the byte fails to verify after ten pulses have

been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been

checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to

determine if the device passes or fails.

Figure 7-1. Rapid Programming Algorithm

Start

ADDR = First Location

VCC = 6.5V

VPP = 13.0V

VCC = 6.5V

VPP = 13.0V

Program One 100μs Pulse

Increment

Address

No Last

ADDR?

Yes

ADDR = First Location

Increment

Address X = 0

Last

ADDR?

Yes

Program One 100μs Pulse

Pass Fail

Verify

Byte Increment

X = 10?

Fail

Pass

Compare

All Bytes

to Original

Data

Device

Failed

Device

Passed

Atmel AT27C040 [DATASHEET]

0189J–EPROM–10/2012

8. Ordering Information

Green Package Option (Pb/Halide-free)

Atmel Ordering Code Package tACC (ns)

ICC (mA)

Lead Finish Operation RangeActive Standby

AT27C040-70JU 32J

70 30 0.1 Matte Tin Industrial

(-40C to 85C)

AT27C040-70PU 32P6

AT27C040-90JU 32J

90 30 0.1 Matte Tin Industrial

(-40C to 85C)

AT27C040-90PU 32P6

Package Type

32J 32-lead, plastic, J-leaded Chip Carrier (PLCC)

32P6 32-lead, 0.600" wide, plastic, Dual Inline (PDIP)

Atmel AT27C040 [DATASHEET]

0189J–EPROM–10/2012

9. Package information

9.1 32J — 32-lead PLCC

DRAWING NO. REV.

TITLE

32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC) B

32J

10/04/01

1.14(0.045) X 45° PIN NO. 1

IDENTIFIER

1.14(0.045) X 45°

0.51(0.020)MAX

0.318(0.0125)

0.191(0.0075)

45° MAX (3X)

B1 E2

E1 E

COMMON DIMENSIONS

(Unit of measure = mm)

SYMBOL MIN NOM MAX NOTE

Package Drawing Contact:

packagedrawings@atmel.com

Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE.

2. Dimensions D1 and E1 do not include mold protrusion.

Allowable protrusion is .010"(0.254mm) per side. Dimension D1

and E1 include mold mismatch and are measured at the extreme

material condition at the upper or lower parting line.

3. Lead coplanarity is 0.004" (0.10mm) maximum.

A 3.175 – 3.556

A1 1.524 – 2.413

A2 0.381 – –

D 12.319 – 12.573

D1 11.354 – 11.506 Note 2

D2 9.906 – 10.922

E 14.859 – 15.113

E1 13.894 – 14.046 Note 2

E2 12.471 – 13.487

B 0.660 – 0.813

B1 0.330 – 0.533

e 1.270 TYP

Atmel AT27C040 [DATASHEET]

0189J–EPROM–10/2012

9.2 32P6 — 32-lead PDIP

DRAWING NO. REV.

GPC

TITLE

Package Drawing Contact:

packagedrawings@atmel.com

32P6 C

11/28/11

PLU

32P6, 32-lead, 0.600”/15.24 mm Wide Plastic Dual

Inline Package (PDIP)

COMMON DIMENSIONS

(UNIT OF MEASURE=MM)

Symbol Min. Nom. Max. Note

A - - 4.826

A1 0.381 - -

b 0.356 - 0.558

b2 1.041 - 1.651

c 0.203 - 0.381

D 41.783 - 42.291 Note 1

E 15.240 - 15.875

E1 13.462 - 13.970 Note 1

L 3.048 - 3.556

e 2.54 BSC

eA 15.24 BSC

eB - - 17.78

eC 0.000 - 1.524

Notes:

1. Dimensions D and E1 do not include mold Flash or

Protrusion. Mold Flash or Protrusion shall not exceed

0.25 mm (0.010").

BASE

PLANE

SEATING

PLANE

GAGE

PLANE

.015

Lead Detail

0.10

See

Lead Detail

-C-

Atmel AT27C040 [DATASHEET]

0189J–EPROM–10/2012

10. Revision History

Doc. Rev. Date Comments

0189J 10/2012 Update 32P6 package outline drawing.

Update template and Atmel logo.

0189I 04/2011 Remove TSOP package.

Add lead finish to ordering information.

0189H 12/2007 Datasheet revision.

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Tel: (+1) (408) 441-0311

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Fax: (+81) (3) 6417-0370

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