934056194135 - NXP - Pdf.Support

BUK78150-55A

TrenchMOS™ standard level FET

Rev. 01 — 30 January 2001 Product speciﬁcation

M3D087

1. Description

N-channel enhancement mode ﬁeld-effect power transistor in a plastic package using

TrenchMOS™1 technology, featuring very low on-state resistance.

Product availability:

BUK78150-55A in SOT223 (SC-73).

2. Features

■TrenchMOS™ technology

■Q101 compliant

■150 °C rated

■Standard level compatible.

3. Applications

■Automotive and general purpose power switching:

◆12 V and 24 V loads

◆Motors, lamps and solenoids.

4. Pinning information

1. TrenchMOS is a trademark of Royal Philips Electronics.

Table 1: Pinning - SOT223 (SC-73), simpliﬁed outline and symbol

Pin Description Simpliﬁed outline Symbol

1 gate (g)

SOT223 (SC-73)

2 drain (d)

3 source (s)

4 drain (d)

123

MSB002 - 1

Top view s

MBB076

Philips Semiconductors BUK78150-55A

TrenchMOS™ standard level FET

Product speciﬁcation Rev. 01 — 30 January 2001 2 of 13

5. Quick reference data

6. Limiting values

Table 2: Quick reference data

Symbol Parameter Conditions Typ Max Unit

VDS drain-source voltage (DC) −55 V

IDdrain current (DC) Tsp =25°C; VGS =10V −5.5 A

Ptot total power dissipation Tsp =25°C−8W

Tjjunction temperature −150 °C

RDSon drain-source on-state resistance VGS = 10 V; ID=5A

Tj=25°C 128 150 mΩ

Tj= 150 °C−278 mΩ

Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VDS drain-source voltage (DC) −55 V

VDGR drain-gate voltage (DC) RGS =20kΩ−55 V

VGS gate-source voltage (DC) −±20 V

IDdrain current (DC) Tsp =25°C; VGS =10V;Figure 2 and 3−5.5 A

Tsp = 100 °C; VGS =10V;Figure 2 −3.8 A

IDM peak drain current Tsp =25°C; pulsed; tp≤10 µs; Figure 3 −22 A

Ptot total power dissipation Tsp =25°C; Figure 1 −8W

Tstg storage temperature −55 +150 °C

Tjoperating junction temperature −55 +150 °C

Source-drain diode

IDR reverse drain current (DC) Tsp =25°C−5.5 A

IDRM pulsed reverse drain current Tsp =25°C; pulsed; tp≤10 µs−22 A

Avalanche ruggedness

WDSS non-repetitive avalanche energy unclamped inductive load; ID=5A;

VDS ≤55 V; VGS = 10 V; RGS =50Ω;

starting Tsp =25°C

−25 mJ

Philips Semiconductors BUK78150-55A

TrenchMOS™ standard level FET

Product speciﬁcation Rev. 01 — 30 January 2001 3 of 13

VGS ≥4.5 V

Fig 1. Normalized total power dissipation as a

function of solder point temperature. Fig 2. Normalized continuous drain current as a

function of solder point temperature.

Tamb =25°C; IDM is single pulse.

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

03aa17

100

120

0 25 50 75 100 125 150 175

Pder

Tsp (oC)

(%)

03aa25

100

120

0 25 50 75 100 125 150 175

Ider

Tsp (oC)

(%)

Pder Ptot

Ptot 25 C

()

---------------------- 100%×=

Ider ID

ID25C

()

-------------------100%×=

03nc19

10-2

10-1

102

1 10

102

VDS (V)

(A)

D.C.

100 ms

10 ms

RDSon = VDS/ ID

1 ms

tp = 10 us

100 us

δ =

Philips Semiconductors BUK78150-55A

TrenchMOS™ standard level FET

Product speciﬁcation Rev. 01 — 30 January 2001 4 of 13

7. Thermal characteristics

7.1 Transient thermal impedance

Table 4: Thermal characteristics

Symbol Parameter Conditions Value Unit

Rth(j-a) thermal resistance from junction to ambient Figure 4 70 K/W

Rth(j-sp) thermal resistance from junction to solder

point 15 K/W

Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.

03nc18

Single Shot

0.2

0.1

0.05

0.02

10-2

10-1

102

10-6 10-5 10-4 10-3 10-2 10-1

1 10

tp (s)

Zth(j-sp)

(K/W)

δ = 0.5

δ =

Philips Semiconductors BUK78150-55A

TrenchMOS™ standard level FET

Product speciﬁcation Rev. 01 — 30 January 2001 5 of 13

8. Characteristics

Table 5: Characteristics

=25

C unless otherwise speciﬁed

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V(BR)DSS drain-source breakdown

voltage ID= 0.25 mA; VGS =0V

Tj=25°C55−−V

Tj=−55 °C50−−V

VGS(th) gate-source threshold voltage ID= 1 mA; VDS =V

GS;

Figure 9

Tj=25°C234V

Tj= 150 °C1−−V

Tj=−55 °C−−4.4 V

IDSS drain-source leakage current VDS = 55 V; VGS =0V

Tj=25°C−0.05 10 µA

Tj= 150 °C−−500 µA

IGSS gate-source leakage current VGS =±20 V; VDS =0V −2 100 nA

RDSon drain-source on-state

resistance VGS =10V; I

D=5A;

Figure 7 and 8

Tj=25°C−128 150 mΩ

Tj= 150 °C−−278 mΩ

Dynamic characteristics

Ciss input capacitance VGS =0V; V

DS =25V;

f = 1 MHz; Figure 12 −170 230 pF

Coss output capacitance −54 65 pF

Crss reverse transfer capacitance −37 52 pF

td(on) turn-on delay time VDD = 30 V; RL= 2.7 Ω;

VGS =10V; R

G= 5.6 Ω−3−ns

trrise time −26 −ns

td(off) turn-off delay time −8−ns

tffall time −10 −ns

Philips Semiconductors BUK78150-55A

TrenchMOS™ standard level FET

Product speciﬁcation Rev. 01 — 30 January 2001 6 of 13

Source-drain diode

VSD source-drain (diode forward)

voltage IS= 5 A; VGS =0V;

Figure 15 −0.85 1.2 V

trr reverse recovery time IS=10A;dI

S/dt = −100 A/µs

VGS =−10 V; VDS =30V −32 −ns

Qrrecovered charge −50 −nC

Table 5: Characteristics

…continued

=25

C unless otherwise speciﬁed

Symbol Parameter Conditions Min Typ Max Unit

Tj=25°CT

j=25°C; ID=5A

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values. Fig 6. Drain-source on-state resistance as a function

of gate-source voltage; typical values.

Tj=25°C

Fig 7. Drain-source on-state resistance as a function

of drain current; typical values. Fig 8. Normalized drain-source on-state resistance

factor as a function of junction temperature.

03nb91

0246810

VDS (V)

(A)

4.5

5.5

6.5

7.5

8.5

9.5

VGS (V) = 14

03nb90

100

120

140

160

180

200

5 101520

VGS (V)

RDSon

(mΩ)

03nb92

100

150

200

250

300

350

0 5 10 15 20

ID (A)

RDSon

(mΩ)VGS (V) =

5.5 66.5 7810

03nc24

0.2

0.4

0.6

0.8

1.2

1.4

1.6

1.8

2.2

-60 -20 20 60 100 140 180

Tj (oC)

aRDSon

RDSon 25 C

()

----------------------------

Philips Semiconductors BUK78150-55A

TrenchMOS™ standard level FET

Product speciﬁcation Rev. 01 — 30 January 2001 7 of 13

ID= 1 mA; VDS =V

GS Tj=25°C; VDS =V

Fig 9. Gate-source threshold voltage as a function of

junction temperature. Fig 10. Sub-threshold drain current as a function of

gate-source voltage.

Tj=25°C; VDS =25V V

GS = 0 V; f = 1 MHz

Fig 11. Forward transconductance as a function of

drain current; typical values. Fig 12. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical

values.

03aa32

0.5

1.5

2.5

3.5

4.5

-60 -20 20 60 100 140 180

VGS(th)

Tj (oC)

(V) max.

typ.

min

03aa35

10-6

10-5

10-4

10-3

10-2

10-1

012345

maxtypmin

VGS (V)

(A)

03nb88

0.5

1.5

2.5

3.5

0246810

ID (A)

gfs

(S)

03nb93

100

150

200

250

300

350

10-2 10-1

1 10

102

VDS (V)

C (pF)

Ciss

Coss

Crss

Philips Semiconductors BUK78150-55A

TrenchMOS™ standard level FET

Product speciﬁcation Rev. 01 — 30 January 2001 8 of 13

VDS =25V T

j=25°C; ID=5A

Fig 13. Transfer characteristics: drain current as a

function of gate-source voltage; typical values. Fig 14. Gate-source voltage as a function of turn-on

gate charge; typical values.

VGS =0V

Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.

03nc22

0246810

VGS (V)

(A)

Tj = 150

CTj = 25

03nb87

0246

QG (nC)

VGS

(V)

VDD= 44 V

VDD= 14 V

03nc23

0.0 0.5 1.0 1.5 2.0 2.5

VSD (V)

(A)

Tj = 150

j = 25

Philips Semiconductors BUK78150-55A

TrenchMOS™ standard level FET

Product speciﬁcation Rev. 01 — 30 January 2001 9 of 13

9. Package outline

Fig 16. SOT223 (SC-73).

UNIT A1bpcDEe1HELpQywv

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC EIAJ

mm 0.10

0.01

1.8

1.5 0.80

0.60

3.1

2.9 0.32

0.22 6.7

6.3 3.7

3.3 2.3

4.6 7.3

6.7 1.1

0.7 0.95

0.85 0.1 0.10.2

DIMENSIONS (mm are the original dimensions)

SOT223 SC-73 97-02-28

99-09-13

detail X

vMA

0 2 4 mm

scale

132

Plastic surface mounted package; collector pad for good heat transfer; 4 leads SOT223

Philips Semiconductors BUK78150-55A

TrenchMOS™ standard level FET

Product speciﬁcation Rev. 01 — 30 January 2001 10 of 13

10. Soldering

11. Revision history

Dimensions in mm.

Fig 17. Reﬂow soldering footprint for SOT223 (SC-73).

MSA443

1.20

(4x)

3.90

5.90

4.80

7.40

231

3.85

1.20 (3x)

1.30 (3x)

0.30

3.60

3.50

7.00

6.15

7.65

solder lands

solder resist

occupied area

solder paste

Table 6: Revision history

Rev Date CPCN Description

01 20010130 - Product speciﬁcation; initial version.

Philips Semiconductors BUK78150-55A

TrenchMOS™ standard level FET

Product speciﬁcation Rev. 01 — 30 January 2001 11 of 13

12. Data sheet status

[1] Please consult the most recently issued data sheet before initiating or completing a design.

13. Deﬁnitions

Short-form speciﬁcation — The data in a short-form speciﬁcation is

extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.

Limiting values deﬁnition — Limiting values given are in accordance with

the Absolute Maximum Rating System (IEC 60134). Stress above one or

more of the limiting values may cause permanent damage to the device.

These are stress ratings only and operation of the device at these or at any

other conditions above those given in the Characteristics sections of the

speciﬁcation is not implied. Exposure to limiting values for extended periods

may affect device reliability.

Application information — Applications that are described herein for any

of these products are for illustrative purposes only. Philips Semiconductors

make no representation or warranty that such applications will be suitable for

the speciﬁed use without further testing or modiﬁcation.

14. Disclaimers

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips Semiconductors

customers using or selling these products for use in such applications do so

at their own risk and agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to

make changes, without notice, in the products, including circuits, standard

cells, and/or software, described or contained herein in order to improve

design and/or performance. Philips Semiconductors assumes no

responsibility or liability for the use of any of these products, conveys no

licence or title under any patent, copyright, or mask work right to these

products, and makes no representations or warranties that these products

are free from patent, copyright, or mask work right infringement, unless

otherwise speciﬁed.

Datasheet status Product status Deﬁnition[1]

Objective speciﬁcation Development This data sheet contains the design target or goal speciﬁcations for product development. Speciﬁcation may

change in any manner without notice.

Preliminary speciﬁcation Qualiﬁcation This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips

Semiconductors reserves the right to make changes at any time without notice in order to improve design and

supply the best possible product.

Product speciﬁcation Production This data sheet contains ﬁnal speciﬁcations. Philips Semiconductors reserves the right to make changes at any

time without notice in order to improve design and supply the best possible product.

Philips Semiconductors BUK78150-55A

TrenchMOS™ standard level FET

Product speciﬁcation Rev. 01 — 30 January 2001 12 of 13

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For all other countries apply to: Philips Semiconductors,

Marketing Communications,

Building BE, P.O. Box 218, 5600 MD EINDHOVEN,

The Netherlands, Fax. +31 40 272 4825

Internet: http://www.semiconductors.philips.com

(SCA71)

© Philips Electronics N.V. 2001. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 30 January 2001 Document order number: 9397 750 07738
Contents
Philips Semiconductors BUK78150-55A
TrenchMOS™ standard level FET
1 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . .  1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .  1
4 Pinning information. . . . . . . . . . . . . . . . . . . . . .  1
5 Quick reference data . . . . . . . . . . . . . . . . . . . . .  2
6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .  2
7 Thermal characteristics. . . . . . . . . . . . . . . . . . .  4
7.1 Transient thermal impedance. . . . . . . . . . . . . .  4
8 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . .  5
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .  9
10 Soldering  . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  10
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . .  10
12 Data sheet status. . . . . . . . . . . . . . . . . . . . . . .  11
13 Definitions  . . . . . . . . . . . . . . . . . . . . . . . . . . . .  11
14 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .  11