PBSS2540M,315 - NXP Semiconductors / Philips Semiconductors

DATA SH EET

Product data sheet 2003 Jul 22

DISCRETE SEMICONDUCTORS

PBSS2540M

40 V, 0.5 A

NPN low VCEsat (BISS) transistor

M3D883

BOTTOM VIEW

2003 Jul 22 2

NXP Semiconductors Product data sheet

40 V, 0.5 A

NPN low VCEsat (BISS) transistor PBSS2540M

FEATURES

•Low collector-emitter saturation volt age VCEsat

•High collector current capability IC and ICM

•High efficiency lead ing to reduced heat gener ation

•Reduced printed-circuit board requirements.

APPLICATIONS

•Power management:

– DC-DC converter

– Supply line switching

– Battery charge r

– LCD backlighting.

•Peripheral driver:

– Driver in low supply voltage applications (e.g. lamps

and LEDs).

– Inductive load dr ivers (e.g. relays, buzzers and

motors).

DESCRIPTION

Low VCEsat NPN transistor in a SOT883 leadless ultra

small plastic package.

PNP complement: PBSS3540M.

PINNING

PIN DESCRIPTION

1base

2emitter

3collector

handbook, halfpage

MAM475

Bottom view

Fig.1 Simplified outline (SOT883) and symbol.

MARKING

TYPE NUMBER MARKING CODE

PBSS2540M DC

QUICK REFERENCE DATA

SYMBOL PARAMETER MAX. UNIT

VCEO collector-emitter voltage 40 V

ICcollector current (DC) 500 mA

ICM peak collector current 1 A

RCEsat equivalent on-resistance <500 mΩ

2003 Jul 22 3

NXP Semiconductors Pr oduct data shee t

40 V, 0.5 A

NPN low VCEsat (BISS) transistor PBSS2540M

LIMITING VALUES

In accordance with the A bsolute Maxi m um Rating System (IEC 60134).

Notes

1. Refer to SOT883 standard mounting conditions.

2. Device mounted on an FR4 printed-circuit board, single-sided copper, tinplated, standard fo otprint, with 60 μm

copper strip line.

3. Device mounted on a pr inted-circuit board, single-sided copper, tinplated, mounting pad for collector 1 cm2.

THERMAL CHARACTE RISTICS

Notes

1. Refer to SOT883 standard mounting conditions.

2. Device mounted on an FR4 printed-circuit board, single-sided copper, tinplated, standard fo otprint, with 60 μm

copper strip line.

3. Device mounted on a pr inted-circuit board, single-sided copper, tinplated, mounting pad for collector 1 cm2.

4. Operated under pulsed conditions: duty cy cle δ ≤ 20%, pulse width tp ≤ 30 ms.

Soldering

Reflow soldering is the only recommended soldering method.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

VCBO collector-base volta ge open emitter −40 V

VCEO collector-emitter voltage open base −40 V

VEBO emitter-base voltage open collector −6 V

ICcollector current (DC) notes 1 and 2 −500 mA

ICM peak collector current −1 A

IBM peak base current −100 mA

Ptot total power dissipation Tamb ≤ 25 °C; notes 1 and 2 −250 mW

Tamb ≤ 25 °C; note 1 and 3 −430 mW

Tstg storage temperature −65 +150 °C

Tjjunction temperature −150 °C

Tamb operating ambient temperature −65 +150 °C

SYMBOL PARAMETER CONDITIONS VALUE UNIT

Rth j-a thermal resistance from junction to

ambient in free air; notes 1 and 2 500 K/W

in free air; notes 1, 3 and 4 290 K/W

2003 Jul 22 4

NXP Semiconductors Pr oduct data shee t

40 V, 0.5 A

NPN low VCEsat (BISS) transistor PBSS2540M

CHARACTERISTICS

Tamb = 25 °C unless otherwise specified.

Note

1. Pulse test: tp ≤ 300 μs; δ ≤ 0.02.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

ICBO collector-base cut-off current VCB = 30 V; IE = 0 −−100 nA

VCB = 30 V; IE = 0; Tj = 150 °C−−50 μA

IEBO emitter-base cu t-off current VEB = 5 V; IC = 0 −−100 nA

hFE DC current gain VCE = 2 V; IC = 10 mA 200 − −

VCE = 2 V; IC = 100 mA; note 1 150 − −

VCE = 2 V; IC = 500 mA; note 1 50 − −

VCEsat collector-emitte r sa turation v oltage IC = 10 mA; IB = 0.5 mA −−50 mV

IC = 100 mA; IB = 5 mA −−100 mV

IC = 200 mA; IB = 10 mA; note 1 −−200 mV

IC = 500 mA; IB = 50 mA; note 1 −−250 mV

RCEsat equivalent on-resistance IC = 500 mA; IB = 50 mA; note 1 −380 <500 mΩ

VBEsat base-emitt er saturation voltage IC = 500 mA; IB = 50 mA; note 1 −−1.2 V

VBEon base-emitter turn-on voltage VCE = 2 V; IC = 100 mA; note 1 −−1.1 V

fTtransition frequen c y IC = 100 mA; VCE = 5 V;

f = 100 MHz 250 450 −MHz

Cccollector capacitance VCB = 10 V; IE = Ie = 0; f = 1 MHz −−6pF

2003 Jul 22 5

NXP Semiconductors Pr oduct data shee t

40 V, 0.5 A

NPN low VCEsat (BISS) transistor PBSS2540M

handbook, halfpage

400

800

1200

200

600

1000

MHC082

10−11

hFE

10 IC (mA)

102103

(1)

(2)

(3)

Fig.2 DC current gain as a fu nction of collector

current; ty pical values.

(1) Tamb = 150 °C.

(2) Tamb = 25 °C.

(3) Tamb = −55 °C.

VCE = 2 V.

handbook, halfpage

200

1200

400

600

800

1000

MHC085

10−1110

VBE

(mV)

IC (mA)

102103

(1)

(2)

(3)

Fig.3 Base-emitter voltage as a function of

collector current; typical values.

(1) Tamb = −55 °C.

(2) Tamb = 25 °C.

(3) Tamb = 150 °C.

VCE = 2 V.

handbook, halfpage

103

102

MHC086

10−1110

VCEsat

(mV)

IC (mA)

102103

(1)

(2)

(3)

Fig.4 Collector-emitter saturation voltage as a

function of collector current; typical values.

(1) Tamb = 150 °C.

(2) Tamb = 25 °C.

(3) Tamb = −55 °C.

IC/IB = 20.

handbook, halfpage

200

1200

400

600

800

1000

MHC084

10−1110

VBEsat

(mV)

IC (mA)

102103

(1)

(2)

(3)

Fig.5 Base-emitter saturation v oltage as a

function of collector current; typical values.

(1) Tamb = 150 °C.

(2) Tamb = 25 °C.

(3) Tamb = −55 °C.

IC/IB = 20.

2003 Jul 22 6

NXP Semiconductors Pr oduct data shee t

40 V, 0.5 A

NPN low VCEsat (BISS) transistor PBSS2540M

handbook, halfpage

1200

400

800

1000

200

600

12 VCE (V)

(mA)

MHC083

(10)

(2)

(4)

(6)

(5)

(3)

(1)

(8)

(7)

(9)

Fig.6 Collector current as a function of

collector-emitter voltage; typical values.

(1) IB = 25 mA.

(2) IB = 22.5 mA.

(3) IB = 20 mA.

(4) IB = 17.5 mA.

(5) IB = 15 mA.

(6) IB = 12.5 mA.

(7) IB = 10 mA.

(8) IB = 7.5 m A.

(9) IB = 5 mA.

(10) IB = 2.5 mA.

Tamb = 25 °C.

handbook, halfpage

103

102

10−1

MHC087

10−11

RCEsat

(Ω)

10 IC (mA)

102103

(1)

(2)

(3)

Fig.7 Collector-emitter equivale nt on-resistance

as a function of collector current; typical

values.

IC/IB = 20.

(1) Tamb = 150 °C.

(2) Tamb = 25 °C.

(3) Tamb = −55 °C.

2003 Jul 22 7

NXP Semiconductors Pr oduct data shee t

40 V, 0.5 A

NPN low VCEsat (BISS) transistor PBSS2540M

PACKAGE OUTLINE

UNIT A1

max.

A(1) bb

1e1

eLL

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.50

0.46 0.20

0.12 0.55

0.47

0.03 0.62

0.55 0.35 0.65

DIMENSIONS (mm are the original dimensions)

Note

1. Including plating thickness

0.30

0.22

0.30

0.22

SOT883 SC-101 03-02-05

03-04-03

1.02

0.95

0 0.5 1 mm

scale

eadless ultra small plastic package; 3 solder lands; body 1.0 x 0.6 x 0.5 mm SOT88

2003 Jul 22 8

NXP Semiconductors Pr oduct data shee t

40 V, 0.5 A

NPN low VCEsat (BISS) transistor PBSS2540M

DATA SHEET STATUS

Notes

1. Please consult the most rec en tly issued document before initiating or co mpleting a design.

2. The product s tatus of device(s) described in this do cument may have changed since this document was published

and may differ in case of multiple devices. The latest product status information is available on th e Internet at

URL http://www.nxp.com.

DOCUMENT

STATUS(1) PRODUCT

STATUS(2) DEFINITION

Objective data sheet Development This document contains data from the objective specification for pro duct

development.

Preliminary data sheet Qualification This document contains data from the preliminary specification.

Product data sheet Production T his document contains the product specification.

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use in medical, military, aircraft, space or life support

equipment, nor in applications where failure or malfunction

of an NXP Semiconductors product can reason ably be

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accepts no liability for inclusion and/or use of NXP

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Applications ⎯ Applications that are described herein for

any of these products are for illustrative purposes only.

NXP Semiconductors makes no representation or

warranty that such applications will be suitable for the

specified use witho ut fu rth e r testing or modification .

Limiting values ⎯ Stress above one or more limiting

values (as defined in the Absolute Maximum Ratings

System of IEC 60134) may cause permanent damage to

the device. Limiting values are stress ratin gs only and

operation of the device at these or any other cond itions

above those given in the Characteristics sections of this

document is not implied. Exposure to limiting values for

extended periods may affect device reliability.

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Quick refer ence data ⎯ The Quick reference data is an

extract of th e product data given in the Limiting values an d

Characteristics sections of this document, and as such is

not complete, exhaus tive or legally binding.

NXP Semiconductors

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Customer notification

This data sheet was changed to reflect the new company name NXP Semiconductors. No change s were

made to the content, except for the legal definitions and disclaimers.

Printed in The Netherlands 613514/01/pp9 Date of release: 2003 Jul 22 Document orde r number: 9397 750 11559