Surface Mounted Ceramic Multilayer Capacitors - General Data - Philips Semiconductors / NXP Semiconductors

1997 Jul 30 1

Philips Components

Surface mounted ceramic

multilayer capacitors General data

PACKAGING

Tape on reel

Packaging conforms fully with

“IEC 286-3”

“EIA 481-1”

and

“JIS C0806”

industrial standards.

Ceramic Multilayer Capacitors are supplied on tape on reel

or in bulk case. For CMCs with a product thickness of

<1 mm, paper tape is preferred. CMCs with a product

thickness of ≥1 mm, are supplied in embossed blister tape.

CARRIER TAPE

Polycarbonate.

Table 1 Properties of carrier tape

COVER TAPE

Polyester (antistatic).

Table 2 Properties of cover tape

PARAMETER WIDTH

8.1 ±0.2 mm 12 ±0.2 mm

Thickness 190 to 280 µm 240 ±20 µm

Tensile strength at break >60 N/mm2>60 N/mm2

Elongation at break 100 to 150% 100 to 150%

Surface resistance >1012 Ω/sq. >1012 Ω/sq.

PARAMETER WIDTH

5.5 ±0.1 mm 9.5 ±0.1 mm

Breaking force ≥10.7 N ≥17.6 N

Elongation at break ≥63% ≥63%

Surface resistance <1010 Ω/sq. <1010 Ω/sq.

Softening point 71 ±5°C71±5°C

Thickness 62 µm62µm

General information

For the combination carrier/cover tape no electrostatic

behaviour is observed (relative humidity ≥30%). The

products do not stick to the cover tape.

The technical and thermal properties of polycarbonate

tapes are excellent, so there is no change in dimensions

as a function of time. The peel off force is very stable as a

function of time and temperature, and it is defined as

0.1 to 0.7 N at a peel-off speed of 120 mm/minute.

Bulk packaging

For bulk case; see Fig.5 and Table 7.

Environmental considerations

•Cover tape, carrier tape and reel do not contain the

environmentally-harmful PVC materials.

•Because the carrier tape is made of a homogeneous

material (so called mono-plastic), it is ideally suited for

recycling.

•Compared to other PVC-free materials polycarbonate

shows very little deformation as a function of

temperature and has excellent stiffness.

1997 Jul 30 2

Philips Components

Surface mounted ceramic

multilayer capacitors General data

Blister tape speciﬁcations

Table 3 Dimensions of blister tape for relevant product size code; see Fig.1

Notes

1. Typical capacitor displacement in pocket.

2. P0 pitch tolerance over any 10 pitches is ±0.2 mm.

DIMENSION PRODUCT SIZE CODE TOLERANCE

(mm)

0603 0805 1206 1210 1812 2220

A0 nominal clearance; note 1 0.15 0.20 0.30 0.30 0.40 0.40 −

B0 nominal clearance; note 1 0.15 0.20 0.30 0.30 0.40 0.40 −

K0 minimum clearance; note 1 0.05 0.05 0.05 0.05 0.05 0.05 −

W 8.1 8.1 8.1 8.1 12.0 12.0 ±0.2

E 1.75 1.75 1.75 1.75 1.75 1.75 ±0.1

F 3.5 3.5 3.5 3.5 5.5 5.5 ±0.05

D01.5 1.5 1.5 1.5 1.5 1.5 +0.1/−0.0

D1−≥1≥1≥1 1.5 1.5 +0.1/−0.0

P0; note 2 4 4 4 4 4 4 ±0.1

P1444488 ±0.1

P2222222 ±0.05

Fig.1 Blister tape.

K0: so chosen that the orientation of the component cannot change.

For W = 8 mm: T2= 2.5 mm max.

For W = 12 mm: T2= 4.5 mm max.

For dimensions see Table 3.

handbook, full pagewidth

MBG516

A0D1

direction of unreeling

cover tape

1997 Jul 30 3

Philips Components

Surface mounted ceramic

multilayer capacitors General data

Paper tape speciﬁcations

Table 4 Dimensions of paper tape for relevant product size; see Fig.2

Note

1. P0 pitch tolerance over any 10 pitches is ±0.2 mm.

SYMBOL

PRODUCT SIZE CODE

UNIT0402 0603 0805 1206

SIZE TOL. SIZE TOL. SIZE TOL. SIZE TOL.

A00.62 ±0.05 1.10 ±0.05 1.65 ±0.05 2.0 ±0.1 mm

B01.12 ±0.05 1.90 ±0.05 2.40 ±0.05 3.5 ±0.1 mm

W 8.0 ±0.2 8.0 ±0.2 8.0 ±0.2 8.0 ±0.2 mm

E 1.75 ±0.1 1.75 ±0.1 1.75 ±0.1 1.75 ±0.1 mm

F 3.5 ±0.05 3.5 ±0.05 3.5 ±0.05 3.5 ±0.05 mm

D01.5 +0.1/−0 1.5 +0.1/−0 1.5 +0.1/−0 1.5 +0.1/−0mm

; note 1 4 ±0.05 4 ±0.05 4 ±0.05 4 ±0.05 mm

P12±0.05 4 ±0.1 4 ±0.1 4 ±0.1 mm

P22±0.05 2 ±0.05 2 ±0.05 2 ±0.05 mm

Tmax 0.6 ±0.05 1.0 ±0.05 1.0 ±0.05 1.0 ±0.05 mm

Fig.2 Paper tape.

For dimensions see Table 4.

ndbook, full pagewidth

MBG251

cover tape

1997 Jul 30 4

Philips Components

Surface mounted ceramic

multilayer capacitors General data

Reel speciﬁcations

Table 5 Reel dimensions; see Fig.3

Properties of reel

Material: polystyrene

Surface resistance: <1010 Ω/sq.

TAPE WIDTH

(mm) A

(mm) N

(mm) W1

(mm) W2 MAX.

(mm)

8 180 62 ±1.5 8.4 +1.5/−0.0 14.4

8 330 62 ±1.5 8.4 +1.5/−0.0 14.4

12 180 62 ±1.5 12.4 +2/−0.0 18.4

handbook, full pagewidth

12.75 0.15

20.5 NA

MSA284

Fig.3 Reel.

Dimensions in mm.

1997 Jul 30 5

Philips Components

Surface mounted ceramic

multilayer capacitors General data

Leader/trailer tape speciﬁcation

Table 6 Leader/trailer tape data

DESCRIPTION VALUE

Minimum length of empty compartments at leader end ≥400 mm of which a minimum 240 mm of empty

compartments are covered with cover tape and 120 ±40 mm

cover tape only.

Minimum length of empty compartments at trailer end 208 mm or 260 mm.

If the length is 260 mm an extra product is placed at 208 mm

to mark this position.

Fig.4 Leader/trailer tape.

MEA529 - 2

empty compartments

with cover tape

cover tape only

120 40 mm

leader 400 mm

trailer (max. 260 mm)

trailer end

leader end

1997 Jul 30 6

Philips Components

Surface mounted ceramic

multilayer capacitors General data

Bulk case speciﬁcation

Features and benefits:

•Reduced costs

– Storage

– Transport

– Machine handling

– Packaging

•Customized labelling (bar codes).

Table 7 Packaging quantities for component size; see note 1 and Fig.5

Note

1. Refer to the selection charts in product data for specific values.

SIZE CODE DIMENSIONS OF CAPACITOR

(mm) QUANTITY

L1WT

0402 1.0 0.5 0.5 50000

0603 1.6 0.8 0.8 15000

0805 2.0 1.25 0.6 10000

0805 2.0 1.25 0.9 8000

0805 2.0 1.25 1.25 5000

Fig.5 Bulk case outline.

handbook, 4 columns

slider shutter

coupled

portion

MGB377

1997 Jul 30 7

Philips Components

Surface mounted ceramic

multilayer capacitors General data

Multi-pack box speciﬁcation

Features and benefits:

•Minimum recycling costs

•Maximum environmental

friendliness

•Reduced handling time

•Economic usage of packaging

•Customized labelling (bar codes).

Table 8 Number of reels per box; see Fig.6

REEL SIZE

(mm) TAPE SIZE

(mm) QUANTITY PER BOX

MIN. MAX.

∅180 8525

12 5 10

∅330 8 5 15

handbook, full pagewidth

MLB672

MADE IN HOLLAND

1B CG 55/125/56 ESR-Q

1206J 330p + / -5% 63V

CUSTOMER 174024

BATCH 9023456

ORIG A670 RPC RS

QTY 6X4000 DATA 9334

TYPE 1206CG331J9BB

CODENO 2222 863 15331

adhesive

tape

end cap

tape-on-reel

Philips Components

BATCH 0012345678

5000 A670 RS 9238

PHILIPS 1206 TC700

LRC01 0R14 5%

CODENO 2222 724 98002

Fig.6 Multi-pack box outline.

1997 Jul 30 8

Philips Components

Surface mounted ceramic

multilayer capacitors General data

LABELLING

Label examples are shown in Figs 7 and 8 (bar code according to EN 800 code 39).

handbook, full pagewidth

CCA601

Fig.7 Packaging label (example).

LINE MARKING EXPLANATION

1. Country of origin

2. Material code and climatic category

3. Size, termination code, value,

tolerance and rated voltage

4. Unique batch number

5. Country of origin in code: A670 is

Holland

6. Quantity and production period,

year and week code

7. 15-digit code

8. Catalogue number (12NC)

handbook, full pagewidth

CCA602

Fig.8 Reel label (example).

LINE MARKING EXPLANATION

1. Unique batch number

2. Quantity and date code

3. Material code and climatic category

4. Size, termination code, value,

tolerance and rated voltage

5. 15-digit code

6. Catalogue number (12NC)

1997 Jul 30 9

Philips Components

Surface mounted ceramic

multilayer capacitors General data

METHOD OF MOUNTING AND

DIMENSIONS OF SOLDER LANDS

For normal use the capacitors may be mounted on

printed-circuit boards or ceramic substrates by applying

wave soldering, reflow soldering (including vapour phase

soldering) or conductive adhesive in accordance with

CECC 00802 classification A. For advised soldering

profiles see Figs 9, 10 and 11.

An improper combination of soldering, substrate and chip

size can lead to a damaging of the component. The risk

increases with the chip size and with temperature

fluctuations (>100 °C). Therefore, it is advised to use the

smallest possible size and follow the dimensional

recommendations given in Tables 9 and 10 for reflow and

wave soldering. More detailed information is available

on request.

Fig.9 Reflow soldering.

Typical values (solid line).

Process limits (dotted lines).

0 50 100 150 200 250

300

250

200

150

100

10 s

260 °C

130 °C

(°C)

t (s)

MLA859

245 °C

215 °C

180 °C

10 s

40 s

2 K/s

1997 Jul 30 10

Philips Components

Surface mounted ceramic

multilayer capacitors General data

Fig.10 Double wave soldering.

Typical values (solid line).

Process limits (dotted lines).

The capacitors may be soldered twice in accordance with this method if desired.

0 50 100 150 200 250

300

250

200

150

100

10 s

235 °C to 260 °Csecond wave

5 K/s

2 K/s

first wave

200 K/s

100 °C to 130 °Cforced

cooling

2 K/s

(°C)

t (s)

MLA861

Fig.11 Vapour phase soldering.

Typical values (solid line).

Process limits (dotted line).

0 50 100 150 200 250

300

250

200

150

100

(°C)

t (s)

215 °C

180 °C

20 to 40 s

internal preheating,

e.g. by infrared,

max. 2 K/s

100 °C

130 °C

external preheating

forced

cooling

MLA860

1997 Jul 30 11

Philips Components

Surface mounted ceramic

multilayer capacitors General data

Table 9 Reﬂow soldering; for dimensions also see Fig.12

Table 10 Wave soldering (no dummy tracks allowed for ≥500 V); for dimensions also see Fig.12

SIZE

CODE

FOOTPRINT DIMENSIONS

(mm) PROCESSING REMARKS PLACEMENT

ACCURACY

(mm)

ABCDEFG

0402 1.5 0.5 0.5 0.5 0.10 1.75 0.95

IR or hot plate soldering

±0.15

0603 2.3 0.7 0.8 0.9 0.26 2.7 1.5 ±0.15

0603 2.3 0.5 0.9 0.9 0.0 2.7 1.5 ±0.25

0805 2.8 0.9 0.95 1.4 0.45 3.2 2.1 ±0.25

1206 4.0 2.0 1.0 1.8 1.4 4.4 2.5 ±0.25

1210 4.0 2.0 1.0 2.7 1.4 4.4 3.4 ±0.25

1808 5.4 3.3 1.05 2.3 2.7 5.8 2.9 ceramic substrate only ±0.25

1812 5.4 3.3 1.05 3.5 2.7 5.8 4.1 ±0.25

2220 6.6 4.5 1.05 5.3 3.9 7.0 5.9 ±0.25

SIZE

CODE

FOOTPRINT DIMENSIONS

(mm) PROPOSED NUMBER AND

DIMENSIONS OF DUMMY

TRACKS

(mm)

PLACEMENT

ACCURACY

(mm)

ABCDEFG

0603 2.4 1.0 0.7 0.8 0.2 3.0 1.9 1 ×(0.2 ×0.8) ±0.10

0603 2.7 0.9 0.9 0.8 0.0 3.2 2.1 1 ×(0.3 ×0.8) ±0.25

0805 3.2 1.4 0.9 1.3 0.36 4.1 2.5 1 ×(0.3 ×1.3) ±0.15

0805 3.4 1.3 1.05 1.3 0.2 4.3 2.7 1 ×(0.2 ×1.3) ±0.25

1206 4.8 2.3 1.25 1.7 1.25 5.9 3.2 3 ×(0.25 ×1.7) ±0.25

1210 5.3 2.3 1.5 2.6 1.25 6.3 4.2 3 ×(0.25 ×2.6) ±0.25

Fig.12 Recommended dimensions of solder lands.

CCA045

preferred direction during wave soldering















,





yz

{



y

{









solder land /

solder paste

pattern

solder resist

pattern

occupied area

tracks

E= available track area under the CMC.

1997 Jul 30 12

Philips Components

Surface mounted ceramic

multilayer capacitors General data

TEST CONDITIONS IN STATIC SOLDER BATH

PARAMETER DESCRIPTION

Solderability

95% covered with smooth and bright solder coating CECC requirement: 235 ±5°C for 2 ±0.5 s

IEC requirement: 215 ±3°Cfor3±0.3 s

Resistance to leaching

10% of the metallization of the edges of the head face

may be missing (inner electrodes are not visible)

∆C/C class 1: 0.5% or 0.5 pF and

∆C/C class 2: >−5% and ≤10%

260 ±5°C for 30 ±1s

Fig.13 Resistance to leaching of AgPd metallized

terminations (in static solder bath) at

various temperatures.

0 100 500

260

220

200

240

MEA612

200 300 400 t (s)

( C)

NO LEACHING

LEACHING

(DISSOLUTION 10 %)

For NiSn metallized terminations, the leaching resistance

is a factor of 10 times better than shown in the graph.

1997 Jul 30 13

Philips Components

Surface mounted ceramic

multilayer capacitors General data

TESTS AND REQUIREMENTS

Table 11 Test procedures and requirements

IEC 384-10/

CECC 32 100

CLAUSE

IEC 68-2

TEST

METHOD TEST PROCEDURE REQUIREMENTS

4.4 mounting the capacitors may be mounted

on printed-circuit boards or

ceramic substrates by applying

wave soldering, reﬂow soldering

(including vapour phase

soldering) or conductive adhesive

no visible damage

4.5 visual inspection and

dimension check any applicable method using ×10

magniﬁcation in accordance with speciﬁcation

4.6.1 capacitance class 1:

C≤1000 pF, f = 1 MHz;

C > 1000 pF, f = 1 kHz;

NP0: measuring voltage

1Vat20°C

within speciﬁed tolerance

class 2:

for all capacitors f = 1 kHz;

X7R: measuring voltage

1Vat20°C

Y5V/Z5U: measuring voltage

1Vat25°C

4.6.2 tan δclass 1:

C≤1000 pF, f = 1 MHz;

C > 1000 pF, f = 1 kHz;

NP0: measuring voltage

1Vat20°C

in accordance with speciﬁcation

class 2:

for all capacitors f = 1 kHz;

X7R: measuring voltage

1Vat20°C

Y5V/Z5U: measuring voltage

1Vat25°C

4.6.3 insulation resistance at UR (DC) for 1 minute in accordance with speciﬁcation

4.6.4 voltage proof UR≤100 V:

2.5 ×URfor 1 minute;

UR> 100 V:

1.5 ×UR+100 for 1 minute

no breakdown or ﬂashover

4.7.1 temperature

coefﬁcient class 1: between minimum and

maximum temperature in accordance with speciﬁcation

4.7.2 temperature

characteristic class 2: between minimum and

maximum temperature in accordance with speciﬁcation

4.8 adhesion a force of 5 N applied for 10 s to

the line joining the terminations

and in a plane parallel to the

substrate

no visible damage

1997 Jul 30 14

Philips Components

Surface mounted ceramic

multilayer capacitors General data

4.9 bond strength of

plating on end face mounted in accordance with

CECC 32 100, paragraph 4.4 no visible damage

conditions: bending

1 mm at a rate of 1 mm/s,

radius jig. 340 mm

∆C/C:

class 1: ≤1%

class 2, X7R: ≤10%

class 2, Y5V: ≤20%

4.10 Tb resistance to

soldering heat 260 ±5°C for 10 ±0.5 s in a

static solder bath the terminations shall be well

tinned after recovery

∆C/C:

class 1: ≤0.5% or 0.5 pF

whichever is greater

class 2, X7R:

>−5% and ≤10%

class 2, Y5V:

>−10% and ≤20%

resistance to

leaching 260 ±5°C for 30 ±1 s in a static

solder bath using visual enlargement of

×10, dissolution of the

terminations shall not

exceed 10%

4.11 Ta solderability zero hour test, and test after

storage (20 to 24 months) in

original packing in normal

atmosphere;

unmounted chips completely

immersed for 2 ±0.5 s in a solder

bath at 235 ±5°C

the terminations shall be well

tinned

4.12 Na rapid change of

temperature preconditioning, class 2 only:

NP0/X7R: −55 to +125 °C;

5 cycles

Y5V: −25 to +85 °C;

5 cycles

no visible damage after

24 hours recovery

∆C/C:

class 1: ≤1% or 1 pF

class 2, X7R: ≤15%

class 2, Y5V: ≤20%

IEC 384-10/

CECC 32 100

CLAUSE

IEC 68-2

TEST

METHOD TEST PROCEDURE REQUIREMENTS

1997 Jul 30 15

Philips Components

Surface mounted ceramic

multilayer capacitors General data

4.14 Ca damp heat,

steady state preconditioning, class 2 only:

56 days at 40 °C;

90 to 95% RH; UR applied

no visual damage

after recovery

class 1: 1 to 2 hours

class 2: 24 hours

∆C/C:

class 1: 2% or 1 pF,

whichever is greater

class 2, X7R: ≤15%

class 2, Y5V: ≤30%

tan δ:

class 1: ≤2×speciﬁed value

class 2: ≤7%

Rins:

class 1:

2500 MΩ or RiCR≥25 s,

whichever is less

class 2:

1000 MΩ or RiCR≥25 s,

whichever is less

4.15 endurance preconditioning, class 2 only:

1000 hours at upper category

temperature at:

2×UR for UR=50V;

1.5 ×UR for other rated voltages

no visible damage after

24 hours recovery:

∆C/C:

class 1: 2% or 1 pF,

whichever is greater

class 2, X7R: ≤20%

class 2, Y5V: ≤30%

tan δ:

class 1: ≤2×speciﬁed value

class 2: ≤7%

Rins:

class 1:

4000 MΩ or RiCR≥40 s,

whichever is less

class 2:

2 000 MΩ or RiCR≥50 s,

whichever is less

CECC 32101 - 801 damp heat

accelerated,

steady state

85 °C; 85% RH; 500 hours with

bias 1.5 V and UR

Rins shall not be less than 10%

of the initial requirements

IEC 384-10/

CECC 32 100

CLAUSE

IEC 68-2

TEST

METHOD TEST PROCEDURE REQUIREMENTS