SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C - APRIL 1985 - REVISED MAY 2010 Memory Address Registers D PNP Inputs Reduce DC Loading D Hysteresis at Inputs Improves Noise SN54LS', SN54S' . . . J OR W PACKAGE SN74LS240, SN74LS244 . . . DB, DW, N, OR NS PACKAGE SN74LS241 . . . DW, N, OR NS PACKAGE SN74S' . . . DW OR N PACKAGE (TOP VIEW) Margins 1G 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND description 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 2G/2G 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 2G for 'LS241 and 'S241 or 2G for all other drivers. SN54LS', SN54S' . . . FK PACKAGE (TOP VIEW) 2Y4 1A1 1G VCC These octal buffers and line drivers are designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The designer has a choice of selected combinations of inverting and noninverting outputs, symmetrical, active-low output-control (G) inputs, and complementary output-control (G and G) inputs. These devices feature high fan-out, improved fan-in, and 400-mV noise margin. The SN74LS' and SN74S' devices can be used to drive terminated lines down to 133 . 1 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1Y1 2A4 1Y2 2A3 1Y3 2Y1 GND 2A1 1Y4 2A2 1A2 2Y3 1A3 2Y2 1A4 2G/2G D 3-State Outputs Drive Bus Lines or Buffer 2G for 'LS241 and 'S241 or 2G for all other drivers. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2010, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C - APRIL 1985 - REVISED MAY 2010 ORDERING INFORMATION{ PACKAGE} TA PDIP - N 0C to 70C SOIC - DW SOP - NS SSOP - DB Tube ORDERABLE PART NUMBER SN74LS240N SN74LS240N SN74LS241N SN74LS241N SN74LS244N SN74LS244N SN74S240N SN74S240N SN74S241N SN74S241N SN74S244N SN74S244N Tube SN74LS240DW Tape and reel SN74LS240DWR Tube SN74LS241DW Tape and reel SN74LS241DWR Tube SN74LS244DW Tape and reel SN74LS244DWR Tube SN74S240DW Tape and reel SN74S240DWR Tube SN74S241DW Tape and reel SN74S241DWR Tube SN74S244DW Tape and reel SN74S244DWR Tape and reel Tape and reel TOP-SIDE MARKING LS240 LS241 LS244 S240 S241 S244 SN74LS240NSR 74LS240 SN74LS241NSR 74LS241 SN74LS244NSR 74LS244 SN74LS240DBR LS240 SN74LS244DBR LS244 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C - APRIL 1985 - REVISED MAY 2010 ORDERING INFORMATION{ (CONTINUED) PACKAGE} TA CDIP - J Tube -55C 55C to 125C CFP - W LCCC - FK Tube Tube ORDERABLE PART NUMBER TOP-SIDE MARKING SN54LS240J SN54LS240J SNJ54LS240J SNJ54LS240J SN54LS241J SN54LS241J SNJ54LS241J SNJ54LS241J SN54LS244J SN54LS244J SNJ54LS244J SNJ54LS244J SN54S240J SN54S240J SNJ54S240J SNJ54S240J SN54S241J SN54S241J SNJ54S241J SNJ54S241J SN54S244J SN54S244J SNJ54S244J SNJ54S244J SNJ54LS240W SNJ54LS240W SNJ54LS241W SNJ54LS241W SNJ54LS244W SNJ54LS244W SNJ54S240W SNJ54S240W SNJ54S241W SNJ54S241W SNJ54S244W SNJ54S244W SNJ54LS240FK SNJ54LS240FK SNJ54LS241FK SNJ54LS241FK SNJ54LS244FK SNJ54LS244FK SNJ54S240FK SNJ54S240FK SNJ54S241FK SNJ54S241FK SNJ54S244FK SNJ54S244FK For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C - APRIL 1985 - REVISED MAY 2010 schematics of inputs and outputs 'LS240, 'LS241, 'LS244 'S240, 'S241, 'S244 EQUIVALENT OF EACH INPUT EQUIVALENT OF EACH INPUT VCC VCC Req 9 k NOM Input Input G and G inputs: Req = 2 k NOM A inputs: Req = 2.8 k NOM TYPICAL OF ALL OUTPUTS VCC R Output GND 'LS240. 'LS241, 'LS244: R = 50 NOM 'S240, `S241, S244: R = 25 NOM 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C - APRIL 1985 - REVISED MAY 2010 logic diagram 'LS240, 'S240 1G 1A1 1A2 1A3 1A4 2G 2A1 2A2 2A3 2A4 'LS241, 'S241 1 1G 2 18 1Y1 1A1 4 16 1Y2 1A2 6 14 1Y3 1A3 8 12 1Y4 1A4 19 2G 11 9 13 7 15 5 17 3 2Y1 2A1 2Y2 2A2 2Y3 2A3 2Y4 2A4 1 2 18 4 16 6 14 8 12 1Y1 1Y2 1Y3 1Y4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 'LS244, 'S244 1G 1A1 1A2 1A3 1A4 2G 2A1 2A2 2A3 2A4 1 2 18 4 16 6 14 8 12 1Y1 1Y2 1Y3 1Y4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 Pin numbers shown are for DB, DW, J, N, NS, and W packages. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C - APRIL 1985 - REVISED MAY 2010 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: 'LS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V 'S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Off-state output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. Voltage values are with respect to network ground terminal. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions SN54LS' NOM MAX MIN NOM MAX 4.5 5 5.5 4.75 5 5.25 UNIT VCC Supply voltage (see Note 1) VIH High-level input voltage VIL Low-level input voltage 0.7 0.8 V IOH High-level output current -12 -15 mA IOL Low-level output current 12 24 mA TA Operating free-air temperature 70 C 2 -55 NOTE 1: Voltage values are with respect to network ground terminal. 6 SN74LS' MIN POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 2 125 0 V V SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C - APRIL 1985 - REVISED MAY 2010 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LS' TEST CONDITIONS PARAMETER VIK VCC = MIN, Hysteresis (VT+ - VT-) VCC = MIN MIN TYP II = -18 mA SN74LS' MAX MIN TYP -1.5 MAX -1.5 0.2 0.4 0.2 0.4 3.4 2.4 3.4 UNIT V V VCC = MIN, IOH = -3 mA VIH = 2 V, VIL = MAX, 2.4 VCC = MIN, IOH = MAX VIH = 2 V, VIL = 0.5 V, 2 VOL VCC = MIN, VIL = MAX VIH = 2 V, V IOZH VCC = MAX, VIL = MAX VIH = 2 V, VO = 2.7 V 20 20 A IOZL VCC = MAX, VIL = MAX VIH = 2 V, VO = 0.4 V -20 -20 A II VCC = MAX, VI = 7 V 0.1 0.1 mA IIH VCC = MAX, VI = 2.7 V 20 20 A IIL VCC = MAX, VIL = 0.4 V -0.2 mA IOS VCC = MAX, -225 mA VOH V IOL = 12 mA VCC = MAX MAX, Output open 0.4 0.4 IOL = 24 mA 0.5 -0.2 -40 Outputs high ICC 2 Outputs low Outputs disabled -225 -40 All 17 27 17 27 'LS240 26 44 26 44 'LS241, 'LS244 27 46 27 46 'LS240 29 50 29 50 'LS241, 'LS244 32 54 32 54 V mA For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. All typical values are at V CC = 5 V, TA = 25C. Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second. switching characteristics, VCC = 5 V, TA = 25C (see Figure 1) 'LS240 PARAMETER tPLH tPHL tPZL tPZH tPLZ tPHZ TEST CONDITIONS MIN RL = 667 , CL = 45 pF RL = 667 , CL = 45 pF F RL = 667 , CL = 5 pF POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 'LS241, 'LS244 TYP MAX 9 MIN TYP MAX 14 12 18 12 18 12 18 20 30 20 30 15 23 15 23 10 20 10 20 15 25 15 25 UNIT ns ns ns 7 SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C - APRIL 1985 - REVISED MAY 2010 recommended operating conditions SN54S' SN74S' MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.75 5 5.25 UNIT VCC Supply voltage (see Note 1) VIH High-level input voltage VIL Low-level input voltage 0.8 0.8 V IOH High-level output current -12 -15 mA IOL Low-level output current 48 64 mA 40 k 70 C 2 2 External resistance between any input and VCC or ground TA V 40 Operating free-air temperature (see Note 3) -55 125 V 0 NOTES: 1. Voltage values are with respect to network ground terminal. 3. An SN54S241J operating at free-air temperature above 116C requires a heat sink that provides a thermal resistance from case to free air, RCA, of not more that 40C/W. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54S' TEST CONDITIONS PARAMETER VIK VCC = MIN, Hysteresis (VT+ - VT-) VCC = MIN MIN TYP II = -18 mA SN74S' MAX MIN TYP -1.2 0.2 0.4 -1.2 0.2 UNIT V 0.4 V 3.4 V VCC = MIN IOH = -1 mA VIH = 2 V, VIL = 0.8 V, VCC = MIN, IOH = -3 mA VIH = 2 V, VIL = 0.8 V, 2.4 VCC = MIN, IOH = MAX VIH = 2 V, VIL = 0.5 V, 2 VOL VCC = MIN, IOL = MAX VIH = 2 V, VIL = 0.8 V, 0.55 0.55 V IOZH VCC = MAX, VIL = 0.8 V VIH = 2 V, VO = 2.4 V 50 50 A IOZL VCC = MAX, VIL = 0.8 V VIH = 2 V, VO = 0.5 V -50 -50 A II VCC = MAX, VI = 5.5 V 1 1 mA IIH VCC = MAX, VI = 2.7 V 50 50 A -400 -400 A -2 mA -225 mA VOH 2.7 3.4 IIL VCC = MAX MAX, IOS VCC = MAX 5V VI = 0 0.5 ICC VCC = MAX, Output open Any G -2 -50 Outputs high Outputs low Outputs disabled 2.4 2 Any A -225 -50 'S240 80 123 80 135 'S241,'S244 95 147 95 160 'S240 100 145 100 150 'S241, 'S244 120 170 120 180 'S240 100 145 100 150 'S241, 'S244 120 170 120 180 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. All typical values are at V CC = 5 V, TA = 25C. Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second. 8 MAX POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 mA SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C - APRIL 1985 - REVISED MAY 2010 switching characteristics, VCC = 5 V, TA = 25C (see Figure 2) 'S240 PARAMETER tPLH tPHL tPZL tPZH tPLZ tPHZ TEST CONDITIONS MIN RL = 90 , CL = 50 pF F RL = 90 , CL = 50 pF F RL = 90 , CL = 5 pF POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 'S241, 'S244 TYP MAX 4.5 4.5 MIN TYP MAX 7 6 9 7 6 9 10 15 10 15 6.5 10 8 12 10 15 10 15 6 9 6 9 UNIT ns ns ns 9 SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C - APRIL 1985 - REVISED MAY 2010 PARAMETER MEASUREMENT INFORMATION SERIES 54LS/74LS DEVICES VCC Test Point Test Point VCC RL From Output Under Test CL (see Note A) CL (see Note A) High-Level Pulse 1.3 V S2 LOAD CIRCUIT FOR 3-STATE OUTPUTS 3V Timing Input 1.3 V 5 k Test Point LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS LOAD CIRCUIT FOR 2-STATE TOTEM-POLE OUTPUTS (see Note B) CL (see Note A) RL (see Note B) S1 From Output Under Test VCC From Output Under Test RL 1.3 V 0V tw Low-Level Pulse 1.3 V tsu Data Input 1.3 V VOLTAGE WAVEFORMS PULSE DURATIONS 1.3 V 1.3 V Output Control (low-level enabling) 0V tPLH In-Phase Output (see Note D) 1.3 V 0V 3V 1.3 V 1.3 V 0V tPZL tPLZ tPHL VOH 1.3 V 1.3 V Waveform 1 (see Notes C and D) VOL + 0.3 V VOL tPZH tPLH VOH 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.5 V 1.3 V VOL tPHL Out-of-Phase Output (see Note D) 3V 1.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V Input th Waveform 2 (see Notes C and D) tPHZ VOH 1.3 V VOH - 0.3 V 1.5 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. All diodes are 1N3064 or equivalent. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. S1 and S2 are closed for tPLH, tPHL, tPHZ, and tPLZ; S1 is open and S2 is closed for tPZH; S1 is closed and S2 is open for tPZL. E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples. F. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO 50 , tr 15 ns, tf 6 ns. G. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 10 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C - APRIL 1985 - REVISED MAY 2010 PARAMETER MEASUREMENT INFORMATION SERIES 54S/74S DEVICES VCC Test Point Test Point VCC RL (see Note B) From Output Under Test CL (see Note A) High-Level Pulse 1.5 V S2 LOAD CIRCUIT FOR 3-STATE OUTPUTS 3V Timing Input 1.5 V 1 k Test Point LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS LOAD CIRCUIT FOR 2-STATE TOTEM-POLE OUTPUTS (see Note B) CL (see Note A) RL CL (see Note A) S1 From Output Under Test VCC From Output Under Test RL 1.5 V 0V tw Low-Level Pulse 1.5 V tsu 0V In-Phase Output (see Note D) tPHL VOH 1.5 V Out-of-Phase Output (see Note D) 1.5 V 3V 1.5 V Waveform 1 (see Notes C and D) tPLZ VOH 1.5 V 1.5 V VOL VOL Waveform 2 (see Notes C and D) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.5 V 1.5 V tPZH tPLH 1.5 V 0V tPZL VOL tPHL 1.5 V 0V Output Control (low-level enabling) 1.5 V tPLH 1.5 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.5 V 3V Data Input 1.5 V VOLTAGE WAVEFORMS PULSE DURATIONS Input th VOL + 0.5 V tPHZ VOH 1.5 V VOH - 0.5 V 1.5 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. All diodes are 1N3064 or equivalent. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. S1 and S2 are closed for tPLH, tPHL, tPHZ, and tPLZ; S1 is open and S2 is closed for tPZH; S1 is closed and S2 is open for tPZL. E. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO 50 ; tr and tf 7 ns for Series 54/74 devices and tr and tf 2.5 ns for Series 54S/74S devices. F. The outputs are measured one at a time with one input transition per measurement. Figure 2. Load Circuits and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 11 SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SDLS144C - APRIL 1985 - REVISED MAY 2010 APPLICATION INFORMATION 12 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) 5962-7801201VRA ACTIVE CDIP J 20 20 TBD A42 N / A for Pkg Type -55 to 125 5962-7801201VR A SNV54LS240J 5962-7801201VSA ACTIVE CFP W 20 25 TBD Call TI N / A for Pkg Type -55 to 125 5962-7801201VS A SNV54LS240W 7705701RA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 7705701RA SNJ54LS244J 7705701SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 7705701SA SNJ54LS244W 78012012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 78012012A SNJ54LS 240FK 7801201RA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 7801201RA SNJ54LS240J 7801201SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 7801201SA SNJ54LS240W JM38510/32401B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 32401B2A JM38510/32401BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32401BRA JM38510/32401BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 32401BSA JM38510/32402B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 32402B2A JM38510/32402BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32402BRA JM38510/32402BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 32402BSA JM38510/32403B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 32403B2A JM38510/32403BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32403BRA JM38510/32403BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 32403BSA Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) JM38510/32403SRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32403SRA JM38510/32403SSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 32403SSA M38510/32401B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 32401B2A M38510/32401BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32401BRA M38510/32401BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 32401BSA M38510/32402B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 32402B2A M38510/32402BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32402BRA M38510/32402BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 32402BSA M38510/32403B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 32403B2A M38510/32403BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32403BRA M38510/32403BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 32403BSA M38510/32403SRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32403SRA M38510/32403SSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 32403SSA SN54LS240J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS240J SN54LS241J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS241J SN54LS244J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS244J SN54S240J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54S240J SN54S241J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54S241J SN54S244J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54S244J Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) SN74LS240DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS240 SN74LS240DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS240 SN74LS240DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS240 SN74LS240DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS240 SN74LS240DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS240 TBD Call TI Call TI 0 to 70 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TBD Call TI Call TI 0 to 70 SN74LS240J OBSOLETE CDIP J 20 SN74LS240N ACTIVE PDIP N 20 SN74LS240N3 OBSOLETE PDIP N 20 SN74LS240NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS240N SN74LS240NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS240 SN74LS240NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS240 SN74LS240NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS240 SN74LS241DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS241 SN74LS241DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS241 SN74LS241DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS241 SN74LS241DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS241 SN74LS241DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS241 SN74LS241DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS241 SN74LS241J OBSOLETE CDIP J 20 TBD Call TI Call TI 0 to 70 Addendum-Page 3 SN74LS240N Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty SN74LS241N ACTIVE PDIP N 20 Eco Plan Lead/Ball Finish (2) 20 Pb-Free (RoHS) MSL Peak Temp Op Temp (C) Device Marking (3) CU NIPDAU (4/5) N / A for Pkg Type 0 to 70 SN74LS241N SN74LS241N3 OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 70 SN74LS241NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS241N SN74LS241NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS241 SN74LS241NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS241 SN74LS241NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS241 SN74LS244DBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244 SN74LS244DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244 SN74LS244DBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244 SN74LS244DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244 SN74LS244DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244 SN74LS244DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244 SN74LS244DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244 SN74LS244DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244 SN74LS244DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244 SN74LS244J OBSOLETE CDIP J 20 TBD Call TI Call TI 0 to 70 SN74LS244N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS244N3 OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 70 SN74LS244NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 Addendum-Page 4 SN74LS244N SN74LS244N Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) SN74LS244NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS244 SN74LS244NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS244 SN74LS244NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS244 SN74S240DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S240 SN74S240DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S240 SN74S240DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S240 SN74S240DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S240 SN74S240DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S240 SN74S240DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S240 SN74S240N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74S240N SN74S240N3 OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 70 SN74S240NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74S240N SN74S241DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S241 SN74S241DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S241 SN74S241DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S241 SN74S241DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S241 SN74S241DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S241 SN74S241DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S241 SN74S241J OBSOLETE CDIP J 20 TBD Call TI Call TI 0 to 70 Addendum-Page 5 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty SN74S241N ACTIVE PDIP N 20 Eco Plan Lead/Ball Finish (2) 20 Pb-Free (RoHS) MSL Peak Temp Op Temp (C) Device Marking (3) CU NIPDAU (4/5) N / A for Pkg Type 0 to 70 SN74S241N SN74S241N3 OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 70 SN74S241NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74S241N SN74S244DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S244 SN74S244DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S244 SN74S244DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S244 SN74S244DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S244 SN74S244DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S244 SN74S244DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S244 TBD Call TI Call TI 0 to 70 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TBD Call TI Call TI 0 to 70 SN74S244J OBSOLETE CDIP J 20 SN74S244N ACTIVE PDIP N 20 SN74S244N3 OBSOLETE PDIP N 20 SN74S244NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74S244N SNJ54LS240FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 78012012A SNJ54LS 240FK SNJ54LS240J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 7801201RA SNJ54LS240J SNJ54LS240W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 7801201SA SNJ54LS240W SNJ54LS241FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54LS 241FK SNJ54LS241J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54LS241J SNJ54LS241W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 SNJ54LS241W Addendum-Page 6 SN74S244N Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) SNJ54LS244FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54LS 244FK SNJ54LS244J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 7705701RA SNJ54LS244J SNJ54LS244W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 7705701SA SNJ54LS244W SNJ54S240FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54S 240FK SNJ54S240J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54S240J SNJ54S240W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 SNJ54S240W SNJ54S241FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54S 241FK SNJ54S241J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54S241J SNJ54S241W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 SNJ54S241W SNJ54S244FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54S 244FK SNJ54S244J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54S244J SNJ54S244W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 SNJ54S244W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Addendum-Page 7 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54LS240, SN54LS240-SP, SN54LS241, SN54LS244, SN54LS244-SP, SN54S240, SN54S241, SN54S244, SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244 : * Catalog: SN74LS240, SN54LS240, SN74LS241, SN74LS244, SN54LS244, SN74S240, SN74S241, SN74S244 * Military: SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244 * Space: SN54LS240-SP, SN54LS244-SP NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product * Military - QML certified for Military and Defense Applications * Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 8 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74LS240DWR Package Package Pins Type Drawing SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) DW 20 2000 330.0 24.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 10.8 13.0 2.7 12.0 24.0 Q1 SN74LS240NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74LS241DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74LS241NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74LS244DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 SN74LS244DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74LS244NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74S240DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74S241DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74S244DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LS240DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74LS240NSR SO NS 20 2000 367.0 367.0 45.0 SN74LS241DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74LS241NSR SO NS 20 2000 367.0 367.0 45.0 SN74LS244DBR SSOP DB 20 2000 367.0 367.0 38.0 SN74LS244DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74LS244NSR SO NS 20 2000 367.0 367.0 45.0 SN74S240DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74S241DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74S244DWR SOIC DW 20 2000 367.0 367.0 45.0 Pack Materials-Page 2 MECHANICAL DATA MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0-8 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as "components") are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. 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