1. General description
The TJA1057 is part of the Mantis family of high-speed CAN transceivers. It provides an
interface between a Controller Area Network (CAN) protocol controller and the physical
two-wire CAN bus. The transceiver is designed for high-speed CAN applications in the
automotive industry, providing the differential transmit and receive capability to (a
microcontroller with) a CAN protocol controller.
The TJA1057 offers a feature set optimized for 12 V automotive applications, with
significant improvements over first- and second-generation CAN transceivers from NXP,
such as the TJA1050, and excellent ElectroMagnetic Compatibility (EMC) performance.
The TJA1057 also displays ideal passive behavior to the CAN bus when the supply
voltage is off.
The TJA1057 implements the CAN physical layer as defined in the current
ISO11898-2:2003 standard. The T JA1057T variant is specified for data rates up to
1 Mbit/ s. Pen di ng the release of the updated version of ISO11898-2 including CAN FD,
additional timing parameters defining loop delay symmetry are specified for the
TJA1057GT/TJA1057GTK variants. This implementation enables reliable communication
in the CAN FD fast phase at data rates up to 5 Mbit/s.
These features make the TJA1057 an excellent choice for HS-CAN networks that only
require basic CAN functionality.
2. Features and benefits
2.1 General
Fully ISO 11898-2:2003 compliant
Optimized for use in 12 V automotive systems
EMC performance satisfies 'Hardware Requirements for LIN, CAN and FlexRay
Interfaces in Automotive Applications’, Version 1.3, May 2012.
Can interface with 3.3 V and 5 V-supplied microcontrollers, provided the
microcontroller I/Os are 5 V tolerant.
AEC-Q100 qualified
Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)
compliant)
Available in SO8 package and leadless HVSON8 package (3.0 mm 3.0 mm) with
improved Automated Optical Inspection (AOI) capability
2.2 Predictable and fail-safe behavior
Functional behavior predictable under all supply conditions
TJA1057
High-speed CAN transceiver
Rev. 4 — 10 July 2015 Product data sheet
TJA1057 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 10 July 2015 2 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
Transceiver disengages from bus when not powered (zero load)
Transmit Data (TXD) dominant time-out function
Internal biasing of TXD an d S input pin s
2.3 Protection
High ESD handling capability on the bus pins (8 kV IEC and HBM)
Bus pins protected against transients in automotive environments
Undervoltage detection on pin VCC
Thermally protected
2.4 TJA1057GT/TJA1057GTK
Loop delay symmetry guaranteed for data rates up to 5 Mbit/s
Improved TXD to RXD propagation delay of 210 ns
3. Quick reference data
4. Ordering information
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 4.75 - 5.25 V
Vuvd(VCC) undervoltage detection voltage
on pin VCC
3.5 4 4.3 V
ICC supply current Silent mode 0.1 - 1.2 mA
Normal mode; bus recessive 2 5 10 mA
Normal mode; bus dominant 20 45 70 mA
VESD electrostatic discharge voltage IEC 61000-4-2 at pins CANH and CANL 8- +8kV
VCANH voltage on pin CANH limiting value according to IEC60134 42 - +42 V
VCANL voltage on pin CANL limiting value according to IEC60134 42 - +42 V
Tvj virtual junction temperature 40 - +150 C
Table 2. Orderi ng information
Type number Package
Name Description Version
TJA1057T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
TJA1057GT
TJA1057GTK HVSON8 plastic thermal enhanced very thin sma ll outline package; no leads;
8 t erminals; body 3 3 0.85 mm SOT782-1
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Product data sheet Rev. 4 — 10 July 2015 3 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
5. Block diagram
Fig 1. Block diagram
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TJA1057 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 10 July 2015 4 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
6. Pinning information
6.1 Pinning
6.2 Pin description
[1] For enhanced thermal and electrical performance, the exposed center pad of the HVSON8 package should
be soldered to board ground.
a. SO8 b. HVSON8
Fig 2. Pin configura tio n diagrams
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Table 3. Pin description
Symbol Pin Description
TXD 1 transmit data input
GND[1] 2 ground
VCC 3 supply voltage
RXD 4 receive data output; reads out data from the bus lines
n.c. 5 not connected
CANL 6 LOW-level CAN bus line
CANH 7 HIGH-level CAN bus line
S 8 Sile nt mode control inp ut
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Product data sheet Rev. 4 — 10 July 2015 5 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
7. Functional description
7.1 Operating modes
The TJA1057 supports two operating modes, Normal and Silent. The operating mode is
selected via pin S. See Table 4 for a description of the operating modes under normal
supply conditions.
[1] ‘x’ = don’t care.
7.1.1 Normal mode
A LOW level on pin S selects Normal mode . In this mode, the transceiver can tran smit and
receive data via the bu s lines, CANH and CANL (see Figure 1 for the block diagr am). The
diff erential receiver converts the analog data on the bus lines into digital data which is
output on pin RXD. The slopes of the output signals on the bus lines are controlled
internally and are optimized in a way that guarantees the lowest possible EME.
7.1.2 Silent mode
A HIGH level on pin S selects Silent mode. The transmitter is disabled in Silent mode,
releasing the bus pin s to re ce ssiv e state. All other IC functions, including the receiver,
continue to operate as in Norm al mode. Si lent mode can be used to p revent a fa ulty CAN
controller disrupting all network communications.
7.2 Fail-safe features
7.2.1 TXD dominant time-out function
A 'TXD dominant time-out' timer is started when pin TXD is set LOW. If the LOW state on
this pin persists for longer than tto(dom)TXD, the transmitter is disabled, relea s ing th e bu s
lines to recessive state. This function prevents a hardware and/or software application
failure from driving the bus lines to a permanent dominant state (blocking all network
communications). The TXD dominant time-out timer is reset when pin TXD is set HIGH.
The TXD dominant time-out time also defines the minimum possible bit rate of
approximately 25 kbit/s.
7.2.2 Internal biasing of TXD and S input pins
Pins TXD and S have internal pull-ups to VCC to ensure a safe, defined state in case one
or both of these pin s ar e left floating . P ull- up currents flow in these pins in all states; both
pins should be held HIGH in Silent mode to minimize supply current.
Table 4. Operating modes
Mode Inputs Outputs
Pin S Pin TXD CAN driver Pin RXD
Normal LOW LOW dominant LOW
HIGH recessive LOW when bus dominant
HIGH when bus recessive
Silent HIGH x[1] biased to recessive follows bus
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Product data sheet Rev. 4 — 10 July 2015 6 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
7.2.3 Undervoltage detection on pins VCC
If VCC drops below the undervoltag e detection level, Vuvd(VCC), the transceiver switches of f
and disengages from the bus (zero load; bus pins floating) until VCC has recovered. The
output drivers are enabled once VCC is again within the operating range and TXD has
been reset to HIGH.
7.2.4 Overtemperature protection
The output dri vers are protecte d against over temperature cond itions. If the virtual ju nction
temperature exceeds the shutdown junction temperature, Tj(sd), both output drivers are
disabled. When the virtual junction temperatur e drops below Tj(sd) again, the output
drivers recover once TXD has been reset to HIGH. Including the TXD condition prevents
output driver oscillation due to small variations in temperature.
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Product data sheet Rev. 4 — 10 July 2015 7 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
8. Limiting values
[1] According to IEC TS 62228 (2007), Section 4.2.4; parameters for standard pulses defined in ISO7637 part 2: 2004-06.
[2] According to IEC TS 62228 (2007), Section 4.3; DIN EN 61000-4-2.
[3] According to AEC-Q100-002.
[4] According to AEC-Q100-003.
[5] According to AEC-Q100-011; grade C3B.
[6] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: Tvj =T
amb +PRth(vj-a), where Rth(vj-a) is a
fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient
temperature (Tamb).
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
Symbol Parameter Conditions Min Max Unit
Vxvolta ge on pin x on pins CAN H , CANL 42 +42 V
on pin VCC 0.3 +7 V
on any other pin 0.3 VCC + 0.3 V
Vtrt transient voltage on pins CANH, CANL [1]
pulse 1 100 - V
pulse 2a - 75 V
pulse 3a 150 - V
pulse 3b - 100 V
VESD electrostatic discharge voltage IEC 61000-4-2 (150 pF, 330 )[2]
on pins CANH and CANL 8+8 kV
Human Body Model (HBM); 100 pF, 1.5 k[3]
on pins CANH and CANL 8+8 kV
on any other pin 4+4 kV
Machine Model (MM); 200 pF, 0.75 H, 10 [4]
on any pin 200 +200 V
Charged Device Model (CDM); field Induced
charge; 4 pF [5]
on corner pins 750 +750 V
on any other pin 500 +500 V
Tvj virtual junction temperature [6] 40 +150 C
Tstg storage temperature 55 +150 C
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Product data sheet Rev. 4 — 10 July 2015 8 of 21
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High-speed CAN transceiver
9. Thermal characteristics
[1] According to JEDEC JESD51 -2, JESD51-3 and JESD51-5 at natural convection on 1s board with thermal via array under the exposed
pad connected to the second copper layer.
[2] According to JEDEC JESD51 -2, JESD51-5 and JESD51-7 at natural convection on 2s2p board. Board with two inner copper layers
(thickness: 35 m) and thermal via array under the exposed pad connected to the first inner copper layer.
10. Static characteristics
Table 6. Thermal characteristics
According to IEC 60747-1.
Symbol Parameter Conditions Value Unit
Rth(vj-a) thermal resistance from virtual junction
to ambient SO8 package; in free air 97 K/W
HVSON8 package; in free air
dual-layer board [1] 91 K/W
four-layer board [2] 52 K/W
Table 7. Static characteristics
Tvj =
40
C to +150
C; VCC = 4.75 V to 5.25 V; RL=60
; CL = 100 pF unless specified otherwise; All voltages are defined
with respect to ground. Positive currents flow into the IC.[1]
Symbol Parameter Conditions Min Typ Max Unit
Supply; pin VCC
VCC supply voltage 4.75 - 5.25 V
Vuvd(VCC) undervoltage detection
voltage on pin VCC
3.5 4 4.3 V
ICC supply current Silent mode; VTXD =V
CC 0.1 - 1.2 mA
Normal mode
recessive; VTXD =V
CC 2510 mA
dominant; VTXD =0V 20 45 70 mA
Silent mode control input; pin S
VIH HIGH-level input voltage 2 - VCC + 0.3 V
VIL LOW-level input voltage 0.3 - 0.8 V
IIH HIGH-level input current VS=V
CC 1- +1 A
IIL LOW-level input current VS=0V 15 - 1A
CAN transmit data input; pin TXD
VIH HIGH-level input voltage 2 - VCC + 0.3 V
VIL LOW-level input voltage 0.3 - 0.8 V
IIH HIGH-level input current VTXD =V
CC 5- +5 A
IIL LOW-level input current VTXD =0V 260 150 70 A
Ciinput capacitance [2] - 5 10 pF
CAN receive data output; pin RXD
IOH HIGH-level output current VRXD =V
CC 0.4 V 831mA
IOL LOW-level output current VRXD = 0.4 V; bus dominant 1 - 12 mA
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Product data sheet Rev. 4 — 10 July 2015 9 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
[1] Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range.
[2] Guaranteed by design.
[3] Vcm(CAN) is the common mode voltage of CANH and CANL.
Bus lines; pins CANH and CANL
VO(dom) dominant output voltage VTXD =0V; t<t
to(dom)TXD
pin CANH 2.75 3.5 4.5 V
pin CANL 0.5 1.5 2.25 V
Vdom(TX)sym transmitter dominant voltage
symmetry Vdom(TX)sym = VCC VCANH VCANL 400 - +400 mV
VO(dif)bus bus differential output
voltage VTXD =0V; t<t
to(dom)TXD
RL=50to 65
1.5 - 3 V
VTXD =0V; t<t
to(dom)TXD
RL=45to 65
1.4 - 3 V
VTXD =V
CC recessive; no load 50 - +50 mV
VO(rec) recessive output voltage VTXD =V
CC; no load 2 0.5VCC 3V
Vth(RX)dif differential receiver
threshol d vol tage Vcm(CAN) =12 V to +12 V;
Normal/Silent mode [3] 0.5 - 0.9 V
Vhys(RX)dif differential receiver
hysteresis vol tage Vcm(CAN) =12 V to +12 V
Normal mode 50 - 300 mV
IO(dom) dominant output current VTXD =0V; t<t
to(dom)TXD; VCC =5 V
pin CANH; VCANH =0V 100 70 40 mA
pin CANL; VCANL = 5 V / 40 V 40 70 100 mA
IO(rec) recessive output current Normal mode; VTXD =V
CC
VCANH =V
CANL = 27 V to +32 V 5- +5 mA
ILleakage current VCC =0V; V
CANH =V
CANL =5V 5- +5 A
Riinput resistance 9 15 28 k
Riinput resistance deviation between VCANH and VCANL 3- +3 %
Ri(dif) differential input resistance 19 30 52 k
Ci(cm) common-mode input
capacitance [2] - - 20 pF
Ci(dif) differential input capacitance [2] - - 10 pF
Temperature de te ction
Tj(sd) shutdown junction
temperature [2] - 185 - C
Table 7. Static characteristics …continued
Tvj =
40
C to +150
C; VCC = 4.75 V to 5.25 V; RL=60
; CL = 100 pF unless specified otherwise; All voltages are defined
with respect to ground. Positive currents flow into the IC.[1]
Symbol Parameter Conditions Min Typ Max Unit
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High-speed CAN transceiver
11. Dynamic characteristics
[1] Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range.
[2] See Figure 4.
Table 8. Dynamic character istics
Tvj =
40
C to +150
C; VCC = 4.75 V to 5.25 V; RL=60
; CL = 100 pF unless specified otherwise. All voltages are defined
with respect to ground.[1]
Symbol Parameter Conditions Min Typ Max Unit
Transceiver timing; pins CANH, CANL, TXD and RXD; see Figure 6 and Figure 3
td(TXD-busdom) delay time from TXD to bus dominant Normal mode - 65 - ns
td(TXD-busrec) delay time from TXD to bus recessive Normal mode - 90 - ns
td(busdom-RXD) delay time from bus dominan t to RX D Normal mode - 60 - ns
td(busrec-RXD) delay time from bus recessive to RXD Normal mode - 65 - ns
td(TXDL-RXDL) delay time from TXD LOW to RXD LOW TJA1057T; Normal mode 50 - 230 ns
TJA1057GT/TJA1057GTK;
Normal mode 50 - 210 ns
td(TXDH-RXDH) delay time from TXD HIGH to RXD HIGH TJA1057T; Normal mode 50 - 230 ns
TJA1057GT/TJA1057GTK;
Normal mode 50 - 210 ns
tbit(RXD) bit time on pin RXD TJA1057GT/TJA1057GTK only;
tbit(TXD) = 500 ns [2] 400 - 550 ns
TJA1057GT/TJA1057GTK only;
tbit(TXD) = 200 ns [2] 120 - 220 ns
tto(dom)TXD TXD dominant time-out time VTXD = 0 V; Normal mode 0.8 3 6.5 ms
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Product data sheet Rev. 4 — 10 July 2015 11 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
Fig 3. CAN transceiver timing diagram
Fig 4. Loop delay symmetry timing diagram (TJA1057GT/TJA1057GTK only)
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TJA1057 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 10 July 2015 12 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
12. Application information
12.1 Application diagram
12.2 Application hints
Further information on the application of the TJA1057 can be found in NXP application
hints AH1308 Application Hints - Sta ndalone high speed CAN transceiver Mantis-GT
TJA1044G/TJA1057G.
13. Test information
13.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q100 Rev-G - Failure mechanism based stress test qualification for
integrated circuits, and is suitable for use in automotive app licat ion s.
(1) Optional, depends on regulator.
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TJA1057 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 10 July 2015 13 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
14. Package outline
Fig 7. Package outline SOT96-1 (SO8)
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TJA1057 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 10 July 2015 14 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
Fig 8. Package outline SOT782-1 (HVSON8)
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Product data sheet Rev. 4 — 10 July 2015 15 of 21
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High-speed CAN transceiver
15. Handling information
All input and output pins are protected against ElectroStatic Discharge (ESD) under
normal handling. When handling ensure that the appropriate pre ca u tio ns ar e taken as
described in JESD625-A or equivalent standards.
16. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
16.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on on e printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
16.2 Wave and reflow soldering
W ave soldering is a joining te chnology in which the joints are m ade by solder coming from
a standing wave of liquid solder. The wave soldering pro cess is suitable for th e following:
•Through-hole components
•Leaded or leadless SMDs, which are glued to the surface of the printed circuit bo ard
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solde r lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads ha ving a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•Board specifications, including the board finish, solder masks and vias
•Package footprints, including solder thieves and orientation
•The moisture sensitivity level of the packages
•Package placement
•Inspection and repair
•Lead-free soldering ve rsus SnPb soldering
16.3 Wave soldering
Key characteristics in wave soldering are:
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Product data sheet Rev. 4 — 10 July 2015 16 of 21
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High-speed CAN transceiver
•Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
•Solder bath specifications, including temperature and impurities
16.4 Reflow soldering
Key characteristics in reflow soldering are :
•Lead-free ve rsus SnPb soldering; note th at a lead-free reflow process usua lly leads to
higher minimum peak temperatures (see Figure 9) than a SnPb process, thus
reducing the process window
•Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
•Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) an d cooling down. It is imperative that the peak
temperature is high enoug h for the solder to make reliable solder joint s (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on p ackage thickness and volume and is classified in accordance with
Table 9 and 10
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 9.
Table 9. SnPb eutectic process (from J-STD-020D)
Package thickness (mm) Package reflow temperature (C)
Volume (mm3)
< 350 350
< 2.5 235 220
2.5 220 22 0
Table 10. Lead-free process (from J-STD-020D)
Package thickness (mm) Package reflow temperature (C)
Volume (mm3)
< 350 350 to 2000 > 2000
< 1.6 260 260 260
1.6 to 2.5 260 250 245
> 2.5 250 245 245
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Product data sheet Rev. 4 — 10 July 2015 17 of 21
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High-speed CAN transceiver
For further informa tion on temperature profiles, re fer to Application Note AN10365
“Surface mount reflow soldering description”.
MSL: Moisture Sensitivity Level
Fig 9. Temperature profiles for large and small components
001aac844
temperature
time
minimum peak temperature
= minimum soldering temperature
maximum peak temperature
= MSL limit, damage level
peak
temperature
TJA1057 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 10 July 2015 18 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
17. Revision history
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
TJA1057 v.4 20150710 Product data sheet - TJA1057 v.3
Modifications: •TJA1057GTK variant in HVSON8 package added:
–Section 1, Section 2.4: reference to TJA1057GTK added
–Section 2.1: feature added
–Table 2: ordering information updated
–Figure 2: leadless HVSON package pinning added
–Table 3: Table note 1 added
–Table 8: tPD(TXD-RXD) and tbit(RXD) parameter values specified for TJA1057GTK variant
–Figure 4: figure title updated to include TJA1057GTK variant
–Section 12.2, Figure 8: added
•Table 1/Table 7: value chang ed for parameter ICC (Silent mode)
•Figure 1/Figure 3/Figure 6: typos corrected; references to VIO removed/replaced with V CC
•Section 7.2.3: text added for clarification
•Section 9 “Thermal characteristics”: values for leadless TK variant added
•Table 8: parameter tPD(TXD-RXD) replaced by parameters td(TXDL-RXDL) and td(TXDL-RXDL); Figure 3
updated accordingly
•Figure 5: capacitors added on battery supply line and on VCC pin
•Figure 6: moved
TJA1057 v.3 20141119 Product data sheet - TJA1057 v.2
TJA1057 v.2 20131030 Product data sheet - TJA1057 v.1
TJA1057 v.1 20130530 Preliminary data sheet - -
TJA1057 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 10 July 2015 19 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
18. Legal information
18.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semicond uctors sales
office. In case of any inconsistency or conflict with the short data sheet, th e
full data sheet shall pre va il.
Product specificatio n — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
18.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warrant ies, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Se miconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability t owards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, lif e-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconducto rs products in such equipment or
applications and t her efo re su ch inclu si on a nd/or use is at the cu stome r's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for t he customer’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Custo mers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party custo mer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
TJA1057 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 10 July 2015 20 of 21
NXP Semiconductors TJA1057
High-speed CAN transceiver
No offer to sell or license — Nothing in this document may be interpret ed or
construed as an of fer to se ll product s that is op en for accept ance or the grant ,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
18.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
Mantis — is a trademark of NXP Semiconductors N.V.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors TJA1057
High-speed CAN transceiver
© NXP Semiconductors N.V. 2015. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 10 July 2015
Document identifier: TJA1057
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
20. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
2.1 General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.2 Predictable and fail-safe behavior . . . . . . . . . . 1
2.3 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2.4 TJA1057GT/TJA1057GTK . . . . . . . . . . . . . . . . 2
3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 5
7.1 Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5
7.1.1 Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 5
7.1.2 Silent mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
7.2 Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 5
7.2.1 TXD dominant time-out function. . . . . . . . . . . . 5
7.2.2 Internal biasing of TXD and S input pins . . . . . 5
7.2.3 Undervoltage detection on pins VCC. . . . . . . . . 6
7.2.4 Overtemperature protection . . . . . . . . . . . . . . . 6
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7
9 Thermal characteristics . . . . . . . . . . . . . . . . . . 8
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 8
11 Dynamic characteristics . . . . . . . . . . . . . . . . . 10
12 Application information. . . . . . . . . . . . . . . . . . 12
12.1 Application diagram . . . . . . . . . . . . . . . . . . . . 12
12.2 Application hints . . . . . . . . . . . . . . . . . . . . . . . 12
13 Test information. . . . . . . . . . . . . . . . . . . . . . . . 12
13.1 Quality information . . . . . . . . . . . . . . . . . . . . . 12
14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
15 Handling information. . . . . . . . . . . . . . . . . . . . 15
16 Soldering of SMD packages . . . . . . . . . . . . . . 15
16.1 Introduction to soldering. . . . . . . . . . . . . . . . . 15
16.2 Wave and reflow soldering . . . . . . . . . . . . . . . 15
16.3 Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 15
16.4 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 16
17 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 18
18 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19
18.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19
18.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
18.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
18.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
19 Contact information. . . . . . . . . . . . . . . . . . . . . 20
20 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
