1White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
HI-RELIABILITY PRODUCT
FEATURES
■Access Times of 60, 70, 90, 120, 150ns
■Packaging
• 66 pin, PGA Type, 1.075" square, Hermetic
Ceramic HIP (Package 400(1))
• 68 lead, 40mm, Low Capacitance Hermetic CQFP
(Package 501)
• 68 lead, 40mm, Low Profile 3.5mm (0.140"), CQFP
(Package 502)
• 68 lead, 22.4mm (0.880") Low Profile CQFP (G2U), 3.5mm
(0.140") high, (Package 510)
• 68 lead, 23.9mm (0.940") Low Profile CQFP (G1U), 3.5mm
(0.140") high, (Package 519)
■100,000 Erase/Program Cycles Minimum
■Sector Architecture
• 8 equal size sectors of 64KBytes each
• Any combination of sectors can be concurrently erased.
Also supports full chip erase
■Organized as 512Kx32
■Commercial, Industrial and Military Temperature Ranges
■5 Volt Programming. 5V ± 10% Supply.
■Low Power CMOS, 6.5mA Standby
■Embedded Erase and Program Algorithms
■TTL Compatible Inputs and CMOS Outputs
■Built-in Decoupling Caps for Low Noise Operation
■Page Program Operation and Internal Program Control Time
■Weight
WF512K32-XG2UX5 - 8 grams typical
WF512K32-XH1X5 - 13 grams typical
WF512K32-XG4X5 - 20 grams typical
WF512K32-XG4TX5 - 20 grams typical
WF512K32-XG1UX5 - 5 grams typical
1. Call factory for PGA type (HIP) package options.
Note: See Flash Programming Application Note 4M5 for algorithms.
WF512K32-XXX5
PIN DESCRIPTION
I/O0-31 Data Inputs/Outputs
A0-18 Address Inputs
WE1-4 Write Enables
CS1-4 Chip Selects
OE Output Enable
VCC Power Supply
GND Ground
NC Not Connected
I/O
8
I/O
9
I/O
10
A
14
A
16
A
11
A
0
A
18
I/O
0
I/O
1
I/O
2
WE
2
CS
2
GND
I/O
11
A
10
A
9
A
15
V
CC
CS
1
NC
I/O
3
I/O
15
I/O
14
I/O
13
I/O
12
OE
A
17
WE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
7
A
12
NC
A
13
A
8
I/O
16
I/O
17
I/O
18
V
CC
CS
4
WE
4
I/O
27
A
4
A
5
A
6
WE
3
CS
3
GND
I/O
19
I/O
31
I/O
30
I/O
29
I/O
28
A
1
A
2
A
3
I/O
23
I/O
22
I/O
21
I/O
20
11 22 33 44 55 66
1 12 23 34 45 56
TOP VIEW
BLOCK DIAGRAM
512K x 8
8
I/O
0-7
WE
CS
11
512K x 8
8
I/O
8-15
WE
CS
22
512K x 8
8
I/O
16-23
WE
CS
33
512K x 8
8
I/O
24-31
WE
CS
44
A
0
-
18
OE
FIG. 1 PIN CONFIGURATION FOR WF512K32N-XH1X5
512Kx32 5V FLASH MODULE, SMD 5962-94612
April 2001 Rev. 4
2
White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
WF512K32-XXX5
PIN DESCRIPTION
FIG. 2 PIN CONFIGURATION FOR WF512K32F-XG4X5 (Low Capacitance)
AND WF512K32-XG4TX5
I/O0-31 Data Inputs/Outputs
A0-18 Address Inputs
WE Write Enable
CS1-4 Chip Selects
OE Output Enable
VCC Power Supply
GND Ground
NC Not Connected
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
V
CC
A
11
A
12
A
13
A
14
A
15
A
16
CS
2
OE
CS
4
A
17
A
18
NC
NC
NC
NC
NC
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS
1
GND
CS
3
WE
A
6
A
7
A
8
A
9
A
10
V
CC
512K x 8
8
I/O
0-7
CS
1
512K x 8
8
I/O
8-15
CS
2
512K x 8
8
I/O
16-23
CS
3
512K x 8
8
I/O
24-31
CS
4
A
0-18
OE
WE
BLOCK DIAGRAM
TOP VIEW
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
V
CC
A
11
A
12
A
13
A
14
A
15
A
16
CS
1
OE
CS
2
A
17
WE
2
WE
3
WE
4
A
18
NC
NC
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS
3
GND
CS
4
WE
1
A
6
A
7
A
8
A
9
A
10
V
CC
FIG. 3 PIN CONFIGURATION FOR WF512K32-XG2UX5 AND WF512K32-XG1UX5
PIN DESCRIPTION
TOP VIEW
I/O0-31 Data Inputs/Outputs
A0-18 Address Inputs
WE1-4 Write Enables
CS1-4 Chip Selects
OE Output Enable
VCC Power Supply
GND Ground
512K x 8
8
I/O
0-7
CS
1
512K x 8
8
I/O
8-15
CS
2
512K x 8
8
I/O
16-23
CS
3
512K x 8
8
I/O
24-31
CS
4
A
0-18
OE
WE
3
WE
2
WE
1
WE
4
BLOCK DIAGRAM
3White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
Parameter Symbol Conditions Min Max Unit
Input Leakage Current ILI VCC = 5.5, VIN = GND or VCC 10 µA
Output Leakage Current ILOx32 VCC = 5.5, VIN = GND or VCC 10 µA
VCC Active Current for Read (1) ICC1 CS = VIL, OE = VIH, f = 5MHz 190 mA
VCC Active Current for Program or Erase (2) ICC2 CS = VIL, OE = VIH 240 mA
VCC Standby Current ICC4 VCC = 5.5, CS = VIH, f = 5MHz 6.5 mA
VCC Static Current ICC3 VCC = 5.5, CS = VIH 0.6 mA
Output Low Voltage VOLIOL = 8.0 mA, VCC = 4.5 0.45 V
Output High Voltage VOH1 IOH = 2.5 mA, VCC = 4.5 0.85 X VCC V
Low VCC Lock-Out Voltage VLKO 3.2 4.2 V
WF512K32-XXX5
ABSOLUTE MAXIMUM RATINGS (1)
NOTES:
1. Stresses above the absolute maximum rating may cause permanent damage
to the device. Extended operation at the maximum levels may degrade
performance and affect reliability.
2. Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions,
inputs may overshoot VSS to -2.0 V for periods of up to 20ns. Maximum DC
voltage on output and I/O pins is VCC + 0.5V. During voltage transitions,
outputs may overshoot to Vcc + 2.0 V for periods of up to 20ns.
3. Minimum DC input voltage on A9 pin is -0.5V. During voltage transitions, A9
may overshoot Vss to -2V for periods of up to 20ns. Maximum DC input
voltage on A9 is +13.5V which may overshoot to 14.0 V for periods
up to 20ns.
DC CHARACTERISTICS - CMOS COMPATIBLE
(VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C)
Parameter Unit
Operating Temperature -55 to +125 °C
Supply Voltage Range (VCC) -2.0 to +7.0 V
Signal voltage range (any pin except A9) (2) -2.0 to +7.0 V
Storage Temperature Range -65 to +150 °C
Lead Temperature (soldering, 10 seconds) +300 °C
Data Retention (Mil Temp) 20 years
Endurance - write/erase cycles (Mil Temp) 100,000 cycles min.
A9 Voltage for sector protect (VID) (3) -2.0 to +14.0 V
DC test conditions: VIL = 0.3V, VIH = VCC - 0.3V
NOTES:
1. The ICC current listed includes both the DC operating current and the frequency dependent component (at 5 MHz). The frequency component typically
is less than 2 mA/MHz, with OE at VIH.
2. ICC active while Embedded Algorithm (program or erase) is in progress.
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Min Max Unit
Supply Voltage VCC 4.5 5.5 V
Input High Voltage VIH 2.0 VCC + 0.5 V
Input Low Voltage VIL -0.5 +0.8 V
Operating Temp. (Mil.) TA-55 +125 °C
Operating Temp. (Ind.) TA-40 +85 °C
A9 Voltage for Sector Protect VID 11.5 12.5 V
LOW CAPACITANCE CQFP
(TA = +25°C)
Parameter
Symbol
Conditions Max Unit
OE capacitance COE VIN = 0 V, f = 1.0 MHz 32 pF
CQFP G4 capacitance CWE VIN = 0 V, f = 1.0 MHz 32 pF
CS1-4 capacitance CCS VIN = 0 V, f = 1.0 MHz 15 pF
Data I/O capacitance CI/O VI/O = 0 V, f = 1.0 MHz 15 pF
Address input
capacitance CAD VIN = 0 V, f = 1.0 MHz 32 pF
This parameter is guaranteed by design but not tested.
CAPACITANCE
(TA = +25°C)
Parameter
Symbol
Conditions Max Unit
OE capacitance COE
V
IN
= 0 V, f = 1.0 MHz
50 pF
WE1-4 capacitance CWE
V
IN
= 0 V, f = 1.0 MHz
pF
HIP (PGA) 20
CQFP G4T 50
CQFP G2U/G1U 15
CS1-4 capacitance CCS
V
IN
= 0 V, f = 1.0 MHz
20 pF
Data I/O capacitance CI/O
V
I/O
= 0 V, f = 1.0 MHz
20 pF
Address input capacitance CAD
V
IN
= 0 V, f = 1.0 MHz
50 pF
This parameter is guaranteed by design but not tested.
4
White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
WF512K32-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,CS CONTROLLED
(VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C)
FIG. 4
AC TEST CIRCUIT AC TEST CONDITIONS
NOTES:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
Parameter Typ Unit
Input Pulse Levels
VIL = 0, VIH = 3.0
V
Input Rise and Fall 5 ns
Input and Output Reference Level 1.5 V
Output Timing Reference Level 1.5 V
I
Current Source
D.U.T.
C = 50 pf
eff
I
OL
V
≈
1.5V
(Bipolar Supply)
Z
Current Source
OH
Parameter Symbol -60 -70 -90 -120 -150 Unit
Min Max Min Max Min Max Min Max Min Max
Write Cycle Time tAVAV tWC 60 70 90 120 150 ns
Write Enable Setup Time tWLEL tWS 00000ns
Chip Select Pulse Width tELEH tCP 40 45 45 50 50 ns
Address Setup Time tAVEL tAS 00000ns
Data Setup Time tDVEH tDS 40 45 45 50 50 ns
Data Hold Time tEHDX tDH 00000ns
Address Hold Time tELAX tAH 40 45 45 50 50 ns
Chip Select Pulse Width High tEHEL tCPH 20 20 20 20 20 ns
Duration of Byte Programming Operation (1) tWHWH1 300 300 300 300 300 µs
Sector Erase Time (2) tWHWH2 15 15 15 15 15 sec
Read Recovery Time tGHEL 00000ns
Chip Programming Time 11 11 11 11 11 sec
Chip Erase Time (3) 64 64 64 64 64 sec
NOTES:
1. Typical value for tWHWH1 is 7µs.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 8sec.
5White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, WE CONTROLLED
(VCC = 5.0V, TA = -55°C to +125°C)
WF512K32-XXX5
WF512K32-XXX5
WF512K32-XXX5
AC CHARACTERISTICS – READ ONLY OPERATIONS
(VCC = 5.0V, TA = -55°C to +125°C)
Parameter Symbol -60 -70 -90 -120 -150 Unit
Min Max Min Max Min Max Min Max Min Max
Read Cycle Time tAVAV tRC 60 70 90 120 150 ns
Address Access Time tAVQV tACC 60 70 90 120 150 ns
Chip Select Access Time tELQV tCE 60 70 90 120 150 ns
Output Enable to Output Valid tGLQV tOE 30 35 35 50 55 ns
Chip Select to Output High Z (1) tEHQZ tDF 20 20 20 30 35 ns
Output Enable High to Output High Z (1) tGHQZ tDF 20 20 20 30 35 ns
Output Hold from Address, CS or OE Change, tAXQX tOH 000 00ns
whichever is First
1. Guaranteed by design, but not tested
Parameter Symbol -60 -70 -90 -120 -150 Unit
Min Max Min Max Min Max Min Max Min Max
Write Cycle Time tAVAV tWC 60 70 90 120 150 ns
Chip Select Setup Time tELWL tCS 00000ns
Write Enable Pulse Width tWLWH tWP 40 45 45 50 50 ns
Address Setup Time tAVWH tAS 00000ns
Data Setup Time tDVWH tDS 40 45 45 50 50 ns
Data Hold Time tWHDX tDH 00000ns
Address Hold Time tWHAX tAH 40 45 45 50 50 ns
Write Enable Pulse Width High tWHWL tWPH 20 20 20 20 20 ns
Duration of Byte Programming Operation (1) tWHWH1 300 300 300 300 300 µs
Sector Erase Time (2) tWHWH2 15 15 15 15 15 sec
Read Recovery Time before Write tGHWL 00000ns
VCC Set-up Time tVCS 50 50 50 50 50 µs
Chip Programming Time 11 11 11 11 11 sec
Output Enable Setup Time tOES 00000ns
Output Enable Hold Time (4) tOEH 10 10 10 10 10 ns
Chip Erase Time (3) 64 64 64 64 64 sec
NOTES:
1. Typical value for tWHWH1 is 7µs.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 8sec.
4. For Toggle and Data Polling.
6
White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
FIG. 5
AC WAVEFORMS FOR READ OPERATIONS
Addresses
CS
OE
WE
Outputs High Z
Addresses Stable
t
OE
t
RC
Output Valid
t
CE
t
ACC
t
OH
High Z
t
DF
WF512K32-XXX5
7White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
NOTES:
1. PA is the address of the memory location to be programmed.
2. PD is the data to be programmed at byte address.
3. D7 is the output of the complement of the data written to the device (for each chip).
4. DOUT is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
FIG. 6
WRITE/ERASE/PROGRAM
OPERATION, WE CONTROLLED
Addresses
CS
OE
WE
Data
5.0 V
5555H PA PA
tWC
tCS
PD D7DOUT
tAH
tWPH
tDH
tDS
Data Polling
tAS tRC
tWP
A0H
tOE tDF
tOH
tCE
tGHWL
tWHWH1
WF512K32-XXX5
8
White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
FIG. 7
AC WAVEFORMS CHIP/SECTOR
ERASE OPERATIONS
NOTE:
1. SA is the sector address for Sector Erase.
Addresses
CS
OE
WE
Data
V
CC
5555H 2AAAH 2AAAH SA5555H 5555H
t
WP
t
CS
t
VCS
10H/30H55H80H55H AAHAAH
t
AH
t
AS
t
GHWL
t
WPH
t
DH
t
DS
WF512K32-XXX5
9White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
CS
OE
WE
t
OE
t
CE
t
CH
t
OH
D7 D7 =
Valid Data High Z
D0-D6 = Invalid D0-D7
Valid Data
t
DF
D7
D0-D6
t
OEH
t
WHWH 1 or 2
t
OE
Data
FIG. 8
AC WAVEFORMS FOR DATA POLLING
DURING EMBEDDED ALGORITHM OPERATIONS
WF512K32-XXX5
10
White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
Addresses
WE
OE
CS
Data
5.0 V
5555H PA PA
t
WC
t
WS
PD D
7
D
OUT
t
AH
t
CPH
t
CP
t
DH
t
DS
Data Polling
t
AS
t
GHEL
A0H
t
WHWH1
FIG. 9
ALTERNATE CS CONTROLLED
PROGRAMMING OPERATION TIMINGS
NOTES:
1. PA represents the address of the memory location to be programmed.
2. PD represents the data to be programmed at byte address.
3. D7 is the output of the complement of the data written to the device (for each chip).
4. DOUT is the output of the data written to the device.
5. Figure indicates the last two bus cycles of a four bus cycle sequence.
WF512K32-XXX5
11 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
27.3 (1.075) ± 0.25 (0.010) SQ
PIN 1 IDENTIFIER
SQUARE PAD
ON BOTTOM
25.4 (1.0) TYP
15.24 (0.600) TYP
0.76 (0.030) ± 0.13 (0.005)
4.34 (0.171)
MAX
3.81 (0.150)
± 0.13 (0.005)
2.54 (0.100)
TYP
25.4 (1.0) TYP
1.42 (0.056) ± 0.13 (0.005)
1.27 (0.050) TYP DIA
0.46 (0.018) ± 0.05 (0.002) DIA
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
WF512K32-XXX5
12
White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
PACKAGE 510: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)
0.38 (0.015) ± 0.05 (0.002)
0.25 (0.010) ± 0.10 (0.002)
25.15 (0.990) ± 0.25 (0.010) SQ
1.27 (0.050) TYP
24.0 (0.946)
± 0.25 (0.010)
22.36 (0.880) ± 0.25 (0.010) SQ
20.3 (0.800) REF
23.87
(0.940) REF
1.01 (0.040)
± 0.13 (0.005)
0.25 (0.010) REF
1° / 7°
R 0.25
(0.010)
DETAIL A
SEE DETAIL "A"
Pin 1
0.53 (0.021)
± 0.18 (0.007)
3.51 (0.140) MAX
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
0.940"
TYP
The White 68 lead G2U CQFP
fills the same fit and function as
the JEDEC 68 lead CQFJ or 68
PLCC. But the G2U has the TCE
and lead inspection advantage
of the CQFP form.
WF512K32-XXX5
PACKAGE 519: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G1U)
0.38 (0.015) ± 0.05 (0.002)
0.25 (0.010)
25.27 (0.995) ± 0.13 (0.005) SQ
1.27 (0.050)
23.88 (0.940) ± 0.25 (0.010) SQ
20.3 (0.800) REF
0.84 (0.033) REF
DETAIL A
SEE DETAIL "A"
3.56 (0.140) MAX
0.61 (0.024)
± 0.15 (0.006)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
13 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
PACKAGE 501: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G4)
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
0.38 (0.015)
± 0.08 (0.003)
68 PLACES
1.27 (0.050)
TYP
5.1 (0.200) MAX
39.6 (1.56) ± 0.38 (0.015) SQ
38 (1.50) TYP
4 PLACES
5.1 (0.200)
± 0.25 (0.010)
4 PLACES
12.7 (0.500)
± 0.5 (0.020)
4 PLACES
0.25 (0.010)
± 0.05 (0.002)
1.27 (0.050)
± 0.1 (0.005)
PIN 1 IDENTIFIER
Pin 1
PACKAGE 502: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G4T)
38 (1.50) TYP
4 PLACES
0.38 (0.015)
± 0.08 (0.003)
68 PLACES
1.27 (0.050)
TYP
5.1 (0.200)
± 0.25 (0.010)
4 PLACES
12.7 (0.500)
± 0.5 (0.020)
4 PLACES
0.25 (0.010)
± 0.05 (0.002)
PIN 1 IDENTIFIER Pin 1
39.6 (1.56) ± 0.38 (0.015) SQ 3.56 (0.140) MAX
WF512K32-XXX5
14
White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
ORDERING INFORMATION
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
VPP PROGRAMMING VOLTAGE
5 = 5 V
DEVICE GRADE:
M= Military Screened -55°C to +125°C
I = Industrial -40°C to +85°C
C = Commercial 0°C to +70°C
PACKAGE TYPE:
H1 = 1.075" sq. Ceramic Hex In Line Package, HIP (Package 400*)
G2U = 22.4mm Low Profile CQFP (Package 510)
G1U = 23.9mm Low Profile CQFP (Package 519)
G4 = 40mm Low Capacitance, CQFP (Package 501)
G4T = 40mm Low Profile CQFP (Package 502)
ACCESS TIME (ns)
IMPROVEMENT MARK
N = No Connect at pins 21 and 39 in HIP for Upgrade (H1 only)*
F = Low Capacitance Device (G4 only)
ORGANIZATION, 512K x 32
User configurable as 1M x 16 or 2M x 8
Flash
WHITE ELECTRONIC DESIGNS CORP.
W F 512K32 X - XXX X X 5 X
* Call factory for PGA type (HIP) package options.
WF512K32-XXX5
15 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
DEVICE TYPE SPEED PACKAGE SMD NO.
512K x 32 Flash Module 150ns 66 pin HIP (H1) 1.075" sq. 5962-94612 01HUX
512K x 32 Flash Module 120ns 66 pin HIP (H1) 1.075" sq. 5962-94612 02HUX
512K x 32 Flash Module 90ns 66 pin HIP (H1) 1.075" sq. 5962-94612 03HUX
512K x 32 Flash Module 70ns 66 pin HIP (H1) 1.075" sq. 5962-94612 04HUX
512K x 32 Flash Module 150ns 68 lead CQFP Low Profile (G4T) 5962-94612 01HTX
512K x 32 Flash Module 120ns 68 lead CQFP Low Profile (G4T) 5962-94612 02HTX
512K x 32 Flash Module 90ns 68 lead CQFP Low Profile (G4T) 5962-94612 03HTX
512K x 32 Flash Module 70ns 68 lead CQFP Low Profile (G4T) 5962-94612 04HTX
512K x 32 Flash Module 150ns 68 lead Low Capacitance 5962-94612 01HNX
CQFP (G4)
512K x 32 Flash Module 120ns 68 lead Low Capacitance 5962-94612 02HNX
CQFP (G4)
512K x 32 Flash Module 90ns 68 lead Low Capacitance 5962-94612 03HNX
CQFP (G4)
512K x 32 Flash Module 70ns 68 lead Low Capacitance 5962-94612 04HNX
CQFP (G4)
512K x 32 Flash Module 150ns 68 lead CQFP/J (G2U) 5962-94612 01HZX
512K x 32 Flash Module 120ns 68 lead CQFP/J (G2U) 5962-94612 02HZX
512K x 32 Flash Module 90ns 68 lead CQFP/J (G2U) 5962-94612 03HZX
512K x 32 Flash Module 70ns 68 lead CQFP/J (G2U) 5962-94612 04HZX
512K x 32 Flash Module 150ns 68 lead CQFP/J (G1U) 5962-94612 01H9X
512K x 32 Flash Module 120ns 68 lead CQFP/J (G2U) 5962-94612 02H9X
512K x 32 Flash Module 90ns 68 lead CQFP/J (G2U) 5962-94612 03H9X
512K x 32 Flash Module 70ns 68 lead CQFP/J (G2U) 5962-94612 04H9X
WF512K32-XXX5
