VS-10TTS08SPbF Series
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Revision: 19-Jun-13 1Document Number: 94562
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Thyristor High Voltage Surface Mount Phase Control SCR, 10 A
FEATURES
• Meets MSL level 1, per J-STD-020,
LF maximum peak of 260 °C
• Designed and qualified according
JEDEC-JESD47
• Material categorization:
For definitions of compliance please see
www.vishay.com/doc?99912
APPLICATIONS
• Input rectification (soft start)
• Vishay input diodes, switches and output rectifiers which
are available in identical package outlines
DESCRIPTION
The VS-10TTS08SPbF High Voltage Series of silicon
controlled rectifiers are specifically designed for medium
power switching and phase control applications. The glass
passivation technology used has reliable operation up to
125 °C junction temperature.
Note
•T
A = 55 °C, TJ = 125 °C, footprint 300 mm2
PRODUCT SUMMARY
Package TO-263AB (D2PAK)
Diode variation Single SCR
IT(AV) 6.5 A
VDRM/VRRM 800 V
VTM < 1.15 V
IGT 15 mA
TJ- 40 to 125 °C
3
Gate
2
Anode
1
Cathode
D
2
PAK
OUTPUT CURRENT IN TYPICAL APPLICATIONS
APPLICATIONS SINGLE-PHASE BRIDGE THREE-PHASE BRIDGE UNITS
NEMA FR-4 or G-10 glass fabric-based epoxy
with 4 oz. (140 μm) copper 2.5 3.5
A
Aluminum IMS, RthCA = 15 °C/W 6.3 9.5
Aluminum IMS with heatsink, RthCA = 5 °C/W 14.0 18.5
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER TEST CONDITIONS VALUES UNITS
IT(AV) Sinusoidal waveform 6.5
A
IRMS 10
VRRM/VDRM 800 V
ITSM 110 A
VT6.5 A, TJ = 25 °C 1.15 V
dV/dt 150 V/μs
dI/dt 100 A/μs
TJRange - 40 to 125 °C
VOLTAGE RATINGS
PART NUMBER
VRRM, MAXIMUM
PEAK REVERSE VOLTAGE
V
VDRM, MAXIMUM PEAK
DIRECT VOLTAGE
V
IRRM/IDRM
AT 125 °C
mA
VS-10TTS08SPbF 800 800 1.0
VS-10TTS08SPbF Series
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Revision: 19-Jun-13 2Document Number: 94562
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ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum average on-state current IT(AV) TC = 112 °C, 180° conduction half sine wave 6.5
A
Maximum RMS on-state current IT(RMS) 10
Maximum peak, one-cycle,
non-repetitive surge current ITSM
10 ms sine pulse, rated VRRM applied, TJ = 125 °C 95
10 ms sine pulse, no voltage reapplied, TJ = 125 °C 110
Maximum I2t for fusing I2t10 ms sine pulse, rated VRRM applied, TJ = 125 °C 45 A2s
10 ms sine pulse, no voltage reapplied, TJ = 125 °C 64
Maximum I2t for fusing I2t t = 0.1 ms to 10 ms, no voltage reapplied, TJ = 125 °C 640 A2s
Maximum on-state voltage drop VTM 6.5 A, TJ = 25 °C 1.15 V
On-state slope resistance rtTJ = 125 °C 17.3 m
Threshold voltage VT(TO) 0.85 V
Maximum reverse and direct leakage current IRM/IDM
TJ = 25 °C VR = Rated VRRM/VDRM
0.05
mA
TJ = 125 °C 1.0
Typical holding current IH
Anode supply = 6 V, resistive load, initial IT = 1 A,
TJ = 25 °C 30
Maximum latching current ILAnode supply = 6 V, resistive load, TJ = 25 °C 50
Maximum rate of rise of off-state voltage dV/dt TJ = TJ max., linear to 80 %, VDRM = Rg - k = Open V/μs
Maximum rate of rise of turned-on current dI/dt 100 A/μs
TRIGGERING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum peak gate power PGM 8.0 W
Maximum average gate power PG(AV) 2.0
Maximum peak positive gate current +IGM 1.5 A
Maximum peak negative gate voltage -VGM 10 V
Maximum required DC gate current to trigger IGT
Anode supply = 6 V, resistive load, TJ = - 65 °C 20
mAAnode supply = 6 V, resistive load, TJ = 25 °C 15
Anode supply = 6 V, resistive load, TJ = 125 °C 10
Maximum required DC gate
voltage to trigger VGT
Anode supply = 6 V, resistive load, TJ = - 65 °C 1.2
V
Anode supply = 6 V, resistive load, TJ = 25 °C 1
Anode supply = 6 V, resistive load, TJ = 125 °C 0.7
Maximum DC gate voltage not to trigger VGD TJ = 125 °C, VDRM = Rated value 0.2
Maximum DC gate current not to trigger IGD 0.1 mA
SWITCHING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Typical turn-on time tgt TJ = 25 °C 0.8
μsTypical reverse recovery time trr TJ = 125 °C 3
Typical turn-off time tq100
VS-10TTS08SPbF Series
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Revision: 19-Jun-13 3Document Number: 94562
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Note
(1) When mounted on 1" square (650 mm2) PCB of FR-4 or G-10 material 4 oz. (140 μm) copper 40 °C/W
For recommended footprint and soldering techniques refer to application note #AN-994
Fig. 1 - Current Rating Characteristics
Fig. 2 - Current Rating Characteristics
Fig. 3 - On-State Power Loss Characteristics
Fig. 4 - On-State Power Loss Characteristics
THERMAL - MECHANICAL SPECIFICATIONS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum junction and storage
temperature range TJ, TStg - 40 to 125 °C
Soldering temperature TSFor 10 s (1.6 mm from case) 260
Maximum thermal resistance,
junction to case RthJC DC operation 1.5
°C/W
Typical thermal resistance,
junction to ambient (PCB mount) RthJA (1) 40
Approximate weight 2g
0.07 oz.
Marking device Case style D2PAK (SMD-220) 10TTS08S
105
110
115
120
125
01234567
30°
60°
90°
120°
180°
Maximum Allowable Case Temperature (°C)
Cond uct ion Angle
Average On-state Current (A)
10TTS08
R (DC) = 1.5 K/W
thJC
105
110
115
120
125
024681012
DC
30°
60°
90°
120°
180°
Average On-state Current (A)
Maximum Allowable Case Temperature (°C)
Conduction Period
10TTS08
R (DC) = 1.5 K/W
thJC
0
1
2
3
4
5
6
7
8
01234567
RMS Limit
Conduction Angle
Maximum Average On-state Power Loss (W)
Average On-state Current (A)
180°
120°
90°
60°
30°
10TTS08
T = 125°C
J
0
2
4
6
8
10
12
024681012
DC
180°
120°
90°
60°
30°
RMS Limit
Conduction Period
Maximum Average On-state Power Loss (W)
Averag e On -state Current (A)
10TTS08
T = 125°C
J
VS-10TTS08SPbF Series
www.vishay.com Vishay Semiconductors
Revision: 19-Jun-13 4Document Number: 94562
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Fig. 5 - Maximum Non-Repetitive Surge Current Fig. 6 - Maximum Non-Repetitive Surge Current
Fig. 7 - On-State Voltage Drop Characteristics
Fig. 8 - Thermal Impedance ZthJC Characteristics
Number of Equal Amplitude Half Cycle
Current Pulses (N)
Peak Half Sine Wave
Forward Current (A)
110 100
40
50
60
70
80
90
100
110
VS-10TTS08
At any rated load condition and with
rated Vrrm applied following surge.
Initial Tj = 150 °C
at 60 Hz 0.0083 s
at 50 Hz 0.0100 s
0.01 0.1 110
40
50
60
70
80
90
100
110
120
Maximum non-repetitive surge current
versus pulse train duration.
Initial Tj = Tj max.
No voltage reapplied
Rated Vrrm reapplied
VS-10TTS08
Pulse Train Duration (s)
Peak Half Sine Wave
Forward Current (A)
1
10
100
1000
0.5 1 1.5 2 2.5 3 3.5
T = 25°C
J
Instantaneous On-state Current (A)
Instantaneous On-state Voltage (V)
T = 125°C
J
10TTS08
0.01
0.1
1
10
0.000 1 0.001 0. 01 0.1 1
Square Wave Pulse Duration (s)
Steady State Value
(DC Operation)
Single Pulse
D = 0.50
D = 0.33
D = 0.25
D = 0.17
D = 0.08
thJC
Transient Thermal Impedance Z (°C/W)
10TTS08
VS-10TTS08SPbF Series
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Revision: 19-Jun-13 5Document Number: 94562
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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ORDERING INFORMATION TABLE
ORDERING INFORMATION (Example)
PREFERRED P/N QUANTITY PER T/R MINIMUM ORDER QUANTITY PACKAGING DESCRIPTION
VS-10TTS08SPbF 50 1000 Antistatic plastic tubes
VS-10TTS08STRRPbF 800 800 13" diameter reel
VS-10TTS08STRLPbF 800 800 13" diameter reel
LINKS TO RELATED DOCUMENTS
Dimensions www.vishay.com/doc?95046
Part marking information www.vishay.com/doc?95054
Packaging information www.vishay.com/doc?95032
- Tape and reel option:
1- Vishay Semiconductors product
2- Current rating, RMS value
3- Circuit configuration:
4- Package:
-PbF = Lead (Pb)-free
5
6- Voltage code x 100 = VRRM
T = Single thyristor
- Type of silicon:
T = TO-220AC
S = Converter grade
9
7- S = TO-220 D2PAK (SMD-220) version
8
TRL = Tape and reel (left oriented)
TRR = Tape and reel (right oriented)
Device code
51 32 4 6 7 8 9
VS- 10 T T S 08 S TRL PbF
Document Number: 95046 For technical questions within your region, please contact one of the following: www.vishay.com
Revision: 31-Mar-11 DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com 1
This document is subject to change without notice.
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www.vishay.com/doc?91000
D2PAK
Outline Dimensions
Vishay Semiconductors
DIMENSIONS in millimeters and inches
Notes
(1) Dimensioning and tolerancing per ASME Y14.5 M-1994
(2) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outmost extremes of the plastic body
(3) Thermal pad contour optional within dimension E, L1, D1 and E1
(4) Dimension b1 and c1 apply to base metal only
(5) Datum A and B to be determined at datum plane H
(6) Controlling dimension: inch
(7) Outline conforms to JEDEC outline TO-263AB
SYMBOL MILLIMETERS INCHES NOTES SYMBOL MILLIMETERS INCHES NOTES
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
A 4.06 4.83 0.160 0.190 D1 6.86 8.00 0.270 0.315 3
A1 0.00 0.254 0.000 0.010 E 9.65 10.67 0.380 0.420 2, 3
b 0.51 0.99 0.020 0.039 E1 7.90 8.80 0.311 0.346 3
b1 0.51 0.89 0.020 0.035 4 e 2.54 BSC 0.100 BSC
b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625
b3 1.14 1.73 0.045 0.068 4 L 1.78 2.79 0.070 0.110
c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066 3
c1 0.38 0.58 0.015 0.023 4 L2 1.27 1.78 0.050 0.070
c2 1.14 1.65 0.045 0.065 L3 0.25 BSC 0.010 BSC
D 8.51 9.65 0.335 0.380 2 L4 4.78 5.28 0.188 0.208
c
B
Detail A
c2
AA
A
± 0.004 B
M
A
Lead tip
(3)
(3)
View A - A
(E)
(D1)
E1
B
H
A1
Detail “A”
Rotated 90 °CW
Scale: 8:1
L
Gauge
plane
0° to 8°
L3
L4
Seating
plane
Section B - B and C - C
Scale: None
(4)
(4)
(b, b2)
b1, b3
(c) c1
Base
Metal
Plating
Conforms to JEDEC outline D2PAK (SMD-220)
132
D
C
A
L2
E
(2)(3)
(2)
4
H
BB
2 x b
2 x b2
L1
0.010 AB
MM
(3)
e
2 x
Pad layout
MIN.
11.00
(0.43)
MIN.
9.65
(0.38)
MIN.
3.81
(0.15)
MIN.
2.32
(0.08)
17.90 (0.70)
15.00 (0.625)
2.64 (0.103)
2.41 (0.096)
Lead assignments
Diodes
1. - Anode (two die)/open (one die)
2., 4. - Cathode
3. - Anode
Legal Disclaimer Notice
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Revision: 02-Oct-12 1Document Number: 91000
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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including but not limited to the warranty expressed therein.
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requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
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