TL/F/6368
54LS109/DM54LS109A/DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops
with Preset, Clear, and Complementary Outputs
June 1989
54LS109/DM54LS109A/DM74LS109A
Dual Positive-Edge-Triggered J-K Flip-Flops
with Preset, Clear, and Complementary Outputs
General Description
This device contains two independent positive-edge-trig-
gered J-K flip-flops with complementary outputs. The J and
Kdata is accepted by the flip-flop on the rising edge of the
clock pulse. The triggering occurs at a voltage level and is
not directly related to the transition time of the rising edge of
the clock. The data on the J and K inputs may be changed
while the clock is high or low as long as setup and hold
times are not violated. A low logic level on the preset or
clear inputs will set or reset the outputs regardless of the
logic levels of the other inputs.
Features
YAlternate Military/Aerospace device (54LS109) is avail-
able. Contact a National Semiconductor Sales Office/
Distributor for specifications
Connection Diagram
Dual-In-Line Package
TL/F/6368–1
Order Number 54LS109DMQB, 54LS109FMQB, DM54LS109AJ,
DM54LS109AW, DM74LS109AM or DM74LS109AN
See NS Package Number J16A, M16A, N16E or W16A
Function Table
Inputs Outputs
PR CLR CLK J K QQ
LH XXXHL
HL XXXLH
LL XXXH*H*
HH
u
LL L H
HH
u
H L Toggle
HH
u
LHQ
0Q
0
HH
u
HH H L
HH LXXQ
0Q
0
H
e
High Logic Level
LeLow Logic Level
XeEither Low or High Logic Level
u
eRising Edge of Pulse
*eThis configuration is nonstable; that is, it will not persist when preset
and/or clear inputs return to their inactive (high) state.
Q0eThe output logic level of Q before the indicated input conditions were
established.
Toggle eEach output changes to the complement of its previous level on
each active transition of the clock pulse.
C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range
DM54LS and 54LS b55§Ctoa
125§C
DM74LS 0§Ctoa
70§C
Storage Temperature Range b65§Ctoa
150§C
Note:
The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
Recommended Operating Conditions
Symbol Parameter DM54LS109A DM74LS109A Units
Min Nom Max Min Nom Max
VCC Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
VIH High Level Input Voltage 2 2 V
VIL Low Level Input Voltage 0.7 0.8 V
IOH High Level Output Current b0.4 b0.4 mA
IOL Low Level Output Current 4 8 mA
fCLK Clock Frequency (Note 2) 0 25 0 25 MHz
fCLK Clock Frequency (Note 3) 0 20 0 20 MHz
tWPulse Width Clock High 18 18
(Note 2) Preset Low 15 15 ns
Clear Low 15 15
tWPulse Width Clock High 25 25
(Note 3) Preset Low 20 20 ns
Clear Low 20 20
tSU Setup Time Data High 30
u
30
u
ns
(Notes1&2) Data Low 20
u
20
u
tSU Setup Time Data High 35
u
35
u
ns
(Notes1&3) Data Low 25
u
25
u
tHHold Time (Note 4) 0
u
0
u
ns
TAFree Air Operating Temperature b55 125 0 70 §C
Note 1: The symbol (
u
) indicates the rising edge of the clock pulse is used for reference.
Note 2: CLe15 pF, RLe2kX,T
Ae25§C and VCC e5V.
Note 3: CLe50 pF, RLe2kX,T
Ae25§C and VCC e5V.
Note 4: TAe25§C and VCC e5V.
2
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
(Note 1)
VIInput Clamp Voltage VCC eMin, IIeb
18 mA b1.5 V
VOH High Level Output VCC eMin, IOH eMax DM54 2.5 3.4 V
Voltage VIL eMax, VIH eMin DM74 2.7 3.4
VOL Low Level Output VCC eMin, IOL eMax DM54 0.25 0.4
Voltage VIL eMax, VIH eMin DM74 0.35 0.5 V
IOL e4 mA, VCC eMin DM74 0.25 0.4
IIInput Current @Max VCC eMax J, K 0.1
Input Voltage VIe7V Clock 0.1 mA
Preset 0.2
Clear 0.2
IIH High Level Input VCC eMax J,K 20
Current VIe2.7V Clock 20 mA
Preset 40
Clear 40
IIL Low Level Input VCC eMax J, K b0.4
Current VIe0.4V Clock b0.4 mA
Preset b0.8
Clear b0.8
IOS Short Circuit VCC eMax DM54 b20 b100 mA
Output Current (Note 2) DM74 b20 b100
ICC Supply Current VCC eMax (Note 3) 4 8 mA
Switching Characteristics at VCC e5V and TAe25§C (See Section 1 for Test Waveforms and Output Load)
From (Input) RLe2kX
Symbol Parameter To (Output) CLe15 pF CLe50 pF Units
Min Max Min Max
fMAX Maximum Clock 25 20 MHz
Frequency
tPLH Propagation Delay Time Clock to 25 35 ns
Low to High Level Output Q or Q
tPHL Propagation Delay Time Clock to 30 35 ns
High to Low Level Output Q or Q
tPLH Propagation Delay Time Clear 25 35 ns
Low to High Level Output to Q
tPHL Propagation Delay Time Clear 30 35 ns
High to Low Level Output to Q
tPLH Propagation Delay Time Preset 25 35 ns
Low to High Level Output to Q
tPHL Propagation Delay Time Preset 30 35 ns
High to Low Level Output to Q
Note 1: All typicals are at VCC e5V, TAe25§C.
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. For devices, with feedback from the outputs, where
shorting the outputs to ground may cause the outputs to change logic state an equivalent test may be performed where VOe2.25V and 2.125V for DM54 and
DM74 series, respectively, with the minimum and maximum limits reduced by one half from their stated values. This is very useful when using automatic test
equipment.
Note 3: ICC is measured with all outputs open, with CLOCK grounded after setting the Q and Q outputs high in turn.
3
Physical Dimensions inches (millimeters)
16-Lead Ceramic Dual-In-Line Package (J)
Order Number 54LS109DMQB or DM54LS109AJ
NS Package Number J16A
4
Physical Dimensions inches (millimeters) (Continued)
16-Lead Small Outline Molded Package (M)
Order Number DM74LS109AM
NS Package Number M16A
16-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS109AN
NS Package Number N16E
5
54LS109/DM54LS109A/DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops
with Preset, Clear, and Complementary Outputs
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flat Package
Order Number 54LS109FMQB or DM54LS109AW
NS Package Number W16A
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