Preliminary Product Bulletin
Winbond’s W681512
Single-Channel CODEC
The W681512 single channel voice CODEC is an
analog-to-digital and digital-to-analog converter
that complies with ITU-T G.712 specifications.
The CODEC features complete µ-Law and A-Law
companders (pin selectable) that are designed to
comply with ITU-T G.711 specifications. The chip
also offers a fully differential analog output.
In order to provide the cleanest possible signal,
the W681512 CODEC complies with the ITU-T
G.712 recommendation for analog-to-digital pre-
filters (also known as anti-aliasing filters) and
Digital-to-Analog post filter (signal smoothing
filter).
The W681512 CODEC contains an additional
analog power amplifier that drives higher current
output. The power amplifier gain levels can be
adjusted via a set of external resistors to drive an
output level of up to 6.3V, peak-to-peak, across a
300-Ω load.
The PCM interface for the W681512 produces 8-
bit digital data (µ-Law or A-Law) at a sampling
rate of 8kHz. It can communicate in four different
clock formats; short frame sync, long frame sync,
IDL and CGI. The W681512 is available in 20-pin
SOP and SSOP packaging.
For evaluation and prototyping purposes, a
development kit, the W681512DK, is available to
provide the system designer with a flexible
method for developing and testing an application
on a single, standalone platform.
Features
• Single supply voltage: 4.5 - 5.5V
• Typical power dissipation: 30mW, power-down of 0.5µW
• Fully-differential analog circuit design
• Differential outputs
• On-chip precision reference voltage of 1.575V for a 0dBm TLP
@ 600Ω
• Push-pull 300Ω power drivers with external gain adjust
• 8 kHz sample rate
• Master clock rates: 256 kHz, 512 kHz, 1536 kHz, 1544 kHz,
2048 kHz, 2560 kHz and 4096 kHz
• Pin-selectable µ-Law and A-Law companding (full compliance
with ITU-T G.711)
• CODEC A/D and D/A filter compliance with ITU-T G.712
specifications
• PCM interface: Short Frame Sync, Long Frame Sync, IDL and
GCI timing environments
• Temperature range: Industrial grade (-400C to 850C)
• Packaging: 20-pin SOP
Benefits
• Low power competitive solution
• System level customization
• Cross references with the Motorola MC145480 &
MC14LC5480
CODEC Applications
• VoIP, Voice over Networks
• PBX systems (gateways, switches)
• PABX/SOHO systems
• Local loop card
• SOHO routers
• Fiber-to-curb equipment
• Enterprise phones
• Digital telephone systems
• ISDN equipment
• Modems/PC cards
Development System
• The W681512DK is a development kit that can be configured
in one of the following two modes:
o Stand alone - capable of demo a loop back and
prototype a design on a dedicated board space
o Back-to-Back –enables full system test between two
p
latforms
PAO+
PAO
8
µ
/A
-
Cont
AI+
AI
-
w
µ
/A
-
Cont
o
AO
+
RO
-
-
VA
G
Ant
-
Aliasi
Filter
= 3400
Hz
Ant
i
-
Aliasi
ng
Filter
f
C
= 200
Hz
High
Pas
Filt
Smooth
ng
Filter
2
Hz
Smooth
ng
Filter
1
8
µ
/
A
Control
8
µ
/A
-
Control
PAI
V
AG
Ant
-
Aliasing
Filter
-
Aliasing
Filter
Ant
-
Filter
High Pass
Filter
Smoothing
Filter Filter
Smoothing
Filter Filter
Receive Path
Transmit Path
+ -
- +
+
-
+
-
-
A/D
Converter
D/A
Converter
f
C
= 3400Hz
f
C
= 3400Hz
C
= 200Hz
f
RO
+
W681512 Signal Path
This document contains advance information and is subject to change.
256 kHz,
512 kHz,
1536 kHz,
1544 kHz,
2048 kHz,
2560 kHz
& 4096 kHz
MCLK 256 kHz
8 kHz
512 kHz
Pre - scaler
V
DD
V
SS
Power Conditioning
Voltage reference V
AG
PUI
G.712 CODEC
G.711 µ
/A - Law
PAO+
PAO-
PAI
RO
AO
AI-
µ
/A
-
Law
Tra
ns
mit
PC
M
Int
erf
ace
Re
cei
ve
PC
M
Int
erf
ace
FST
BCLKT
PCMT
FSR
BCLKR
PCMR
256 kHz,
512 kHz,
1536 kHz,
1544 kHz,
2048 kHz,
2560 kHz
& 4096 kHz
MCLK 256 kHz
8 kHz
Pre - Scaler
Power Conditioning
Voltage reference V
AG
G.712 CODEC
G.711 µ
/A - Law RO+
µ
/A
-
Law
G.712 CODEC
G.711 µ
/A - Law
µ
/A
-
Law
Transmit
PCM
Interface
Receive
PCM
Interface
BCLKT
BCLKT
BCLKR
RO-
AI+
W681512 Block Diagram
Pin
# Pin
Name Functionality
1 RO+ Non-Inverting Receive output
2 RO- Inverting Receive output
3 PAI Power amplifier inverted input
4 PAO- Inverting Power Amplifier output
5 PAO+ Non-Inverting Power Amplifier output
6 VDD Positive power supply
7 FSR Receive Frame Sync input
8 PCMR PCM input data receive
9 BCLKR Receive bit clock input
10 PUI Power up indicator
11 MCLK System master clock input
12 BCLKT Transmit bit clock input
13 PCMT PCM output data transmit pin
14 FST Transmit Frame Sync input
15 VSS Ground power supply
16 µ/A-Law µ-Law /A-Law companding select pin
17 AO Transmit gain output
18 AI- Inverting Transmit input
19 AI+ Non-Inverting Transmit input
20 VAG Analog signal reference ground output
20
19
18
17
16
15
14
13
12
11
SINGLE
CHANNEL
CODEC
1
2
3
4
5
6
7
8
9
10
SOP/SSOP
RO+
RO-
PAI
PAO-
PAO+
V
DD
FSR
PCMR
BCLKR
PUI
V
AG
AI+
AI-
AO
µ
/A
V
SS
FST
PCMT
BCLKT
MCLK
20
19
18
17
16
15
14
13
12
11
SINGLE
CHANNEL
CODEC
1
2
3
4
5
6
7
8
9
10
V
DD
FSR
BCLKR
V
AG
µ
/A-Law
V
SS
BCLKT
MCLK
To order products or for more information:
This document contains advance information and is subject to change.
Winbond Electronics Corporation America Note: For more details on Winbond’s W681512
p
lease refer to the
p
roduct datasheet.
2727 N. First Street
San Jose, CA 95134
Tel: 1-800-677-0769 (U.S. Only), 408-943-6666
Fax: 408-544-1789
e-mail: info@winbond-usa.com
W inbond is a registered trademark of Winbond Electronics Corporation.
All other trademarks and logos are the properties of their respective owners.
W inbond CIDPB1-0901
Web: www.winbond-usa.com
