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Is Now Part of
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to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON
Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
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March 2014
FQA8N100C — N-Channel QFET® MOSFET
©2005 Fairchild Semiconductor Corporation
FQA8N100C Rev C1
www.fairchildsemi.com
1
FQA8N100C
N-Channel QFET® MOSFET
1000 V, 8 A, 1.45 Ω
Features
•RDS(on) = 1.45 Ω (Max.) @ VGS = 10 V, ID = 4 A
•Low Gate Charge (Typ. 53 nC)
•Low Crss (Typ. 16 pF)
•100% Avalanche Tested
Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficient switched mode power supplies.
Absolute Maximum Ratings TC = 25°C unless otherwise noted.
TO-3PN
G
D
S
G
S
D
Thermal Characteristics
Symbol Parameter FQA8N100C Unit
V
DSS
Drain-Source Voltage 1000 V
I
D
Drain Current - Continuous (T
C
= 25°C)
- Continuous (T
C
= 100°C)
8
5
A
A
I
DM
Drain Current - Pulsed
(Note 1)
32 A
V
GSS
Gate-Source voltage ±30 V
E
AS
Single Pulsed Avalanche Energy
(Note 2)
850 mJ
I
AR
Avalanche Current
(Note 1)
A8
E
AR
Repetitive Avalanche Energy
(Note 1)
22.5 mJ
dv/dt Peak Diode Recovery dv/dt
(Note 3)
4.0 V/ns
P
D
Power Dissipation (T
C
= 25°C)
- Derate above 25°C
225
1.79
W
W/°C
T
J,
T
STG
Operating and Storage Temperature Range -55 to +150 °C
T
L
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds 300 °C
Symbol Parameter Unit
R
θJC
Thermal Resistance, Junction-to-Case, Max. 0.56 °C/W
R
θCS
Thermal Resistance, Case-to-Sink, Typ. 0.24 °C/W
R
θJA
Thermal Resistance, Junction-to-Ambient, Max. 40 °C/W
FQA8N100C
www.fairchildsemi.com
2
FQA8N100C — N-Channel QFET® MOSFET
©2005 Fairchild Semiconductor Corporation
FQA8N100C Rev C1
Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity
TO-3PN Tube N/A N/A 30 units
Package Marking and Ordering Information
Electrical Characteristics TC = 25°C unless otherwise noted.
NOTES:
1. Repetitive rating: pulse-width limited by maximum junction temperature.
2. L = 25 mH, IAS = 8 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C.
3.
ISD ≤ 8 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C.
4. Essentially independent of operating temperature typical characteristics.
FQA8N100C FQA8N100C
Symbol Parameter Conditions Min. Typ. Max. Unit
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage V
GS
= 0V, I
D
= 250µA 1000 -- -- V
∆BV
DSS
/ ∆T
J
Breakdown Voltage Temperature
Coefficient I
D
= 250µA, Referenced to 25°C--1.4--°CV/
I
DSS
Zero Gate Voltage Drain Current V
DS
= 1000V, V
GS
= 0V
V
DS
= 800V, T
C
= 125°C
--
--
--
--
10
100
µA
µA
I
GSSF
Gate-Body Leakage Current, Forward V
GS
= 30V, V
DS
= 0V -- -- 100 nA
I
GSSR
Gate-Body Leakage Current, Reverse V
GS
= -30V, V
DS
= 0V -- -- -100 nA
On Characteristics
V
GS(th)
Gate Threshold Voltage V
DS
= V
GS
, I
D
= 250µA3.0--5.0V
R
DS(on)
Static Drain-Source
On-Resistance V
GS
= 10V, I
D
= 4A -- 1.2 1.45 Ω
g
FS
Forward Transconductance V
DS
= 50V, I
D
= 4A -- 8.0 -- S
Dynamic Characteristics
C
iss
Input Capacitance V
DS
= 25V, V
GS
= 0V,
f = 1.0MHz
-- 2475 3220 pF
C
oss
Output Capacitance -- 195 255 pF
C
rss
Reverse Transfer Capacitance -- 16 24 pF
Switching Characteristics
t
d(on)
Turn-On Delay Time V
DD
= 500V, I
D
= 8A
R
G
= 25Ω
(Note 4)
-- 50 110 ns
t
r
Turn-On Rise Time -- 95 200 ns
t
d(off)
Turn-Off Delay Time -- 122 254 ns
t
f
Turn-Off Fall Time -- 80 170 ns
Q
g
Total Gate Charge V
DS
= 800V, I
D
= 8A
V
GS
= 10V
(Note 4)
-- 53 70 nC
Q
gs
Gate-Source Charge -- 13 -- nC
Q
gd
Gate-Drain Charge -- 23 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current -- -- 8 A
I
SM
Maximum Pulsed Drain-Source Diode Forward Current -- -- 32 A
V
SD
Drain-Source Diode Forward Voltage V
GS
= 0V, I
S
= 8A -- -- 1.4 V
t
rr
Reverse Recovery Time V
GS
= 0V, I
S
= 8A
dI
F
/dt =100A/µs
-- 620 -- ns
Q
rr
Reverse Recovery Charge -- 5.2 -- µC
www.fairchildsemi.com
3
FQA8N100C — N-Channel QFET® MOSFET
©2005 Fairchild Semiconductor Corporation
FQA8N100C Rev C1
Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperatue
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
10
-1 0
10
1
10
-1
10
0
10
1
V
GS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
※
Notes :
1. 250µ s Pulse Test
2. T
C
= 25
℃
I
D
, Drain Current [A]
10
V
DS
, Drain-Source Voltage [V]
2468
10
10
-1
10
0
10
1
150
o
C
25
o
C
-55
o
C
※
Notes :
1. V
DS
= 50V
2. 250µ s Pulse Test
I
D
, Drain Current [A]
4
V
GS
, Gate-Source Voltage [V]
0 5 10 15 20 25
0.5
1.0
1.5
2.0
2.5
3.0
V
GS
= 20V
V
GS
= 10V
※
Note : T
J
= 25
℃
R
DS(ON)
[Ω],
Drain-Source On-Resistance
I
D
, Drain Current [A]
0.2 0.4 0.6 0.8 1.0 1.2 1.4
10
-1
10
0
10
1
150
℃
※
Notes :
1. V
GS
= 0V
2. 250µ s Pulse Test
25
℃
I
DR
, Reverse Drain Current [A]
V
SD
, Source-Drain voltage [V]
10
-1 0
10
1
0
500
1000
1500
2000
2500
3000
3500
4000
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
C
gd
ds
C = C + C
gd
C
rs
os
s
s
=
※
Notes :
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
C
oss
C
iss
Capacitance [pF]
10
V
DS
, Drain-Source Voltage [V]
0 01 0320 40 05 06 70
0
2
4
6
8
10
12
V
DS
= 500V
V
DS
= 200V
V
DS
= 800V
※
Note : I
D
= 8A
V
GS
, Gate-Source Voltage [V]
Q
G
, Total Gate Charge [nC]
www.fairchildsemi.com
4
FQA8N100C — N-Channel QFET® MOSFET
©2005 Fairchild Semiconductor Corporation
FQA8N100C Rev C1
Typical Performance Characteristics (Continued)
ZθJ C(t), Thermal Response [oC/W]
Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation
vs. Temperature vs. Temperature
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 11. Transient Thermal Response Curve
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
※
Notes :
1. V
GS
= 0 V
2. I
D
= 250 µ A
BV
DSS
, (Normalized)
Drain-Source Breakdown Voltage
T
J
, Junction Temperature [
o
C]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
※
Notes :
1. V
GS
= 10 V
2. I
D
= 4 A
R
DS(ON)
, (Normalized)
Drain-Source On-Resistance
T
J
, Junction Temperature [
o
C]
10
0
10
1
10
2
10
3
10
-2
10
-1
10
0
10
1
10
2
10
µ
s
DC
10 ms
1 ms
100
µ
s
Operation in This Area
is Li mited by R
DS(on)
※
Notes :
1. T
C
= 25
o
C
2. T
J
= 150
o
C
3. Si ngle Pulse
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
25 50 75 100 125 150
0
2
4
6
8
ID, Drain Current [A]
TC
, Case Temperature [
℃
]
10
-5
10
4-
10
-3
10
-2
10
-1
10
0
10
1
10
2-
10
1-
10
0
※
Notes :
1 . Z (t) = 0.56
℃
/W M a x.
2 . D
θ
ut
JC
y Facto r, D =t
1
/t
2
3 . T
JM
- T
C
= P
DM
* Z
θJC
(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
t
1
, Square Wave Pulse Duration [sec]
t
1
P
DM
t
2
www.fairchildsemi.com
5
FQA8N100C — N-Channel QFET® MOSFET
©2005 Fairchild Semiconductor Corporation
FQA8N100C Rev C1
Figure 12. Gate Charge Test Circuit & Waveform
Figure 13. Resistive Switching Test Circuit & Waveforms
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
VVGSGS
VVDSDS
1010%%
90%90%
ttd(d(onon)) ttrr
tt onon tt ofofff
ttd(d(ooffff)) ttff
VVDDDD
VVDSDS
RRLL
DUDUTT
RRGG
VVGSGS
ChaCharrgege
VVGSGS
10V10V
QQgg
QQgsgs QQgdgd
VVGSGS
DUDUTT
VVDSDS
300n300nFF
50K50KΩΩ
200n200nFF
12V12V
SamSamee TTyypepe
as as DUDUTT
===
EEEASASAS --------
2
1
2
1
2
1
2
1
-------- LLL
ASASAS
III
BVBVDSSDSS
222 ----------------------------------------
BVBVDSDSSS -V-V
DDDD
VVDDDD
VVDSDS
BVBVDSDSSS
t t pp
VVDDDD
IIASAS
VVDS DS (t)(t)
IID D (t)(t)
TiTimmee
DUTDUT
RRGG
LLL
III DDD
t t pp
VVGSGS
VVGSGS
IG = const.
www.fairchildsemi.com
6
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
D = Gate Pulse Width
Gate Pulse Period
--------------------------
FQA8N100C — N-Channel QFET® MOSFET
©2005 Fairchild Semiconductor Corporation
FQA8N100C Rev C1
www.fairchildsemi.com
7
FQA8N100C — N-Channel QFET® MOSFET
©2005 Fairchild Semiconductor Corporation
FQA8N100C Rev C1
Mechanical Dimensions
Figure 16. TO3PN, 3-Lead, Plastic, EIAJ SC-65
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
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www.fairchildsemi.com
8
FQA8N100C — N-Channel QFET® MOSFET
©2005 Fairchild Semiconductor Corporation
FQA8N100C Rev C1
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Definition of Terms
AccuPower™
AX-CAP®*
BitSiC™
Build it Now™
CorePLUS™
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CTL™
Current Transfer Logic™
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®*
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仙童 ™
®
™
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Rev. I67
tm
®
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