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10/3/11
AUTOMOTIVE GRADE PD - 97732
HEXFET® Power MOSFET
AUIRFZ48N
Features
lAdvanced Planar Technology
lLow On-Resistance
lDynamic dv/dt Rating
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
lRepetitive Avalanche Allowed
up to Tjmax
lLead-Free, RoHS Compliant
lAutomotive Qualified*
Description
Specifically designed for Automotive applications, this
Stripe Planar design of HEXFET® Power MOSFETs uti-
lizes the latest processing techniques to achieve low on-
resistance per silicon area. This benefit combined with
the fast switching speed and ruggedized device design
that HEXFET power MOSFETs are well known for, pro-
vides the designer with an extremely efficient and reli-
able device for use in Automotive and a wide variety of
other applications.
G
D
S
Gate
Drain
Source
TO-220AB
AUIRFZ48N
S
D
G
D
S
D
G
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power
dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise
specified.
Parameter Units
I
D
@ T
C
= 25°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
C
= 100°C Continuous Drain Current, V
GS
@ 10V A
I
DM
Pulsed Drain Current
c
P
D
@T
C
= 25°C Power Dissipation W
Linear Derating Factor W/°C
V
GS
Gate-to-Source Voltage V
E
AS
Single Pulse Avalanche Energy (Thermally Limited)
d
mJ
E
AS
(tested) Single Pulse Avalanche Energy Tested Value
h
I
AR
Avalanche Current
c
A
E
AR
Repetitive Avalanche Energy
g
mJ
T
J
Operating Junction and
T
STG
Storage Temperature Range °C
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
Thermal Resistance
Parameter Typ. Max. Units
R
JC
Junction-to-Case
i
––– 0.95
R
CS
Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
R
JA
Junction-to-Ambient ––– 62
290
265
See Fig.12a, 12b, 15, 16
160
1.1
± 20
Max.
69
49
270
-55 to + 175
300 (1.6mm from case )
10 lbf
y
in (1.1N
y
m)
V
(BR)DSS
55V
R
DS(on)
typ. 11m
max 14m
I
D
69A
AUIRFZ48N
2www.irf.com
S
D
G
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.24mH
RG = 50, IAS = 40A, VGS =10V. Part not
recommended for use above this value.
Pulse width 1.0ms; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the
same charging time as Coss while VDS is rising
from 0 to 80% VDSS .
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population, starting
TJ = 25°C, L = 0.24mH, RG = 50, IAS = 40A, VGS =10V.
R is measured at TJ approximately 90°C.
Static Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
Min.
Typ.
Max.
Units
V
(BR)DSS
Drain-to-Source Breakdown Voltage 55 ––– ––– V
V
(BR)DSS
/T
J
Breakdown Voltage Temp. Coefficient ––– 0.054 ––– V/°C
R
DS(on)
Static Drain-to-Source On-Resistance ––– 11 14 m
V
GS(th)
Gate Threshold Voltage 2.0 ––– 4.0 V
gfs Forward Transconductance 24 ––– ––– S
I
DSS
Drain-to-Source Leakage Current ––– ––– 25 μA
––– ––– 250
I
GSS
Gate-to-Source Forward Leakage ––– ––– 100 nA
Gate-to-Source Reverse Leakage ––– ––– -100
Dynamic Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
Q
g
Total Gate Charge ––– 42 63
Q
gs
Gate-to-Source Charge ––– 9.0 ––– nC
Q
gd
Gate-to-Drain ("Miller") Charge ––– 17 –––
t
d(on)
Turn-On Delay Time ––– 12 –––
t
r
Rise Time ––– 62 –––
t
d(off)
Turn-Off Delay Time ––– 37 ––– ns
t
f
Fall Time ––– 37 –––
L
D
Internal Drain Inductance ––– 4.5 ––– Between lead,
nH 6mm (0.25in.)
L
S
Internal Source Inductance ––– 7.5 ––– from package
and center of die contact
C
iss
Input Capacitance ––– 1900 –––
C
oss
Output Capacitance ––– 470 –––
C
rss
Reverse Transfer Capacitance ––– 120 ––– pF
C
oss
Output Capacitance ––– 2180 –––
C
oss
Output Capacitance ––– 340 –––
C
oss
eff. Effective Output Capacitance ––– 610 –––
Source-Drain Ratings and Characteristics
Parameter
Min.
Typ.
Max.
Units
I
S
Continuous Source Current ––– ––– 69
(Body Diode) A
I
SM
Pulsed Source Current ––– ––– 270
(Body Diode)
c
V
SD
Diode Forward Voltage ––– ––– 1.3 V
t
rr
Reverse Recovery Time ––– 71 110 ns
Q
rr
Reverse Recovery Charge ––– 230 345 nC
t
on
Forward Turn-On Time
V
DS
= V
GS
, I
D
= 100μA
V
DS
= 55V, V
GS
= 0V
V
DS
= 55V, V
GS
= 0V, T
J
= 125°C
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
V
GS
= 10V
e
V
DD
= 28V
I
D
= 40A
R
G
= 7.6
V
GS
= -20V
Conditions
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 1.0mA
V
GS
= 10V, I
D
= 40A
e
p-n junction diode.
T
J
= 25°C, I
S
= 40A, V
GS
= 0V
e
T
J
= 25°C, I
F
= 40A, V
DD
= 28V
di/dt = 100A/μs
e
MOSFET symbol
showing the
integral reverse
V
GS
= 0V, V
DS
= 44V, ƒ = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 44V
f
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
V
DS
= 10V, I
D
= 40A
I
D
= 40A
V
DS
= 44V
Conditions
V
GS
= 10V
e
V
GS
= 0V
V
DS
= 25V
ƒ = 1.0MHz
V
GS
= 20V
AUIRFZ48N
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Qualification standards can be found at International Rectifiers web site: http//www.irf.com/
Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report.
Highest passing voltage.
Qualification Information
†
TO-220 N/A
RoHS Compliant Yes
ESD
Machine Model Class M3 (+/- 400V)
†††
AEC-Q101-002
Human Body Model Class H1C (+/- 1500V)
†††
AEC-Q101-001
Qualification Level
Automotive
(per AEC-Q101)
††
Comments: This part number(s) passed Automotive qualification.
IR’s Industrial and Consumer qualification level is granted by
extension of the higher Automotive level.
Charged Device Model Class C5 (+/- 2000V)
†††
AEC-Q101-005
Moisture Sensitivity Level
AUIRFZ48N
4www.irf.com
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance vs. Drain Current
Fig 5. Typical Source-Drain Diode Forward Voltage Fig 6. Normalized On-Resistance vs. Temperature
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
60μs PULSE WIDTH
Tj = 25°C
5.0V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
5.0V
60μs PULSE WIDTH
Tj = 175°C
VGS
TOP 15V
12V
10V
8.0V
7.0V
6.0V
5.5V
BOTTOM 5.0V
0246810 12 14 16
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
VDS = 25V
60μs PULSE WIDTH
0.2 0.6 1.0 1.4 1.8 2.2
VSD, Source-to-Drain Voltage (V)
1.0
10
100
1000
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
-60 -40 -20 020 40 60 80 100120140160180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 67A
VGS = 10V
0 20406080
ID,Drain-to-Source Current (A)
0
10
20
30
40
50
Gfs, Forward Transconductance (S)
TJ = 25°C
TJ = 175°C
VDS = 10V
380μs PULSE WIDTH
AUIRFZ48N
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Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
Fig 9. Maximum Safe Operating Area Fig 10. Maximum Drain Current vs. Case Temperature
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
110 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
10000
100000
C, Capacitance (pF)
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0 5 10 15 20 25 30 35 40 45 50
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
VGS, Gate-to-Source Voltage (V)
VDS= 44V
VDS= 28V
VDS= 11V
ID= 40A
0.1 1 10 100
VDS, Drain-toSource Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100μsec
DC
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
Thermal Response ( Z thJC ) °C/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
10
20
30
40
50
60
70
ID, Drain Current (A)
AUIRFZ48N
6www.irf.com
Fig 12. Maximum Avalanche Energy vs. Drain Current Fig 13. Threshold Voltage vs. Temperature
Fig 14. Typical Avalanche Current vs.Pulsewidth
Fig 15. Maximum Avalanche Energy vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 17a, 17b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
-75 -50 -25 025 50 75 100 125 150 175
TJ , Temperature ( °C )
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VGS(th), Gate threshold Voltage (V)
ID = 100μA
ID = 1.0mA
ID = 1.0A
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
1000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
50
100
150
200
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 40A
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
100
200
300
400
500
600
700
800
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP 7.2A
14A
BOTTOM 40A
AUIRFZ48N
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Fig 17b. Unclamped Inductive Waveforms
Fig 17a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
Fig 18a. Gate Charge Test Circuit Fig 18b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width µs
Duty Factor
RD
VGS
RG
D.U.T.
10V
+
-
VDD
Fig 19a. Switching Time Test Circuit Fig 19b. Switching Time Waveforms
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3F
50K
.2F
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
AUIRFZ48N
8www.irf.com
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
YWWA
XX or XX
Part Number
IR Logo
Lot Code
AUIRFZ48N
Date Code
Y= Year
WW= Work Week
A= Automotive, Lead Free
AUIRFZ48N
www.irf.com 9
Ordering Information
Base part
number
Package Type Standard Pack Complete Part Number
Form
Quantity
AUIRFZ48N
TO-220
Tube
50
AUIRFZ48N
AUIRFZ48N
10 www.irf.com
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make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discon-
tinue any product or services without notice. Part numbers designated with the AU prefix follow automotive industry and / or customer
specific requirements with regards to product discontinuance and process change notification. All products are sold subject to IRs terms
and conditions of sale supplied at the time of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IRs standard
warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
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