INTERNATIONAL RECTIFIER Data Sheet No. PD-9.487C Ig<aR REPETITIVE AVALANCHE RATED AND dv/dt RATED HEXFET TRANSISTOR N-CHANNEL IRFM150 2N7224 JAN TXEN7 224 JANTXVEN7224 (REF: MIL-S-19500/592) 100 Volt, 0.07 Ohm HEXFET The HEXFET technology is the key to International Rectifiers advanced line of power MOSFET transistors. The efficient geometry design achieves very low on-state resistance combined with high transconductance. The HEXFET transistors also feature all of the well established advantages of MOSFETs such as voltage control, very fast switching, ease of paraileling and temperature stability of the electrical parameters. They are well suited for applications such as switching power supplies and virtually any application where military and/or high reliability is required. CASE STYLE AND DIMENSIONS 13.84 (0.545) 1 oe 59 (0.535) 20.32 (0.800) 20.07 (0.790) 6.60 (0.260) 6.32 (0.249) BERYLLIA WARNING PER MIL-S-19500 SEE PAGE 1-308 3530.1) Product Summary Part Number | BVpss Rps(on) Ip IRFM150 100V 0.070 34A FEATURES: @ Repetitive Avalanche Rating @ isolated and Hermetically Sealed M@ Alternative to TO-3 Package @ Simple Drive Requirements @ Ease of Paralieling @ Ceramic Eyelets 7{ 9.12 (0.005) | -8- i 1,27 (0,050) ae oy (5.040) 3.78 (0.149) | ) 20.32 (0, 800) 20.07 (0.780) 84 (0. | eo e ee 19.84 (0,545) 5:60 (0.260) 75.55 0.655) 8-92 0.20 | 545) x 1.14 (0.045) 0.89 (0-035) | Gar prem| Ct x pe 0-50 (0.020) IC TAG] a] 0,25 (0.010) @|C| LEGEND 1 DRAIN 2 SQUACE a GATE NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M - 1982. 2 ALL DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES). Conforms to JEDEC Outline TO-254AA* Dimensions in Millimeters and (Inches) For leadform configurations see page 1-308, fig. 15 1-301IRFM150, JANTXV, JANTX-, 2N7224 Devices Absolute Maximum Ratings Parameter IRFM150, JANTXV, JANTX-, 2N7224 Units Ip @ Vag = 10V, To = 25C Continuous Drain Current 34 Ip @ Vag = 10V, Tc = 100C Continuous Drain Current 21 / A IDM Pulsed Drain Current 136 Pp @ Tc = 25C Max. Power Dissipation 150 Ww Linear Derating Factor 12 wik Ves Gate-to-Source Voltage +20 Vv Eas Single Pulse Avalanche Energy @ (See 4 19) mJ lAR Avalanche Current 34 A (See Ear) Ear Repetitive Avalanche Energy (See hg. 19 mJ dvidt Peak Diode Recovery dv/dt @ 55 Vins (See Fig. 13) Ty Operating Junction -55 to 150 Tsta Storage Temperature Range C Lead Temperature 300 (0.063 in. (1.6 mm) from case for 10s} Weight 9.3 (typical) g Electrical Characteristics @ 1, = 25c (Uniess Otherwise Specified) Parameter Min. Typ. Max. Units Test Conditions BVoss Drain-to-Source Breakdown Voltage 400 ~ _ v Ves = WV, Ip = 10 mA ABVpss/A4T) Temperature Coefficient of _ 0.13 _ VPC Reference to 25C, Ip = 1.0 mA Breakdown Voltage Ri Static Drain-to-Source - - 0.07 Veg = 10V, Ip = 21A DS(on) On-State Resistance a as _ _ 0.081 Vas = 10V, Ip = 344 VG@sith) Gate Threshold Voltage 20 _ 40 v Vos = Vas: Ip = 250 pA Sts Forward Transconductance 9.0 - ~ S$ (0) Vps = 15V, Ipg = 214 loss Zero Gate Voltage Drain Current - _ 25 Vps = 08 x Max. Rating, Veg = OV A = = 250 e Vpg = 08 x Max. Rating Veg = OV, Ty = 125C less Gate-to-Source Leakage Forward _ - 100 nA Vag = 20V lass Gate-to-Source Leakage Reverse _ _ -100 Vas = -20V Qg Total Gate Charge 50 - 126 Vas = 10V, Ip = 34A Qgs Gate-to-Source Charge 8 _ 22 nc Vos = 05 x Max. Rating Qga Gate-to-Drain (Miller) Charge 15 _ 65 See Fig. 6 and 14 ta(on) Turn-On Delay Time _ - 35 Vpp = 50V, Ip = 34A, Rg = 2.350 t Rise Time - _ 196 ns ta(off Turn-Off Delay Time _ - 170 See Fig. 11 ty Fall Time _ 130 Lp Internal Drain Inductance - 87 Measured from the drain Modified MOSFET symbol lead, 6 mm (0.25 in.} from | showing the internal nH package to center of die. inductances. 0 lg Internal Source Inductance - 87 _ Measured from the source lead, 6 mm (0.25 in.) from package to source bonding pad. 3 Ciss Input Capacitance - 3700 - Ves = OV, Vos = 25V Coss Output Capacitance - 1100 _ oF f = 1.0 MHz Crgg Reverse Transfer Capacitance - 200 - See Fig. 5 Coc Drain-to-Case Capacitance - 12 - 1-302IaR IRFM150, JANTXV, JANTX-, 2N7224 Devices Source-Drain Diode Ratings and Characteristics Parameter Min. Typ. Max. Units Test Conditions Ig Continuous Source Current - _ 4 Modifled MOSFET symboi showing the integral 0 (Body Diode) A Reverse p-n junction rectifier. a ism (Seay Diodes egurent - - 136 : Vsp Diode Forward Voltage _ =_ 1.8 Vv Ty = 28C, ig = 34A, Vag = OV tre Reverse Recovery Time _ _ 00 nS Ty = 25C, Ip = 34A, di/dt = 100 A/us Qrr Reverse Recovery Charge _ - 29 rie Vpp = 50V ton Forward Turn-On Time Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by Lg + Lp. Thermal Resistance Parameter Min. Typ. Max. Units Test Conditions Rihuc Junction-to-Case - _ 083 Rincs Case-to-Sink _ 0.21 - KAW | Mounting surface flat, smooth, and greased RingA Junction-to-Ambient _ 48 Typical socket mount Hemimun junc temperature ase figure s) (SO = 94A, dict = 70 Alu, kw ~ sow Refer to current HEXFET reliability report ae ested oe Ts S iid c WIK = WEG @ ? Y OO Re = 25C, @ Pulse width < 300 us; Duty Cycle < 2% Peak IL = 34A 1-303IRFM150, JANTXV, JANTX-, 2N7224 Devices 102 404 Ip, DRAIN CURRENT (AMPERES) 0 4.5V 40 20us PULSE WIDTH Te = 250C 107! 10 104 Vong, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Fig. 1 Typical Output Characteristics, Tc = 25C 402 rang Oo rn Ip, DRAIN CURRENT (AMPERES) Vos = 5OV 20us PULSE WIDTH a 9 40 Vgg. GATE-TO-SOURCE VOLTAGE (VOLTS) Fig. 3 Typical Transfer Characteristics IaR 102 wn la a uu Q = = a B 10! {10 xe _ oO Zz et <r a a HH 490 20us PULSE WIDTH Te = 150C 10-1 40 101 DRAIN-TO SOURCE ON RESISTANCE 1-304 Fos (on)" Vpg, ORAIN-TO-SQUACE VOLTAGE (VOLTS) Fig. 2 Typical Output Characteristics, Tc = 150C 2.5 2.0 1.5 (NORMAL IZED) o o ves = 10V 0.0 ~60 -40 -20 0 20 40 60 80 100 120 140 160 T, JUNCTION TEMPERATURE ( C ) Fig. 4 Normalized On-Resistance Vs. TemperatureIeaR IRFM150, JANTXV, JANTX-, 2N7224 Devices 7000 6S = OV, f = 4MHz 20 = Cgg + Cgg, Cgg SHORTED 6000 Cc = Cgg a = Cus + 3 S$ 16 <= 5000 2 o C e ty iss 4 SS 4000 2 te Pins fea i @ <t 3000 a & og F 52000 ws <a o 4 41000 ip Crgs > F Cc 0 0 SEE FIGURE 14 103 0 30 60 go 120 150 Vpg, ORAIN-TO-SOURCE VOLTAGE (VOLTS) @g, TOTAL GATE CHARGE {nC} Fig. 5 Typical Capacitance Vs. Drain-to-Source Fig. 6 Typical Gate Charge Vs. Gate-to-Source Voltage Voltage OPERATION IN THIS AREA LIMITED 102 BY Ros (ON} Igp, REVERSE DRAIN CURRENT (AMPERES) Ip. ORAIN CURRENT (AMPERES) 401 = Ty=1500C Veg = OV SINGLE 0 2.5 3.0 1 2 5 10 2 5 102 2 5 103 . 1. 1.5 2.0 Vgp. SOURCE-TO-DRAIN VOLTAGE (VOLTS) Vpg. DRAIN-TO-SOURCE VOLTAGE (VOLTS) Fig. 7 Typical Source-Drain Diode Forward Voltage Fig. 8 Maximum Safe Operating Area 1-305IRFM150, JANTXV, JANTX-, 2N7224 Devices 1.0 oO = SINGLE PULSE (THERMAL RESPONSE) 10 THERMAL RESPONSE (Z; 1; ) NOTES: 1. DUTY FACTOR, 2. PEAK Tj=Ppm X Zthjc + Te 10 1075 10-4 10-3 10-2 0.4 Pod | jt to] | + 2+ D=t1/t2 1 10 t4, RECTANGULAR PULSE DURATION (SECONDS) Fig. 9 Maximum Effective Transient Thermal Impedance, Junction-to-Case Vs. Pulse Duration Ro Vps>4y"~wv D.U.T. J Ye 7. Yoo % yf 10V ry Pulse Width <1ps = Duty Factor <0.1% = 3 Z Fig. 11a Switching Time Test Circuit & > oO 4 z Nos TN FF" 90% o " | | | | 10% o 25 50 75 100 125 150 Vas| Kt Tc, CASE TEMPERATURE ( C) tajon) t tavot ty r Fig. 10 Maximum Drain Current Vs. Case Fig. 11b Switching Time Waveforms Temperature 1-306IGR qwuHoO Vary tp to obtain required peak I + 7. Voo Fig. 12a Unclamped Inductive Test Circuit BVpss r_ , / DD / Nh / jf {\ we Vos |-- Fig. 12b Unclamped Inductive Waveforms D.U.T, c+ Circuit Layout Considerations ifr * Low Stray Inductance A @ * Ground Plane * Low Leakage Inductance Current Transformer }_< - + o 38) 2 - + A}\ I AN I Driver L A) + dv/dt controlled by Rg Re * Driver same type as D.U.T. * Isp controlled by Duty Factor D * D.U.T. Device Under Test + 7.%oo @ IRFM150, Driver Gate Drive Eqs, SINGLE PULSE ENERGY (4) JANTXV, JANTX-, 2N7224 Devices Q. 150 83 & 0.060 o Q w oa . 0055 50 75 100 125 STARTING Ty, JUNCTION TEMPERATURE (C) 150 Fig. 12c Maximum Avalanche Energy Vs. Starting Junction Temperature _ PW Period Period Dw. rw @ D.U.T. isp Waveform Reverse . Recovery. Body Diode Forward Current Current at L D.U.T. Vos Waveform , Diode Recovery \ a} 1 Von Re-, ied benef aac Voltage F Body Diode Forward Drop Inductor Current Ripple < 5% Veg = SV for Logic Level Devices Fig. 13 Peak Diode Recovery dv/dt Test Circuit 1-307IRFM150, JANTXV, JANTX-, 2N7224 Devices IaR Qe 1OViE . Qq Qe Vg Charge ~ Fig. 14a Basic Gate Charge Waveform Current Regulator Same Type | as D.U.T. = + T_ Vos , D.U.T. T- if Ves 3amAt [1 fawn Ig Ib Current Sampling Resistors Fig. 14b Gate Charge Test Circuit 3.78 (0.149) | 13.84 (0.545) * 355 0.3 | 13.59 (0.535) ee 17.40 (0.685) 76.89 (0.665) 21.98 (0.865) 30.95 (0.825) - _-| ei xoe 0 a [3.81 (0-150) | a EO 150 LEGEND 1 DRAIN 2 SOURCE 3 GATE NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M - 1982. 2 ALL DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES). 3 LEADFORM IS AVAILABLE IN EITHER ORIENTATION: EXAMPLE: IRFM1500 [3.2] EXAMPLE: IRFM150U [9-12 .005) 6.60 (0,260) 2 6.42 (0.249) 1.27 (0.050) 1" T2004) 1.52 (0.060) R 13.84 (0.545) MIN. 17.50 0. ole smc atch ee [ @ 0.25 (0.010) WIC -E 4.01 0.158) 3.61 (0. ere. | Fig. 15 Optional Leadforms for Outline TO-254 BERYLLIA WARNING PER MIL-S-19500 Packages containing beryilia shall not be ground, sandblasted, machined, or have other operations performed on them which will produce beryllia or beryllium dust. Furthermore, beryllium oxide packages shall not be placed in acids that will produce fumes containing beryllium. |-308