LMH6601QMGX/NOPB - National Semiconductor

LMH6601/LMH6601Q

October 20, 2009

250 MHz, 2.4V CMOS Operational Amplifier with Shutdown

General Description

The LMH6601 is a low voltage (2.4V – 5.5V), high speed volt-

age feedback operational amplifier suitable for use in a variety

of consumer and industrial applications. With a bandwidth of

125 MHz at a gain of +2 and guaranteed high output current

of 100 mA, the LMH6601 is an ideal choice for video line driver

applications including HDTV. Low input bias current (50 pA

maximum), rail-to-rail output, and low current noise allow the

LMH6601 to be used in various industrial applications such

as transimpedance amplifiers, active filters, or high-

impedance buffers. The LMH6601 is an attractive solution for

systems which require high performance at low supply volt-

ages. The LMH6601 is available in a 6-pin SC70 package,

and includes a micropower shutdown feature.

Features

VS = 3.3V, TA = 25°C, AV = 2 V/V, RL = 150Ω to V−, unless

specified.

■125 MHz −3 dB small signal bandwidth

■75 MHz −3 dB large signal bandwidth

■30 MHz large signal 0.1 dB gain flatness

■260 V/μs slew rate

■0.25%/0.25° differential gain/differential phase

■Rail-to-rail output

■2.4V – 5.5V single supply operating range

■6-Pin SC70 Package

■LMH6601Q is AEC-Q100 grade 3 qualified and is

manufactured on an automotive grade flow

Applications

■Video amplifier

■Charge amplifier

■Set-top box

■Sample & hold

■Transimpedance amplifier

■Line driver

■High impedance buffer

■Automotive

Response at a Gain of +2 for Various Supply Voltages

20136441

LMH6601/LMH6601Q 250 MHz, 2.4V CMOS Operational Amplifier with Shutdown

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

ESD Tolerance (Note 4)

Human Body Model 2 kV

Machine Model 200V

VIN Differential ±2.5V

Input Current ±10 mA

Output Current 200 mA (Note 3)

Supply Voltage (V+ – V−)6.0V

Voltage at Input/Output Pins V++0.5V, V−−0.5V

Storage Temperature Range −65°C to +150°C

Junction Temperature +150°C

Soldering Information

Infrared or Convection (20 sec.) 235°C

Wave Soldering (10 sec.) 260°C

Operating Ratings (Note 1)

Supply Voltage (V+ – V−)2.4V to 5.5V

Operating Temperature Range −40°C to +85°C

Package Thermal Resistance (θJA)

6-pin SC70 414°C/W

5V Electrical Characteristics Single Supply with VS= 5V, AV = +2, RF = 604Ω, SD tied to V+, VOUT = VS/2,

RL = 150Ω to V− unless otherwise specified. Boldface limits apply at temperature extremes. (Note 2)

Symbol Parameter Condition Min

(Note 6)

Typ

(Note 6)

Max

(Note 6)

Units

Frequency Domain Response

SSBW –3 dB Bandwidth Small Signal VOUT = 0.25 VPP 130 MHz

SSBW_1 VOUT = 0.25 VPP, AV = +1 250

Peak Peaking VOUT = 0.25 VPP, AV = +1 2.5 dB

Peak_1 Peaking VOUT = 0.25 VPP 0 dB

LSBW –3 dB Bandwidth Large Signal VOUT = 2 VPP 81 MHz

Peak_2 Peaking VOUT = 2 VPP 0 dB

0.1 dB BW 0.1 dB Bandwidth VOUT = 2 VPP 30 MHz

GBWP_1k Gain Bandwidth Product Unity Gain, RL = 1 kΩ to VS/2 155

MHz

GBWP_150 Unity Gain, RL = 150Ω to VS/2 125

AVOL Large Signal Open Loop Gain 0.5V < VOUT < 4.5V 56 66 dB

PBW Full Power BW –1 dB, AV = +4, VOUT = 4.2 VPP,

RL = 150Ω to VS/2

30 MHz

DG Differential Gain 4.43 MHz, 1.7V ≤ VOUT ≤ 3.3V,

RL = 150Ω to V−

0.06 %

DP Differential Phase 4.43 MHz, 1.7V ≤ VOUT ≤ 3.3V

RL = 150Ω to V−

0.10 deg

Time Domain Response

TRS/TRL Rise & Fall Time 0.25V Step 2.6 ns

OS Overshoot 0.25V Step 10 %

SR Slew Rate 2V Step 275 V/μs

TSSettling Time 1V Step, ±0.1% 50 ns

TS_1 1V Step, ±0.02% 220

PD Propagation Delay Input to Output, 250 mV Step, 50% 2.4 ns

CLCap Load Tolerance AV = −1, 10% Overshoot, 75Ω in Series 50 pF

Distortion & Noise Performance

HD2 Harmonic Distortion (2nd) 2 VPP, 10 MHz −56 dBc

HD2_1 4 VPP, 10 MHz, RL = 1 kΩ to VS/2 −61

HD3 Harmonic Distortion (3rd) 2 VPP, 10 MHz −73 dBc

HD3_1 4 VPP, 10 MHz, RL = 1 kΩ to VS/2 −64

THD Total Harmonic Distortion 4 VPP, 10 MHz, RL = 1 kΩ to VS/2 −58

VN1 Input Voltage Noise >10 MHz 7

nV/

VN2 1 MHz 10

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LMH6601/LMH6601Q

Symbol Parameter Condition Min

(Note 6)

Typ

(Note 6)

Max

(Note 6)

Units

INInput Current Noise >1 MHz 50 fA/

Static, DC Performance

VIO Input Offset Voltage ±1 ±2.4

±5.0

DVIO Input Offset Voltage Average Drift (Note 8) −5 μV/°C

IBInput Bias Current (Note 9) 5 50 pA

IOS Input Offset Current (Note 9) 2 25 pA

RIN Input Resistance 0V ≤ VIN ≤ 3.5V 10 TΩ

CIN Input Capacitance 1.3 pF

+PSRR Positive Power Supply Rejection

Ratio

DC 55

59 dB

−PSRR Negative Power Supply Rejection

Ratio

DC 53

61 dB

CMRR Common Mode Rejection Ratio DC 56

68 dB

CMVR Input Voltage Range CMRR > 50 dB V− -0.20 –V+ - 1.5 V

ICC Supply Current Normal Operation

VOUT = VS/2

9.6 11.5

13.5 mA

Shutdown

SD tied to ≤ 0.5V (Note 5)

100 nA

VOH1 Output High Voltage

(Relative to V+)

RL = 150Ω to V––210

–480

–190

VOH2 RL = 75Ω to VS/2 –190

VOH3 RL = 10 kΩ to V––60

–110

–12

VOL1 Output Low Voltage

(Relative to V–)

RL = 150Ω to V– +5 +45

+125

VOL2 RL = 75Ω to VS/2 +120

VOL3 RL = 10 kΩ to V– +5 +45

+125

IOOutput Current VOUT < 0.6V from Respective

Supply

Source 150

Sink 180

IO_1 VOUT = VS/2,

VID = ±18 mV (Note 10)

±100

Load Output Load Rating THD < −30 dBc, f = 200 kHz,

RL tied to VS/2, VOUT = 4 VPP

20 Ω

RO_Enabled Output Resistance Enabled, AV = +1 0.2 Ω

RO_Disabled Output Resistance Shutdown >100 MΩ

CO_Disabled Output Capacitance Shutdown 5.0 pF

Miscellaneous Performance

VDMAX Voltage Limit for Disable (Pin 5) (Note 5)0 0.5 V

VDMIN Voltage Limit for Enable (Pin 5) (Note 5)4.5 5.0 V

IiLogic Input Current (Pin 5) SD = 5V (Note 5) 10 pA

V_glitch Turn-on Glitch 2.2 V

Ton Turn-on Time 1.4 µs

Toff Turn-off Time 520 ns

IsolationOFF Off Isolation 1 MHz, RL = 1 kΩ 60 dB

T_OL Overload Recovery <20 ns

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LMH6601/LMH6601Q

3.3V Electrical Characteristics Single Supply with VS= 3.3V, AV = +2, RF = 604Ω, SD tied to V+,

VOUT = VS/2, RL = 150Ω to V− unless otherwise specified. Boldface limits apply at temperature extremes. (Note 2)

Symbol Parameter Condition Min

(Note 6)

Typ

(Note 6)

Max

(Note 6)

Units

Frequency Domain Response

SSBW –3 dB Bandwidth Small Signal VOUT = 0.25 VPP 125 MHz

SSBW_1 VOUT = 0.25 VPP, AV = +1 250

Peak Peaking VOUT = 0.25 VPP, AV = +1 3 dB

Peak_1 Peaking VOUT = 0.25 VPP 0.05 dB

LSBW –3 dB Bandwidth Large Signal VOUT = 2 V PP 75 MHz

Peak_2 Peaking VOUT = 2 VPP 0 dB

0.1 dB BW 0.1 dB Bandwidth VOUT = 2 VPP 30 MHz

GBWP_1k Gain Bandwidth Product Unity Gain, RL = 1 kΩ to VS/2 115

MHz

GBWP_150 Unity Gain, RL = 150Ω to VS/2 105

AVOL Large Signal Open Loop Gain 0.3V < VOUT < 3V 56 67 dB

PBW Full Power BW –1 dB, AV = +4, VOUT = 2.8VPP,

RL = 150Ω to VS/2

30 MHz

DG Differential Gain 4.43 MHz, 0.85V ≤ VOUT ≤ 2.45V,

RL = 150Ω to V−

0.06 %

DP Differential Phase 4.43 MHz, 0.85V ≤ VOUT ≤ 2.45V

RL = 150Ω to V−

0.23 deg

Time Domain Response

TRS/TRL Rise & Fall Time 0.25V Step 2.7 ns

OS Overshoot 0.25V Step 10 %

SR Slew Rate 2V Step 260 V/μs

TSSettling Time 1V Step, ±0.1% 70 ns

TS_1 1V Step, ±0.02% 300

PD Propagation Delay Input to Output, 250 mV Step, 50% 2.6 ns

CLCap Load Tolerance AV = −1, 10% Overshoot, 82Ω in Series 50 pF

Distortion & Noise Performance

HD2 Harmonic Distortion (2nd) 2 VPP, 10 MHz −61

dBc

HD2_1 2 VPP, 10 MHz

RL = 1 kΩ to VS/2

−79

HD3 Harmonic Distortion (3rd) 2 VPP, 10 MHz −53

dBc

HD3_2 2 VPP, 10 MHz

RL = 1 kΩ to VS/2

−69

THD Total Harmonic Distortion 2 VPP, 10 MHz

RL = 1 kΩ to VS/2

−66 dBc

VN1 Input Voltage Noise >10 MHz 7

nV/

VN2 1 MHz 10

INInput Current Noise >1 MHz 50 fA/

Static, DC Performance

VIO Input Offset Voltage ±1 ±2.6

±5.5

DVIO Input Offset Voltage Average Drift (Note 8) −4.5 μV/°C

IBInput Bias Current (Note 9) 5 50 pA

IOS Input Offset Current (Note 9) 2 25 pA

RIN Input Resistance 0V ≤ VIN ≤ 1.8V 15 TΩ

CIN Input Capacitance 1.4 pF

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LMH6601/LMH6601Q

Symbol Parameter Condition Min

(Note 6)

Typ

(Note 6)

Max

(Note 6)

Units

+PSRR Positive Power Supply Rejection

Ratio

DC 61

80 dB

−PSRR Negative Power Supply Rejection

Ratio

DC 57

72 dB

CMRR Common Mode Rejection Ratio DC 58

73 dB

CMVR Input Voltage Range CMRR > 50 dB V− -0.20 –V+ -1.5 V

ICC Supply Current Normal Operation

VOUT = VS/2

9.2 11

13 mA

Shutdown

SD tied to ≤ 0.33V (Note 5)

100 nA

VOH1 Output High Voltage

(Relative to V+)

RL = 150Ω to V––210

–360

–190

VOH2 RL = 75Ω to VS/2 –190

VOH3 RL = 10 kΩ to V−–50

–100

–10

VOL1 Output Low Voltage

(Relative to V–)

RL = 150Ω to V– +4 +45

+125

VOL2 RL = 75Ω to VS/2 +105

VOL3 RL = 10 kΩ to V– +4 +45

+125

IOOutput Current VOUT < 0.6V from Respective

Supply

Source 50

Sink 75

IO_1 VOUT = VS/2, VID = ±18 mV

(Note 10)

±75

Load Output Load Rating THD < −30 dBc, f = 200 kHz,

RL tied to VS/2, VOUT = 2.6 VPP

25 Ω

RO_Enabled Output Resistance Enabled, AV = +1 0.2 Ω

RO_Disabled Output Resistance Shutdown >100 MΩ

CO_Disabled Output Capacitance Shutdown 5.6 pF

Miscellaneous Performance

VDMAX Voltage Limit for Disable (Pin 5) (Note 5)0 0.33 V

VDMIN Voltage Limit for Enable (Pin 5) (Note 5)2.97 3.3 V

IiLogic Input Current (Pin 5) SD = 3.3V (Note 5) 8 pA

V_glitch Turn-on Glitch 1.6 V

Ton Turn-on Time 3.5 µs

Toff Turn-off Time 500 ns

IsolationOFF Off Isolation 1 MHz, RL = 1 kΩ 60 dB

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LMH6601/LMH6601Q

2.7V Electrical Characteristics Single Supply with VS = 2.7V, AV = +2, RF = 604Ω, SD tied to V+, VOUT =

VS/2, RL = 150Ω to V− unless otherwise specified. Boldface limits apply at temperature extremes. (Note 2)

Symbol Parameter Condition Min

(Note 6)

Typ

(Note 6)

Max

(Note 6)

Units

Frequency Domain Response

SSBW –3 dB Bandwidth Small Signal VOUT = 0.25 VPP 120 MHz

SSBW_1 VOUT = 0.25 VPP, AV = +1 250

Peak Peaking VOUT = 0.25 VPP, AV = +1 3.1 dB

Peak_1 Peaking VOUT = 0.25 VPP 0.1 dB

LSBW –3 dB Bandwidth Large Signal VOUT = 2 V PP 73 MHz

Peak_2 Peaking VOUT = 2 VPP 0 dB

0.1 dB BW 0.1 dB Bandwidth VOUT = 2VPP 30 MHz

GBWP_1k Gain Bandwidth Product Unity Gain, RL = 1 kΩ to VS/2 110

MHz

GBWP_150 Unity Gain, RL = 150Ω to VS/2 81

AVOL Large Signal Open Loop Gain 0.25V < VOUT < 2.5V 56 65 dB

PBW Full Power BW –1 dB, AV = +4, VOUT = 2 VPP,

RL = 150Ω to VS/2

13 MHz

DG Differential Gain 4.43 MHz, 0.45V ≤ VOUT ≤ 2.05V

RL = 150Ω to V−

0.12 %

DP Differential Phase 4.43 MHz, 0.45V ≤ VOUT ≤ 2.05V

RL = 150Ω to V−

0.62 deg

Time Domain Response

TRS/TRL Rise & Fall Time 0.25V Step 2.7 ns

OS Overshoot 0.25V Step 10 %

SR Slew Rate 2V Step 260 V/μs

TSSettling Time 1V Step, ±0.1% 147 ns

TS_1 1V Step, ±0.02% 410

PD Propagation Delay Input to Output, 250 mV Step, 50% 3.4 ns

Distortion & Noise Performance

HD2 Harmonic Distortion (2nd) 1 VPP, 10 MHz −58 dBc

HD3 Harmonic Distortion (3rd) 1 VPP, 10 MHz −60 dBc

VN1 Input Voltage Noise >10 MHz 8.4

nV/

VN2 1 MHz 12

INInput Current Noise >1 MHz 50 fA/

Static, DC Performance

VIO Input Offset Voltage ±1 ±3.5

±6.5 mV

DVIO Input Offset Voltage Average Drift (Note 8) −6.5 μV/°C

IBInput Bias Current (Note 9) 5 50 pA

IOS Input Offset Current (Note 9) 2 25 pA

RIN Input Resistance 0V ≤ VIN ≤ 1.2V 20 TΩ

CIN Input Capacitance 1.6 pF

+PSRR Positive Power Supply Rejection

Ratio

DC 58

68 dB

−PSRR Negative Power Supply Rejection

Ratio

DC 56

69 dB

CMRR Common Mode Rejection Ratio DC 57

77 dB

CMVR Input Voltage Range CMRR > 50 dB V− -0.20 –V+ -1.5 V

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LMH6601/LMH6601Q

Symbol Parameter Condition Min

(Note 6)

Typ

(Note 6)

Max

(Note 6)

Units

ICC Supply Current Normal Operation

VOUT = VS/2

9.0 10.6

12.5 mA

Shutdown

SD tied to ≤ 0.27V (Note 5)

100 nA

VOH1 Output High Voltage

(Relative to V+)

RL = 150Ω to V––260

–420

–200

VOH2 RL = 75Ω to VS/2 –200

VOH3 RL = 10 kΩ to V––50

100

–10

VOL1 Output Low Voltage

(Relative to V–)

RL = 150Ω to V– +4 +45

+125

VOL2 RL = 75Ω to VS/2 +125

VOL3 RL = 10 kΩ to V– +4 +45

125

IOOutput Current VOUT ≤ 0.6V from Respective

Supply

Source 25

Sink 62

IO_1 VOUT = VS/2, VID = ±18 mV

(Note 10)

Source 25

Sink 35

Load Output Load Rating THD < −30 dBc, f = 200 kHz, RL tied to

VS/2, VOUT = 2.2 VPP

40 Ω

RO_Enable Output Resistance Enabled, AV = +1 0.2 Ω

RO_Disabled Output Resistance Shutdown >100 MΩ

CO_Disabled Output Capacitance Shutdown 5.6 pF

Miscellaneous Performance

VDMAX Voltage Limit for Disable (Pin 5) (Note 5)0 0.27 V

VDMIN Voltage Limit for Enable (Pin 5) (Note 5)2.43 2.7 V

IiLogic Input Current (Pin 5) SD = 2.7V (Note 5) 4 pA

V_glitch Turn-on Glitch 1.2 V

Ton Turn-on Time 5.2 µs

Toff Turn-off Time 760 ns

IsolationOFF Off Isolation 1 MHz, RL = 1 kΩ 60 dB

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.

Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating

of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ >

TA.

Note 3: The maximum continuous output current (IOUT) is determined by device power dissipation limitations.

Note 4: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)

Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).

Note 5: SD logic is CMOS compatible. To ensure proper logic level and to minimize power supply current, SD should typically be less than 10% of total supply

voltage away from either supply rail.

Note 6: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will

also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.

Note 7: Negative input current implies current flowing out of the device.

Note 8: Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.

Note 9: This parameter is guaranteed by design and/or characterization and is not tested in production.

Note 10: “VID” is input differential voltage (input overdrive).

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LMH6601/LMH6601Q

Connection Diagram

6-Pin SC70

20136401

Top View

Ordering Information

Package Part Number Package Marking Transport Media NSC Drawing Features

6-Pin SC70

LMH6601MG

A95

1k Units Tape and

Reel

MAA06A

LMH6601MGX 3k Units Tape and

Reel

LMH6601QMG

AKA

1k Units Tape and

Reel

AEC-Q100 grade 3

qualified. Automotive

Grade Production

Flow**

LMH6601QMGX 3k Units Tape and

Reel

**Automotive Grade (Q) product incorporates enhanced manufacturing and support processes for the automotive market, including defect detection

methodologies. Reliability qualification is compliant with the requirements and temperature grades defined in the AEC-Q100 standard. Automotive grade products

are identified with the letter Q. For more information, go to http://www.national.com/automotive.

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LMH6601/LMH6601Q

Typical Performance Characteristics Unless otherwise noted, all data is with AV = +2,

RF = RG = 604Ω, VS = 3.3V, VOUT = VS/2, SD tied to V+, RL = 150Ω to V−, T = 25°C.

Frequency Response for Various Output Amplitudes

20136413

Frequency Response for Various Output Amplitudes

20136414

Frequency Response for Various Output Amplitudes

20136415

−3 dB BW vs. Supply Voltage for Various Output Swings

20136420

Non-inverting Frequency Response for Various Gain

20136416

Inverting Frequency Response for Various Gain

20136417

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LMH6601/LMH6601Q

Frequency Response for Various Loads

20136419

Frequency Response for Various Supply Voltages

20136421

−3 dB BW vs. Ambient Temperature

20136422

Frequency Response for Various Cap Load

20136418

Frequency Response for Various Supply Voltage

20136441

Max Output Swing vs. Frequency

20136426

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LMH6601/LMH6601Q

Peak Output Swing vs. RL

20136427

Output Swing vs. Sink Current for Various Supply Voltages

20136464

Output Swing vs. Source Current for Various Supply

Voltages

20136465

HD2 vs. Frequency

20136404

HD3 vs. Frequency

20136405

THD vs. Output Swing

20136402

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LMH6601/LMH6601Q

THD vs. Output Swing

20136403

Slew Rate vs. Ambient Temperature

20136423

Settling Time (±1%) vs. Output Swing

20136411

Output Settling

20136412

Isolation Resistor & Settling Time vs. CL

20136428

Isolation Resistor & Settling Time vs. CL

20136429

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LMH6601/LMH6601Q

Closed Loop Output Impedance vs. Frequency for Various

Supply Voltages

20136410

Off Isolation vs. Frequency

20136408

Noise Voltage vs. Frequency

20136424

Open Loop Gain/ Phase

20136435

CMRR vs. Frequency

20136425

+PSRR vs. Frequency

20136439

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LMH6601/LMH6601Q

−PSRR vs. Frequency

20136440

Supply Current vs. Ambient Temperature

20136433

Supply Current vs. VCM

20136437

Supply Current vs. Supply Voltage

20136467

Offset Voltage vs. Ambient Temperature

for 3 Representative Units

20136434

Offset Voltage Distribution

20136436

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LMH6601/LMH6601Q

Offset Voltage vs. VCM (Typical Part)

20136438

Input Bias Current vs. Common Mode Voltage

20136442

Small Signal Step Response

20136431

Large Signal Step Response

20136430

Large Signal Step Response

20136432

Turn On/Off Waveform

20136466

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LMH6601/LMH6601Q

DG vs. VOUT for Various VS

20136471

DP vs. VOUT for Various VS

20136472

DG vs. VOUT (DC and AC Coupled Load Compared)

20136473

DP vs. VOUT (DC and AC Coupled Load Compared)

20136474

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LMH6601/LMH6601Q

Application Information

OPTIMIZING PERFORMANCE

With many op amps, additional device non-linearity and

sometimes less loop stability arises when the output has to

switch from current-source mode to current-sink mode or vice

versa. When it comes to achieving the lowest distortion and

the best Differential Gain/ Differential Phase (DG/ DP, broad-

cast video specs), the LMH6601 is optimized for single supply

DC coupled output applications where the load current is re-

turned to the negative rail (V−). That is where the output stage

is most linear (lowest distortion) and which corresponds to

unipolar current flowing out of this device. To that effect, it is

easy to see that the distortion specifications improve when

the output is only sourcing current which is the distortion-op-

timized mode of operation for the LMH6601. In application

where the LMH6601 output is AC coupled or when it is pow-

ered by separate dual supplies for V+ and V−, the output stage

supplies both source and sink current to the load and results

in less than optimum distortion (and DG/DP). Figure 1 com-

pares the distortion results between a DC and an AC coupled

load to show the magnitude of this difference. See the DG/DP

plots in the Typical Performance Characteristics section for a

comparison between DC and AC coupling of the video load.

20136406

FIGURE 1. Distortion Comparison between DC & AC

Coupling of the Load

In certain applications, it may be possible to optimize the

LMH6601 for best distortion (and DG/DP) even though the

load may require bipolar output current by adding a pull-down

resistor to the output. Adding an output pull-down resistance

of appropriate value could change the LMH6601 output load-

ing into source-only. This comes at the price of higher total

power dissipation and increased output current requirement.

Figure 2 shows how to calculate the pull-down resistor value

for both the dual supply and for the AC coupled load applica-

tions.

20136470

FIGURE 2. Output Pull-Down Value for Dual Supply & AC

Coupling

Furthermore, with a combination of low closed loop gain set-

ting (i.e. AV = +1 for example where device bandwidth is the

highest), light output loading (RL > 1 kΩ) , and with a signifi-

cant capacitive load (CL > 10 pF) , the LMH6601 is most stable

if output sink current is kept to less than about 5 mA. The pull-

down method described in Figure 2 is applicable in these

cases as well where the current that would normally be sunk

by the op amp is diverted to the RP path instead.

SHUTDOWN CAPABILITY AND TURN ON/ OFF

BEHAVIOR

With the device in shutdown mode, the output goes into high

impedance (ROUT > 100 MΩ) mode. In this mode, the only

path between the inputs and the output pin is through the ex-

ternal components around the device. So, for applications

where there is active signal connection to the inverting input,

with the LMH6601 in shutdown, the output could show signal

swings due to current flow through these external compo-

nents. For non-inverting amplifiers in shutdown, no output

swings would occur, because of complete input-output isola-

tion, with the exception of capacitive coupling.

For maximum power saving, the LMH6601 supply current

drops to around 0.1 μA in shutdown. All significant power

consumption within the device is disabled for this purpose.

Because of this, the LMH6601 turn on time is measured in

micro-seconds whereas its turn off is fast (nano-seconds) as

would be expected from a high speed device like this.

The LMH6601 SD pin is a CMOS compatible input with a pico-

ampere range input current drive requirement. This pin needs

to be tied to a level or otherwise the device state would be

indeterminate. The device shutdown threshold is half way be-

tween the V+ and V− pin potentials at any supply voltage. For

example, with V+ tied to 10V and V− equal to 5V, you can

expect the threshold to be at 7.5V. The state of the device

(shutdown or normal operation) is guaranteed over tempera-

ture as longs as the SD pin is held to within 10% of the total

supply voltage.

For V+ = 10V, V− = 5V, as an example:

•Shutdown Range 5V ≤ SD ≤ 5.5V

•Normal Operation Range 9.5V ≤ SD ≤ 10V

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LMH6601/LMH6601Q

OVERLOAD RECOVERY AND SWING CLOSE TO RAILS

The LMH6601 can recover from an output overload in less

than 20 ns. See Figure 3 below for the input and output scope

photos:

20136407

FIGURE 3. LMH6601 Output Overload Recovery

Waveform

In Figure 3, the input step function is set so that the output is

driven to one rail and then the other and then the output re-

covery is measured from the time the input crosses 0V to

when the output reaches this point.

Also, when the LMH6601 input voltage range is exceeded

near the V+ rail, the output does not experience output phase

reversal, as some op amps do. This is particularly advanta-

geous in applications where output phase reversal has to be

avoided at all costs, such as in servo loop control among oth-

ers. This adds to the LMH6601’s set of features which make

this device easy to use.

In addition, the LMH6601’s output swing close to either rail is

well-behaved as can be seen in the scope photo of Figure 4.

20136443

FIGURE 4. LMH6601’s “Clean” Swing to Either Rail

With some op amps, when the output approaches either one

or both rails and saturation starts to set in, there is significant

increase in the transistor parasitic capacitances which leads

to loss of Phase Margin. That is why with these devices, there

are sometimes hints of instability with output close to the rails.

With the LMH6601, as can be seen in Figure 4, the output

waveform remains free of instability throughout its range of

voltages.

SINGLE SUPPLY VIDEO APPLICATION

The LMH6601’s high speed and fast slew rate make it an ideal

choice for video amplifier and buffering applications. There

are cost benefits in having a single operating supply. Single

supply video systems can take advantage of the LMH6601’s

low supply voltage operation along with its ability to operate

with input common mode voltages at or slightly below the V

− rail. Additional cost savings can be achieved by eliminating

or reducing the value of the input and output AC coupling ca-

pacitors commonly employed in single supply video applica-

tions. This Application section shows some circuit techniques

used to help in doing just that.

DC COUPLED, SINGLE SUPPLY BASEBAND VIDEO

AMPLIFIER/DRIVER

The LMH6601 output can swing very close to either rail to

maximize the output dynamic range which is of particular in-

terest when operating in a low voltage single supply environ-

ment. Under light output load conditions, the output can swing

as close as a few milli-volts of either rail. This also allows a

video amplifier to preserve the video black level for excellent

video integrity. In the example shown below in Figure 5, the

baseband video output is amplified and buffered by the

LMH6601 which then drives the 75Ω back terminated video

cable for an overall gain of +1 delivered to the 75Ω load. The

input video would normally have a level between 0V to ap-

proximately 0.75V.

20136444

FIGURE 5. Single Supply Video Driver Capable of

Maintaining Accurate Video Black Level

www.national.com 18

LMH6601/LMH6601Q

With the LMH6601 input common mode range including the

V− (ground) rail, there will be no need for AC coupling or level

shifting and the input can directly drive the non-inverting input

which has the additional advantage of high amplifier input

impedance. With LMH6601’s wide rail-to-rail output swing, as

stated earlier, the video black level of 0V is maintained at the

load with minimal circuit complexity and using no AC coupling

capacitors. Without true rail-to-rail output swing of the

LMH6601, and more importantly without the LMH6601’s abil-

ity of exceedingly close swing to V−, the circuit would not

operate properly as shown at the expense of more complex-

ity. This circuit will also work for higher input voltages. The

only significant requirement is that there is at least 1.8V from

the maximum input voltage to the positive supply (V+).

The Composite Video Output of some low cost consumer

video equipment consists of a current source which develops

the video waveform across a load resistor (usually 75Ω), as

shown in Figure 6 below. With these applications, the same

circuit configuration just described and shown in Figure 6 will

be able to buffer and drive the Composite Video waveform

which includes sync and video combined. However, with this

arrangement, the LMH6601 supply voltage needs to be at

least 3.3V or higher in order to allow proper input common

mode voltage headroom because the input can be as high as

1V peak.

20136445

FIGURE 6. Single Supply Composite Video Driver for

Consumer Video Outputs

If the “Video In” signal is Composite Video with negative going

Sync tip, a variation of the previous configurations should be

used. This circuit produces a unipolar (above 0V) DC coupled

single supply video signal as shown in Figure 7.

20136446

FIGURE 7. Single Supply DC Coupled Composite Video

Driver for Negative Going Sync Tip

In the circuit of Figure 7, the input is shifted positive by means

of R1, R2, and RT in order to satisfy U1’s Common Mode input

range. The signal will loose 20% of its amplitude in the pro-

cess. The closed loop gain of U1 will need to be set to make

up for this 20% loss in amplitude. This gives rise to the gain

expression shown below which is based on a getting a 2

VPP output with a 0.8 VPP input:

(1)

R3 will produce a negative shift at the output due to VS (3.3V

in this case). R3 will need to be set so that the “Video In” sync

tip (−0.3V at RT or 0.61V at U1 non-inverting input) corre-

sponds to near 0V at the output.

(2)

Equation 1 and Equation 2 need to be solved simultaneously

to arrive at the values of R3, RF, and RG which will satisfy both.

From the datasheet, one can set RF = 620Ω to be close to the

recommended value for a gain of +2. It is easier to solve for

RG and R3 by starting with a good estimate for one and iter-

atively solving Equation and Equation 2 to arrive at the results.

Here is one possible iteration cycle for reference:

RF = 620Ω

19 www.national.com

LMH6601/LMH6601Q

TABLE 1. Finding Figure 7 External Resistor Values by Iteration

Estimate

RG (Ω)

Calculated

(from Equation 2)

R3 (Ω)

Equation 1 LHS

Calculated

Comment

(Compare Equation 1 LHS Calculated to RHS)

1k 1.69k 0.988 Increase Equation 1 LHS by reducing RG

820 1.56k 1.15 Increase Equation 1 LHS by reducing RG

620 1.37k 1.45 Increase Equation 1 LHS by reducing RG

390 239 4.18 Reduce Equation 1 LHS by increasing RG

560 1.30k 1.59 Close to target value of 1.5V/V for Equation 1

The final set of values for RG and R3 in Table 1 are values

which will result in the proper gain and correct video levels

(0V to 1V) at the output (VLOAD).

AC COUPLED VIDEO

Many monitors and displays accept AC coupled inputs. This

simplifies the amplification and buffering task in some re-

spects. As can be seen in Figure 8, R1 and R2 simply set the

input to the center of the input linear range while CIN AC cou-

ples the video onto the op amp’s input. The op amp is set for

a closed loop gain of 2 with RF and RG. CG is there to make

sure the device output is also biased at mid-supply. Because

of the DC bias at the output, the load needs to be AC coupled

as well through CO. Some applications implement a small

valued ceramic capacitor (not shown) in parallel with CO

which is electrolytic. The reason for this is that the ceramic

capacitor will tend to shunt the inductive behavior of the Elec-

trolytic capacitor at higher frequencies for an improved overall

low impedance output.

CG2 is intended to boost the high frequency gain in order to

improve the video frequency response. This value is to be set

and trimmed on the board to meet the application’s specific

system requirements.

20136449

FIGURE 8. AC Coupled Video Amplifier/Driver

SAG COMPENSATION

The capacitors shown in Figure 8 (except CG2), and especially

CO, are the large electrolytic type which are considerably

costly and take up valuable real estate on the board. It is pos-

sible to reduce the value of the output coupling capacitor,

CO, which is the largest of all, by using what is called SAG

compensation. SAG refers to what the output video experi-

ences due to the low frequency video content it contains

which cannot adequately go through the output AC coupling

scheme due to the low frequency limit of this circuit. The −3

dB low frequency limit of the output circuit is given by:

f_low_frequency (−3 dB)= 1/ (2*pi* 75*2(Ω) * CO)

= ∼ 4.82 Hz For CO = 220 μF (3)

A possible implementation of the SAG compensation is

shown in Figure 9.

www.national.com 20

LMH6601/LMH6601Q

20136450

FIGURE 9. AC Coupled Video Amplifier/Driver with SAG Compensation

In this circuit, the output coupling capacitor value and size is

reduced at the expense of a slightly more complicated cir-

cuitry. Note that C1 is not only part of the SAG compensation,

but it also sets the amplifier’s DC gain to 0 dB so that the

output is set to mid-rail for linearity purposes. Also note that

exceptionally high values are chosen for the R1 and R2 bi-

asing resistors (510 kΩ). The LMH6601 has extremely low

input bias current which allows this selection thereby reducing

the CIN value in this circuit such that CIN can even be a non-

polar capacitors which will reduce cost.

At high enough frequencies where both CO and C1 can be

considered to be shorted out, R3 shunts R4 and the closed

loop gain is determined by:

Closed_loop_Gain (V/V)= VL/VIN = (1+ (R3||R4)/ R5)x

[RL/(RL+RO)]= 0.99V/V (4)

At intermediate frequencies, where the CO, RO, RL path ex-

periences low frequency gain loss, the R3, R5, C1 path pro-

vides feedback from the load side of CO. With the load side

gain reduced at these lower frequencies, the feedback to the

op amp inverting node reduces, causing an increase at the

op amp's output as a response.

For NTSC video, low values of CO influence how much video

black level shift occurs during the vertical blanking interval

(∼1.5 ms) which has no video activity and thus is sensitive to

CO's charge dissipation through the load which could cause

output SAG. An especially tough pattern is the NTSC pattern

called “Pulse & Bar.” With this pattern the entire top and bot-

tom portion of the field is black level video where, for about

11 ms, CO is discharging through the load with no video ac-

tivity to replenish that charge.

Figure 10 shows the output of the Figure 9 circuit highlighting

the SAG.

20136451

FIGURE 10. Figure 9 Scope Photo Showing Video SAG

With the circuit of Figure 9 and any other AC coupled pulse

amplifier, the waveform duty cycle variations exert additional

restrictions on voltage swing at any node. This is illustrated in

the waveforms shown in Figure 11.

21 www.national.com

LMH6601/LMH6601Q

20136452

FIGURE 11. Headroom Considerations with AC Coupled Amplifiers

If a stage has a 3 VPP unclipped swing capability available at

a given node, as shown in Figure 11, the maximum allowable

amplitude for an arbitrary waveform is ½ of 3V or 1.5 VPP. This

is due to the shift in the average value of the waveform as the

duty cycle varies. Figure 11 shows what would happen if a

2 VPP signal were applied. A low duty cycle waveform, such

as the one in Figure 11B, would have high positive excur-

sions. At low enough duty cycles, the waveform could get

clipped on the top, as shown, or a more subtle loss of linearity

could occur prior to full-blown clipping. The converse of this

occurs with high duty cycle waveforms and negative clipping,

as depicted in Figure 11C.

HOW TO PICK THE RIGHT VIDEO AMPLIFIER

Apart from output current drive and voltage swing, the op amp

used for a video amplifier/cable driver should also possess

the minimum requirement for speed and slew rate. For video

type loads, it is best to consider Large Signal Bandwidth (or

LSBW in the National Semiconductor data sheet tables) as

video signals could be as large as 2 VPP when applied to the

commonly used gain of +2 configuration. Because of this rel-

atively large swing, the op amp Slew Rate (SR) limitation

should also be considered. Table 2 shows these require-

ments for various video line rates calculated using a rudimen-

tary technique and intended as a first order estimate only.

TABLE 2. Rise Time, −3 dB BW, and Slew Rate Requirements for Various Video Line Rates

Video

Standard

Line Rate

(HxV)

Refresh Rate

(Hz)

Horizontal

Active (KH%)

Vertical

Active (KV%)

Pixel Time

(ns)

Rise Time

(ns)

LSBW

(MHz)

(V/μs)

TV_NTSC 451x483 30 84 92 118.3 39.4 9 41

VGA 640x480 75 80 95 33.0 11.0 32 146

SVGA 800x600 75 76 96 20.3 6.8 52 237

XGA 1024x768 75 77 95 12.4 4.1 85 387

SXGA 1280x1024 75 75 96 7.3 2.4 143 655

UXGA 1600x1200 75 74 96 4.9 1.6 213 973

www.national.com 22

LMH6601/LMH6601Q

For any video line rate (HxV corresponding to the number of

Active horizontal and vertical lines), the speed requirements

can be estimated if the Horizontal Active (KH%) and Vertical

Active (KV%) numbers are known. These percentages cor-

respond to the percentages of the active number of lines

(horizontal or vertical) to the total number of lines as set by

VESA standards. Here are the general expressions and the

specific calculations for the SVGA line rate shown in Table

(5)

Requiring that an “On” pixel is illuminated to at least 90% of

its final value before changing state will result in the rise/fall

time equal to, at most, ⅓ the pixel time as shown below:

(6)

Assuming a single pole frequency response roll-off charac-

teristic for the closed loop amplifier used, we have:

(7)

Rise/Fall times are 10%-90% transition times, which for a 2

VPP video step would correspond to a total voltage shift of

1.6V (80% of 2V). So, the Slew Rate requirement can be cal-

culated as follows:

(8)

The LMH6601 specifications show that it would be a suitable

choice for video amplifiers up to and including the SVGA line

rate as demonstrated above.

For more information about this topic and others relating to

video amplifiers, please see Application Note 1013:

http://www.national.com/an/AN/AN-1013.pdf#page=1

CURRENT TO VOLTAGE CONVERSION

(TRANSIMPEDANCE AMPLIFIER (TIA))

Being capable of high speed and having ultra low input bias

current makes the LMH6601 a natural choice for Current to

Voltage applications such as photodiode I-V conversion. In

these type of applications, as shown in Figure 12 below, the

photodiode is tied to the inverting input of the amplifier with

RF set to the proper gain (gain is measured in Ohms).

20136458

FIGURE 12. Typical Connection of a Photodiode Detector

to an op amp

With the LMH6601 input bias current in the femto-amperes

range, even large values of gain (RF) do not increase the out-

put error term appreciably. This allows circuit operation to a

lower light intensity level which is always of special impor-

tance in these applications. Most photo-diodes have a rela-

tively large capacitance (CD) which would be even larger for

a photo-diode designed for higher sensitivity to light because

of its larger area. Some applications may run the photodiode

with a reverse bias in order to reduce its capacitance with the

disadvantage of increased contributions from both dark cur-

rent and noise current. Figure 13 shows a typical photodiode

capacitance plot vs. reverse bias for reference.

20136459

FIGURE 13. Typical Capacitance vs. Reverse Bias

(Source: OSI Optoelectronics)

23 www.national.com

LMH6601/LMH6601Q

The diode capacitance (CD) along with the input capacitance

of the LMH6601 (CA) has a bearing on the stability of this cir-

cuit and how it is compensated. With large transimpedance

gain values (RF), the total combined capacitance on the am-

plifier inverting input (CIN = CD + CA) will work against RF to

create a zero in the Noise Gain (NG) function (see Figure

14). If left untreated, at higher frequencies where NG equals

the open loop transfer function there will be excess phase shift

around the loop (approaching 180°) and therefore, the circuit

could be unstable. This is illustrated in Figure 14.

20136460

FIGURE 14. Transimpedance Amplifier Graphical

Stability Analysis and Compensation

Figure 14 shows that placing a capacitor, CF, with the proper

value, across RF will create a pole in the NG function at fP.

For optimum performance, this capacitor is usually picked so

that NG is equal to the op amp's open loop gain at fP. This will

cause a “flattening” of the NG slope beyond the point of in-

tercept of the two plots (open loop gain and NG) and will

results in a Phase Margin (PM) of 45° assuming fP and fZ are

at least a decade apart. This is because at the point of inter-

cept, the NG pole at fP will have a 45° phase lead contribution

which leaves 45° of PM. For reference, Figure 14 also shows

the transimpedance gain (I-V (Ω))

Here is the theoretical expression for the optimum CF value

and the expected −3 dB bandwidth:

(9)

(10)

Table 3, below, lists the results, along with the assumptions

and conditions, of testing the LMH6601 with various photodi-

odes having different capacitances (CD) at a transimpedance

gain (RF) of 10 kΩ.

TABLE 3. Transimpedance Amplifier Figure 12 Compensation and Performance Results

(pF)

CIN

(pF)

CF_Calculated

(pF)

CF used

(pF)

−3 dB BW

Calculated (MHz)

−3 dB BW

Measured (MHz)

Step Response

Overshoot (%)

10 12 1.1 1 14 15 6

50 52 2.3 3 7 7.0 4

500 502 7.2 8 2 2.5 9

CA = 2 pF

GBWP = 155 MHz

VS = 5V

www.national.com 24

LMH6601/LMH6601Q

TRANSIMPEDANCE AMPLIFIER NOISE

CONSIDERATIONS

When analyzing the noise at the output of the I-V converter,

it is important to note that the various noise sources (i.e. op

amp noise voltage, feedback resistor thermal noise, input

noise current, photodiode noise current) do not all operate

over the same frequency band. Therefore, when the noise at

the output is calculated, this should be taken into account.

The op amp noise voltage will be gained up in the region be-

tween the noise gain’s “zero” and its “pole” (fz and fp in Figure

14). The higher the values of RF and CIN, the sooner the noise

gain peaking starts and therefore its contribution to the total

output noise would be larger. It is obvious to note that it is

advantageous to minimize CIN (e.g. by proper choice of op

amp, by applying a reverse bias across the diode at the ex-

pense of excess dark current and noise). However, most low

noise op amps have a higher input capacitance compared to

ordinary op amps. This is due to the low noise op amp’s larger

input stage.

OTHER APPLICATIONS

20136463

FIGURE 15. Charge Preamplifier Taking Advantage of

LMH6601’s Femto-Ampere Range Input Bias Current

CAPACITIVE LOAD

The LMH6601 can drive a capacitive load of up to 1000 pF

with correct isolation and compensation. Figure 16 illustrates

the in-loop compensation technique to drive a large capacitive

load.

20136468

FIGURE 16. In-Loop Compensation Circuit for Driving a

Heavy Capacitive Load

When driving a high capacitive load, an isolation resistor

(RS) should be connected in series between the op amp out-

put and the capacitive load to provide isolation and to avoid

oscillations. A small value capacitor (CF) is inserted between

the op amp output and the inverting input as shown such that

this capacitor becomes the dominant feedback path at higher

frequency. Together these components allow heavy capaci-

tive loading while keeping the loop stable.

There are few factors which affect the driving capability of the

op amp:

•Op amp internal architecture

•Closed loop gain and output capacitor loading

Table 4 shows the measured step response for various values

of load capacitors (CL), series resistor (RS) and feedback re-

sistor (CF) with gain of +2 (RF = RG = 604Ω) and RL = 2 kΩ:

TABLE 4. LMH6601 Step Response Summary for the

Circuit of Figure 16

(pF)

(Ω)

(pF)

trise/ tfall

(ns)

Overshoot

(%)

10 0 1 6* 8

50 0 1 7* 6

110 47 1 10 16

300 6 10 12 20

500 80 10 33 10

910 192 10 65 10

* Response limited by input step generator rise time of 5 ns

Figure 17 shows the increase in rise/fall time (bandwidth de-

crease) at VOUT with larger capacitive loads, illustrating the

trade-off between the two:

25 www.national.com

LMH6601/LMH6601Q

20136469

FIGURE 17. LMH6601 In-Loop Compensation Response

EVALUATION BOARD

National Semiconductor provides the following evaluation

board as a guide for high frequency layout and as an aid in

device testing and characterization. Many of the datasheet

plots were measured with this board:

Device Package Board Part #

LMH6601MG SC70-6 LMH730165

This evaluation board can be shipped when a device sample

request is placed with National Semiconductor.

www.national.com 26

LMH6601/LMH6601Q

Physical Dimensions inches (millimeters) unless otherwise noted

6-Pin SC70

NS Package Number MA006A

27 www.national.com

LMH6601/LMH6601Q

Notes

LMH6601/LMH6601Q 250 MHz, 2.4V CMOS Operational Amplifier with Shutdown

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