DATASHEET EL7202, EL7212, EL7222 FN7282 Rev.2.01 Feb 18, 2020 High Speed, Dual Channel Power MOSFET Drivers The EL7202, EL7212, EL7222 ICs are matched dual-drivers that improve the operation of the industry standard DS0026 clock drivers. The Elantec versions are very high speed drivers capable of delivering peak currents of 2.0 amps into highly capacitive loads. The high speed performance is achieved by means of a proprietary "Turbo-Driver" circuit that speeds up input stages by tapping the wider voltage swing at the output. Improved speed and drive capability are enhanced by matched rise and fall delay times. These matched delays maintain the integrity of input-to-output pulse-widths to reduce timing errors and clock skew problems. This improved performance is accompanied by a 10 fold reduction in supply currents over bipolar drivers, yet without the delay time problems commonly associated with CMOS devices. Dynamic switching losses are minimized with non-overlapped drive techniques. Pinouts EL7222 (8-PIN PDIP, SO) TOP VIEW EL7212 (8-PIN PDIP, SO) TOP VIEW Features * Industry standard driver replacement * Improved response times * Matched rise and fall times * Reduced clock skew * Low output impedance * Low input capacitance * High noise immunity * Improved clocking rate * Low supply current * Wide operating voltage range * Pb-Free available (RoHS compliant) Applications * Clock/line drivers * CCD Drivers * Ultra-sound transducer drivers * Power MOSFET drivers * Switch mode power supplies * Class D switching amplifiers INVERTING DRIVERS COMPLEMENTARY DRIVERS * Ultrasonic and RF generators * Pulsed circuits EL7202 (8-PIN PDIP, SO) TOP VIEW NON-INVERTING DRIVERS Manufactured under U.S. Patent Nos. 5,334,883, #5,341,047 FN7282 Rev.2.01 Feb 18, 2020 Page 1 of 11 EL7202, EL7212, EL7222 Ordering Information Part Number PART MARKING TAPE & REEL PACKAGE PKG. DWG. # EL7202CN (No longer available, recommended replacement: EL7202CSZ) EL7202CN - 8 Ld PDIP E8.3 EL7202CSZ (See Note) 7202CSZ - 8 Ld SOIC (Pb-free) M8.15E EL7202CSZ-T7 (See Note) 7202CSZ 7" 8 Ld SOIC (Pb-free) M8.15E EL7202CSZ-T13 (See Note) 7202CSZ 13" 8 Ld SOIC (Pb-free) M8.15E EL7212CNZ EL7212CN Z - 8 Ld PDIP* (Pb-free) E8.3 EL7212CSZ (See Note) 7212CSZ - 8 Ld SOIC (Pb-free) M8.15E EL7212CSZ-T7 (See Note) 7212CSZ 7" 8 Ld SOIC (Pb-free) M8.15E EL7212CSZ-T13 (See Note) 7212CSZ 13" 8 Ld SOIC (Pb-free) M8.15E EL7222CSZ (See Note) 7222CSZ - 8 Ld SOIC (Pb-free) M8.15E EL7222CSZ-T7 (See Note) 7222CSZ 7" 8 Ld SOIC (Pb-free) M8.15E EL7222CSZ-T13 (See Note) 7222CSZ 13" 8 Ld SOIC (Pb-free) M8.15E NOTE: Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. FN7282 Rev.2.01 Feb 18, 2020 Page 2 of 11 EL7202, EL7212, EL7222 Absolute Maximum Ratings (TA = 25C) Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 125C Power Dissipation SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .570mW PDIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1050mW Supply (V+ to Gnd) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5V Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V above V+ Combined Peak Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . .4A Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40C to +85C CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA DC Electrical Specifications parameter TA = 25C, V = 15V unless otherwise specified Description Test Conditions Min Typ Max Units INPUT VIH Logic "1" Input Voltage IIH Logic "1" Input Current VIL Logic "0" Input Voltage IIL Logic "0" Input Current VHVS Input Hysteresis 2.4 @V+ V 0.1 @0V 0.1 10 A 0.8 V 10 A 0.3 V OUTPUT ROH Pull-Up Resistance IOUT = -100mA 3 6 ROL Pull-Down Resistance IOUT = +100mA 4 6 IPK Peak Output Current Source Sink 2 2 IDC Continuous Output Current Source/Sink IS Power Supply Current Inputs High/EL7202 Inputs High/EL7212 Inputs High/EL7222 VS Operating Voltage A 100 mA POWER SUPPLY AC Electrical Specifications parameter 7.5 2.5 5.0 mA 15 V Typ Max Units CL = 500pF CL = 1000pF 7.5 10 20 CL = 500pF CL = 1000pF 10 13 20 4.5 1 2.5 4.5 TA = 25C, V = 15V unless otherwise specified Description Test Conditions Min SWITCHING CHARACTERISTICS tR Rise Time tF Fall Time tD1 Turn-On Delay Time See Timing Table 18 25 ns tD2 Turn-Off Delay Time See Timing Table 20 25 ns FN7282 Rev.2.01 Feb 18, 2020 ns ns Page 3 of 11 EL7202, EL7212, EL7222 Timing Table Standard Test Configuration Simplified Schematic FN7282 Rev.2.01 Feb 18, 2020 Page 4 of 11 EL7202, EL7212, EL7222 Typical Performance Curves MAX POWER/DERATING CURVES INPUT CURRENT vs VOLTAGE QUIESCENT SUPPLY CURRENT FN7282 Rev.2.01 Feb 18, 2020 SWITCH THRESHOLD vs SUPPLY VOLTAGE PEAK DRIVE vs SUPPLY VOLTAGE "ON" RESISTANCE vs SUPPLY VOLTAGE Page 5 of 11 EL7202, EL7212, EL7222 Typical Performance Curves (Continued) AVERAGE SUPPLY CURRENT vs VOLTAGE AND FREQUENCY AVERAGE SUPPLY CURRENT vs CAPACITIVE LOAD RISE/FALL TIME vs LOAD RISE/FALL TIME vs SUPPLY VOLTAGE PROPAGATION DELAY vs SUPPLY VOLTAGE RISE/FALL TIME vs TEMPERATURE DELAY vs TEMPERATURE FN7282 Rev.2.01 Feb 18, 2020 Page 6 of 11 EL7202, EL7212, EL7222 EL7212 Macro Model **** EL7212 model **** * input * | gnd * | | Vsupply * | | | Vout .subckt M7212 2 3 6 7 V1 12 3 1.6 R1 13 15 1k R2 14 15 5k R5 11 12 100 C1 15 3 43.3 pF D1 14 13 dmod X1 13 11 2 3 comp1 X2 16 12 15 3 comp1 sp 6 7 16 3 spmod sn 7 3 16 3 snmod g1 11 0 13 0 938 .model dmod d .model spmod vswitch ron3 roff2meg von1 voff1.5 .model snmod vswitch ron4 roff2meg von3 voff2 .ends M7212 .subckt comp1 out inp inm vss e1 out vss table { (v(inp) v(inm))* 5000} (0,0) (3.2,3.2) Rout out vss 10meg Rinp inp vss 10meg Rinm inm vss 10meg .ends comp1 FN7282 Rev.2.01 Feb 18, 2020 Page 7 of 11 EL7202, EL7212, EL7222 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please visit our website to make sure you have the latest revision. DATE REVISION Feb 18, 2020 2.01 FN7282 Rev.2.01 Feb 18, 2020 CHANGE Updated ordering information table. Added Revision History Replaced POD MDP0031 with E8.3 POD. Replaced POD MDP0027 with M8.15E POD. Updated disclaimer Page 8 of 11 EL7202, EL7212, EL7222 Package Outline Drawings E8.3 (JEDEC MS-001-BA ISSUE D) N 8 LEAD DUAL-IN-LINE PLASTIC PACKAGE (PDIP) E1 INDEX AREA 1 2 3 INCHES N/2 -B- -AD E BASE PLANE -C- SEATING PLANE A2 A L D1 e B1 D1 B 0.010 (0.25) M A1 eC C A B S MILLIMETERS SYMBOL MIN MAX MIN A - 0.210 - A1 0.015 - 0.39 A2 0.115 0.195 2.93 MAX 5.33 NOTES 4 - 4 4.95 - B 0.014 0.022 0.356 0.558 - C L B1 0.045 0.070 1.15 1.77 8, 10 eA C 0.008 0.014 0.204 C D 0.355 0.400 9.01 eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 0.005 - 0.13 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC eA 0.300 BSC 3. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication No. 95. eB - L 0.115 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . N 0.430 0.150 8 - 5 D1 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 0.355 10.16 5 2.54 BSC - 7.62 BSC 6 2.93 8 10.92 7 3.81 4 9 Rev. 0 12/93 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). FN7282 Rev.2.01 Feb 18, 2020 Page 9 of 11 EL7202, EL7212, EL7222 M8.15E 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 0, 08/09 4 4.90 0.10 A DETAIL "A" 0.22 0.03 B 6.0 0.20 3.90 0.10 4 PIN NO.1 ID MARK 5 (0.35) x 45 4 4 0.43 0.076 1.27 0.25 M C A B SIDE VIEW "B" TOP VIEW 1.75 MAX 1.45 0.1 0.25 GAUGE PLANE C SEATING PLANE 0.10 C 0.175 0.075 SIDE VIEW "A 0.63 0.23 DETAIL "A" (1.27) (0.60) NOTES: (1.50) (5.40) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal 0.05 4. Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. 5. The pin #1 identifier may be either a mold or mark feature. 6. Reference to JEDEC MS-012. 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