1
®
INA145
®
INA145
©1999 Burr-Brown Corporation PDS-1567B Printed in U.S.A. March, 2000
Programmable Gain
DIFFERENCE AMPLIFIER
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
For most current data sheet and other product
information, visit www.burr-brown.com
DESCRIPTION
The INA145 is a precision, unity-gain difference
amplifier consisting of a precision op amp and on-
chip precision resistor network. Two external resistors
set the gain from 1V/V to 1000V/V. The input com-
mon-mode voltage range extends beyond the positive
and negative rails.
On-chip precision resistors are laser-trimmed to achieve
accurate gain and high common-mode rejection. Ex-
cellent TCR tracking of these resistors assures contin-
ued high precision over temperature.
The INA145 is available in the SO-8 surface-mount
package specified for the extended industrial tempera-
ture range, –40°C to +85°C.
FEATURES
●DIFFERENTIAL GAIN = 1V/V TO 1000V/V:
Set with External Resistors
●LOW QUIESCENT CURRENT: 570µA
●WIDE SUPPLY RANGE:
Single Supply: 4.5V to 36V
Dual Supplies: ±2.25V to ±18V
●HIGH COMMON-MODE VOLTAGE:
+8V at VS = +5V
±28V at VS = ±15V
●LOW GAIN ERROR: 0.01%
●HIGH CMR: 86dB
●SO-8 PACKAGE
APPLICATIONS
●CURRENT SHUNT MEASUREMENTS
●SENSOR AMPLIFIER
●
DIFFERENTIAL LINE RECEIVER
●BATTERY POWERED SYSTEMS
INA145
R
5
10kΩ
(1%)
A1
V
IN
INA145
V
O
R
2
40kΩ
R
1
40kΩ
V
IN
R
3
40kΩR
4
40kΩ
R
G1
R
G
R
G2
A2
V
01
RefV–
V+
G = 1
+
–
2
5
7
418
6
3
V
O
= (V
IN
– V
IN
)(1 + R
G2
/R
G1
)
+–
SBOS120
2
®
INA145
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
INA145UA
PARAMETER CONDITION MIN TYP MAX UNITS
OFFSET VOLTAGE, VORTI(1, 2)
Input Offset Voltage VOS VCM = VO = 0V ±0.2 ±1mV
vs Temperature ∆VOS /∆T See Typical Curve
vs Power Supply PSRR VS = ±1.35V to ±18V ±20 ±60 µV/V
vs Time ±0.3 µV/mo
Offset Voltage, V01 RTI(1, 2) ±0.4 mV
INPUT VOLTAGE RANGE
Common-Mode Voltage Range VCM (VIN+) – (VIN–) = 0V, VO = 0V 2(V–) 2(V+) –2 V
Common-Mode Rejection CMRR VCM = 2(V–) to 2(V+) – 2V, RS = 0Ω76 86 dB
Over Temperature VS = ±15V 70 80 dB
INPUT BIAS CURRENT(2) VCM = VS/2
Bias Current IB±50 nA
Offset Current IOS ±5nA
INPUT IMPEDANCE
Differential (non-inverting input) 80 kΩ
Differential (inverting input) 27 kΩ
Common-Mode 40 kΩ
NOISE RTI(1, 3)
Voltage Noise, f = 0.1Hz to 10Hz 2µVp-p
Voltage Noise Density, f = 1kHz en90 nV/√Hz
GAIN
G = 1 to 1000
Gain Equation G = 1 + RG2/RG1 V/V
Initial(1) 1V/V
Gain Error RL = 100kΩ, VO = (V–)+0.15 to (V+)–1, G = 1 ±0.01 ±0.1 %
vs Temperature RL = 100kΩ, VO = (V–)+0.25 to (V+)–1, G = 1 ±2±10 ppm/°C
RL = 10kΩ, VO = (V–)+0.3 to (V+)–1.25, G = 1 ±0.01 ±0.1 %
vs Temperature RL = 10kΩ, VO = (V–)+0.5 to (V+)–1.25, G = 1 ±2±10 ppm/°C
Nonlinearity RL = 10kΩ, VO = (V–)+0.3 to (V+)–1.25, G = 1 ±0.0002 ±0.005 % of FS
FREQUENCY RESPONSE
Small Signal Bandwidth G = 1 500 kHz
G = 10 50 kHz
Slew Rate 0.45 V/µs
Settling Time, 0.1% G = 1, 10V Step 40 µs
0.01% G = 1, 10V Step 90 µs
Overload Recovery 50% Input Overload 40 µs
OUTPUT, VO
Voltage Output RL = 100kΩ, G = 1 (V–) + 0.15 (V+) – 1 V
Over Temperature RL = 100kΩ, G = 1 (V–) + 0.25 (V+) – 1 V
RL = 10kΩ, G = 1 (V–) + 0.3 (V+) – 1.25 V
Over Temperature RL = 10kΩ, G = 1 (V–) + 0.5 (V+) – 1.25 V
Short-Circuit Current Continuous to Common ±15 mA
Capacitive Load Stable Operation 1000 pF
POWER SUPPLY
Specified Voltage Range, Dual Supplies ±2.25 ±18 V
Operating Voltage Range ±1.35 ±18 V
Quiescent Current VIN = 0, IO = 0 ±570 ±700 µA
Over Temperature ±800 µA
TEMPERATURE RANGE
Specified Range –40 +85 °C
Operating Range –55 +125 °C
Storage Range –55 +125 °C
Thermal Resistance
θ
JA 150 °C/W
NOTES: (1) Referred to input pins (VIN+ and VIN–), Gain = 1V/V. Specified with 10kΩ in feedback of A2. (2) Input offset voltage specification includes effects of amplifier’s
input bias and offset currents. (3) Includes effects of input bias current noise and thermal noise contribution of resistor network.
SPECIFICATIONS: VS = ±2.25V to ±18V
Boldface limits apply over the specified temperature range, TA = –40°C to +85°C
At TA = +25°C, G = 1, RL = 10kΩ connected to ground and ref pin connected to ground unless otherwise noted.
3
®
INA145
INA145UA
PARAMETER CONDITION MIN TYP MAX UNITS
OFFSET VOLTAGE, VORTI(1, 2)
Input Offset Voltage VOS VCM = VO = 2.5V ±0.35 ±1mV
vs Temperature ∆VOS /∆T See Typical Curve
vs Power Supply Rejection Ratio PSRR VS = ±1.35V to ±18V ±20 ±60 µV/°C
vs Time ±0.3 µV/mo
Offset Voltage, V01 RTI(1, 2) ±0.55 mV
INPUT VOLTAGE RANGE
Common-Mode Voltage Range(3) VCM VIN+ – VIN– = 0V, VO = 2.5V –2.5 5.5 V
Common-Mode Rejection Ratio CMRR VCM = –2.5V to +5.5V, RS = 0Ω76 86 dB
Over Temperature 80 dB
INPUT BIAS CURRENT(2)
Bias Current IB±50 nA
Offset Current IOS ±5nA
INPUT IMPEDANCE
Differential (non-inverting input) 80 kΩ
Differential (inverting input) 27 kΩ
Common-Mode 40 kΩ
NOISE RTI(1, 4)
Voltage Noise, f = 0.1Hz to 10Hz 2µVp-p
Voltage Noise Density, f = 1kHz en90 nV/√Hz
GAIN
G = 1 to 1000
V/V
Gain Equation G = 1 + RG2 /RG1 V/V
Initial(1) 1V/V
Gain Error RL = 100kΩ, VO = 0.15V to 4V, G = 1 ±0.01 ±0.1 %
vs Temperature RL = 100kΩ, VO = 0.25V to 4V, G = 1 ±2±10 ppm/°C
RL = 10kΩ, VO = 0.3V to 3.75V, G = 1 ±0.01 ±0.1 %
vs Temperature RL = 10kΩ, VO = 0.5V to 3.75V, G = 1 ±2±10 ppm/°C
Nonlinearity RL = 10kΩ, VO = +0.3 to +3.75, G = 1 ±0.001 ±0.005 % of FS
FREQUENCY RESPONSE
Small Signal Bandwidth G = 0.1 500 kHz
G = 1 50 kHz
Slew Rate 0.45 V/µs
Settling Time, 0.1% G = 1, 10V Step 40 µs
0.01% G = 1, 10V Step 90 µs
Overload Recovery 50% Input Overload 40 µs
OUTPUT, VO
Voltage Output RL = 100kΩ, G = 1 0.15 4 V
Over Temperature RL = 100kΩ, G = 1 0.25 4 V
RL = 10kΩ, G = 1 0.3 3.75 V
Over Temperature RL = 10kΩ, G = 1 0.5 3.75 V
Short-Circuit Current Continuous to Common ±15 mA
Capacitive Load Stable Operation 1000 pF
POWER SUPPLY
Specified Voltage Range, Single Supply +4.5 +36 V
Operating Voltage Range +2.7 +36 V
Quiescent Current VIN = 0, IO = 0 550 700 µA
Over Temperature 800 µA
TEMPERATURE RANGE
Specified Range –40 +85 °C
Operating Range –55 +125 °C
Storage Range –55 +125 °C
Thermal Resistance
θ
JA 150 °C/W
NOTES: (1) Referred to input pins (VIN+ and VIN–), Gain = 1V/V. Specified with 10kΩ in feedback of A2. (2) Input offset voltage specification includes effects of
amplifier’s input bias and offset currents. (3) Common-mode voltage range with single supply is 2(V+) – 2V – VREF to –VREF. (4) Includes effects of input current
noise and thermal noise contribution of resistor network.
SPECIFICATIONS: VS = +5V Single Supply
Boldface limits apply over the specified temperature range, TA = –40°C to +85°C
At TA = +25°C, G = 1, RL = 10kΩ connected to ground and ref pin connected to 2.5V unless otherwise noted.
4
®
INA145
AMPLIFIER A1, A2 PERFORMANCE
Boldface limits apply over the specified temperature range, TA = –40°C to +85°C
At TA = +25°C, G = 1, RL = 10kΩ connected to ground and ref pin connected to ground unless otherwise noted.
PIN CONFIGURATION ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
Supply Voltage, V+ to V–.................................................................... 36V
Signal Input Terminals, Voltage ........................................................ ±80V
Current ....................................................... ±1mA
Output Short Circuit (to ground).............................................. Continuous
Operating Temperature ..................................................–55°C to +125°C
Storage Temperature .....................................................–55°C to +150°C
Junction Temperature.................................................................... +150°C
Lead Temperature (soldering, 10s)............................................... +240°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
ABSOLUTE MAXIMUM RATINGS(1)
Top View SO-8
PACKAGE SPECIFIED
DRAWING TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE NUMBER RANGE MARKING NUMBER(1) MEDIA
INA145UA SO-8 182 –40°C to +85°C INA145UA INA145UA Rails
"""""INA145UA/2K5 Tape and Reel
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces
of “INA145UA/2K5” will get a single 2500-piece Tape and Reel.
PACKAGE/ORDERING INFORMATION
INA145UA
PARAMETER CONDITION MIN TYP MAX UNITS
OFFSET VOLTAGE, VORTI(1, 2)
Input Offset Voltage VOS VS = ±15V, VCM = VO = 0V ±0.5 mV
vs Temperature ∆VOS /∆T±1µV/°C
INPUT VOLTAGE RANGE
Common-Mode Voltage Range VCM VIN+ – VIN– = 0V, VO = 0V (V–) to (V+) –1 V
Common-Mode Rejection Ratio CMRR VCM = (V–) to (V+) –1 90 dB
OPEN-LOOP GAIN
Open Loop Gain AOL 110 dB
INPUT BIAS CURRENT(2)
Bias Current IB±50 nA
Offset Current IOS ±5nA
RESISTOR AT A1 OUTPUT, VO1
Initial 10 kΩ
Error ±0.2 %
Temperature Drift Coefficient ±50 ppm/°C
Ref
V
IN
V
IN
V–
–
+
V
O1
V+
V
O
R
G
1
2
3
4
8
7
6
5
5
®
INA145
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±15V, G = 1, RL = 10kΩ connected to ground and Ref pin connected to ground, unless otherwise noted.
0.1Hz to 10Hz VOLTAGE NOISE (RTI)
500ms/div
500nV/div
GAIN vs FREQUENCY
Frequency (Hz)
Voltage Gain (dB)
100 1K 10K 1M 10M
60
40
20
0
–20 100K
G = 100
G = 10
G = 1
V
S
= ±15V
C
L
= 200pF 10kΩ
COMMON-MODE REJECTION vs FREQUENCY
Frequency (Hz)
Common-Mode Rejection (dB)
10 100 1k 1M 10M
100
80
60
40
20
010k 100k
POWER SUPPLY REJECTION vs FREQUENCY
Frequency (Hz)
Power Supply Rejection (dB)
1 10 100 10k 100k
100
80
60
40
20
01k
PSR+
(V
S
= ±15V)
PSR–
(V
S
= ±15V)
PSR+
(V
S
= +5V)
INPUT VOLTAGE NOISE DENSITY
Frequency (Hz)
Input Voltage Noise (nV/√Hz
0.1 1 10 10k 100k
1k
100
10 100 1k
G = 1
G = 10
G = 100
GAIN vs FREQUENCY
Frequency (Hz)
Voltage Gain (dB)
100 1K 10K 1M 10M
60
40
20
0
–20 100K
G = 100
G = 1
G = 10
V
S
= ±15V
C
L
= 1000pF
6
®
INA145
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±15V, G = 1, RL = 10kΩ connected to ground and Ref pin connected to ground, unless otherwise noted.
QUIESCENT CURRENT AND
SHORT-CIRCUIT CURRENT vs TEMPERATURE
Temperature (°C)
I
Q
(µA)
–60 –40 0–20 80 100
I
SC
I
Q
120 140
670
650
630
610
590
570
550
530
510
490
470
I
SC
(mA)
20
18
16
14
12
10
8
6
4
2
0
20 6040
G = 1
SLEW RATE vs TEMPERATURE
Temperature (°C)
Sew Rate (V/µs)
–60 –40 0–20 80 100 120 140
0.6
0.55
0.5
0.45
0.4
0.35
0.3
0.25
0.2 20 6040
G = 1
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
Relative Frequency
Offset Voltage, RTI (mV)
–1
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
1
Typical Production
Distribution of
Packaged Units.
V
S
= ±2.25V
+25°C
MAXIMUM OUTPUT VOLTAGE SWING
vs OUTPUT CURRENT
15
10
5
0
–5
–10
–15 0246810121416
Output Current (mA)
Output Voltage Swing (V)
–55°C
–25°C
+25°C
+85°C
+125°C
+85°C
–55°C
+125°C
–25°C
SETTLING TIME vs LOAD CAPACITANCE
Load Capacitance (nF)
Settling Time (µs)
1 100
160
140
120
100
80
60
40
20
010
G = 1
0.01% G = 10
0.01%
G = 10
0.1%
G = 1
0.1%
GAIN AND PHASE vs FREQUENCY
Op Amp A1 and A2
Frequency (Hz)
Open-Loop Gain (dB)
Phase (°)
1 10 100 100k 1M
110
100
90
80
70
60
50
40
30
20
10
0
–10
–90
–135
–180
1k 10k
R
L
= 10kΩ || 200pF
R
L
= 1nF
Φ
G
7
®
INA145
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±15V, G = 1, RL = 10kΩ connected to ground and Ref pin connected to ground, unless otherwise noted.
SMALL-SIGNAL STEP RESPONSE
(G = 1, RL = 10kΩ, CL = 200pF)
5µs/div
50mV/div
SMALL-SIGNAL STEP RESPONSE
(G = 1, CL = 1000pF)
5µs/div
50mV/div
SMALL-SIGNAL STEP RESPONSE
(G = 10, CL = 1000pF)
5µs/div
50mV/div
LARGE-SIGNAL STEP RESPONSE
(G = 10, RL = 10kΩ, CL = 200pF)
50µs/div
5V/div
V
S
= ±15V
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
Relative Frequency
Offset Voltage, RTI (mV)
–1
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
1
Typical Production
Distribution of
Packaged Devices
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
Offset Voltage Drift, RTI (µV/°C)
–10
–9
–8
–7
–6
–5
–4
–3
–2
–1
0
1
2
3
4
5
6
7
8
9
10
20
15
10
5
0
V
S
= ±15V
Relative Frequency
8
®
INA145
APPLICATION INFORMATION
The INA145 is a programmable gain difference amplifier
consisting of a gain of 1 difference amplifier and a program-
mable-gain output buffer stage. Basic circuit connections are
shown in Figure 1. Power supply bypass capacitors should
be connected close to pins 4 and 7, as shown. The amplifier
is programmable in the range of G = 1 to G = 1000 with two
external resistors.
The output of A1 is connected to the noninverting input of
A2 through a 10kΩ resistor which is trimmed to ±1%
absolute accuracy. The A2 input is available for applications
such as a filter or a precision current source. See application
figures for examples.
OPERATING VOLTAGE
The INA145 is fully specified for supply voltages from
±2.25V to ±18V, with key parameters guaranteed over the
temperature range –40°C to +85°C. The INA145 can be
operated with single or dual supplies, with excellent perfor-
mance. Parameters that vary significantly with operating
voltage, load conditions, or temperature are shown in the
typical performance curves.
SETTING THE GAIN
The gain of the INA145 is set by using two external
resistors, RG1 and RG2, according to the equation:
G = 1 + RG2/RG1
For a total gain of 1, A2 is connected as a buffer amplifier
with no RG1. A feedback resistor, RG2 = 10kΩ, should be
used in the buffer connection. This provides bias current
cancellation (in combination with internal R5) to assure
specified offset voltage performance. Commonly used val-
ues are shown in the table of Figure 1. Resistor values for
other gains should be chosen to provide a 10kΩ parallel
resistance.
COMMON-MODE RANGE
The input resistors of the INA145 provides an input com-
mon-mode range that extends well beyond the power supply
rails. Exact range depends on the power supply voltage and
the voltage applied to the Ref terminal (pin 1). To assure
proper operation, the voltage at the non-inverting input of
A1 (an internal node) must be within its linear operating
range. Its voltage is determined by the simple 1:1 voltage
divider between pin 3 and pin 1. This voltage must be
between V– and (V+) – 1V.
FIGURE 1. Basic Circuit Connections.
A1
V
IN
INA145
V
O
R
2
40kΩ
R
1
40kΩ
V
IN
R
3
40kΩR
4
40kΩ
R
G1
R
G2
R
B
A2
V
01
7
3
2
5
418
6
–V
S
+V
S
0.1µF
–
+
TOTAL GAIN
A2 GAIN
R
G1
R
G2
R
B
(V/V) (V/V) (W) (W) (W)
1 1 (None) 10k —
2 2 20k 20k —
5 5 12.4k 49.9k —
10 10 11.0k 100k —
20 20 10.5k 200k —
50 50 10.2k 499k —
100 100 10.2k 1M —
200 200 499 100k 9.53k
500 500 100 49.9k 10k
1000 1000 100 100k 10k
STANDARD 1% RESISTORS
0.1µF
V
O
= (V
IN
– V
IN
)(1 + R
G2
/R
G1
)
+–
R
5
10kΩ
(1%)
9
®
INA145
FIGURE 2. Optional Offset Trim Circuit.
FIGURE 3. Measuring Current with Shunt Resistor.
OFFSET TRIM
The INA145 is laser-trimmed for low offset voltage and
drift. Most applications require no external offset adjust-
ment. Figure 2 shows an optional circuit for trimming the
offset voltage. A voltage applied to the Ref terminal will
be summed with the output signal. This can be used to null
offset voltage. To maintain good common-mode rejection,
the source impedance of a signal applied to the Ref
terminal should be less than 10Ω and a resistor added to
the positive input terminal should be 10 times that, or
100Ω. Alternatively, the trim voltage can be buffered with
an op amp such as the OPA277.
INPUT IMPEDANCE
The input impedance of the INA145 is determined by the
input resistor network and is approximately 40kΩ. The
source impedance at the two input terminals must be nearly
equal to maintain good common-mode rejection. A 5Ω
mismatch in impedance between the two inputs will cause
the typical common-mode rejection to be degraded to ap-
proximately 72dB. Figure 7 shows a common application
measuring power supply current through a shunt resistor.
The source impedance of the shunt resistor, RS, is balanced
by an equal compensation resistor, RC.
Source impedances greater than 300Ω are not recommended,
even if they are perfectly matched. Internal resistors are laser
trimmed for accurate ratios, not to absolute values. Adding
equal resistors greater than 300Ω can cause a mismatch in
the total resistor ratios, degrading CMR.
V
O
= 100 I
L
R
S
G = 100
+5V 8V
+7V 12V
+10V 18V
+15V 28V
V+
+5V
14 8
Load
R
G2
1MΩ
10kΩ
INA145
5
7
6
2
3
R
S
1Ω
V
B
I
L
V+ Max V
B
R
G1
10.2kΩ
V
IN
V
O
1
A1
V
IN
10Ω
10kΩ
Offset Adjustment Range = ±15mV, RTI
(±1.5mV at pin 1) R
T
100kΩ
10Ω
100kΩ
+15V
V
O1
–15V
40kΩ
40kΩ40kΩ
10kΩA2
40kΩ
5
6
NOTE: Increasing the trim resistor
R
T
will decrease the trim range
INA145
–
+
10
®
INA145
FIGURE 4. Noise Filtering. FIGURE 5. Creating Gains Less Than Unity.
FIGURE 6. Clamp Circuits.
V
O
18
6
V
IN
G = 1
Pole at
106Hz
R
G1
10kΩ
10kΩ
R
G2
1MΩ
22nF
INA145
5
2
3
1500pF
Pole at
720Hz
–
V
IN
+
V
O
18
6
R
G2
10kΩ
R
1
R
2
R
3
R
4
10kΩ
5.0V
or Analog-to-Digital V
S
0V ≤ V
O
≤ 5V
NOTE: (1) 1/2 OPA2342 with V
S
connected to +5V and GND.
Voltage
Reference
1N914
INA145
5
2
3
V
IN
–
V
IN
+
(1)
1N914
(1)
To Pin 8
Alternate
Soft Clamp
1N914
1N4684
(3.3V)
VO
10kΩ
INA145
5
6
81
2
3
VIN
–
VIN
+
R3
R4
G =
G ≤ 1
R3 + R4
R3
11
®
INA145
FIGURE 7. Current Monitor, G = 1.
FIGURE 8. Comparator Output with Optional Hysteresis Application to Sense Lamp Burn-Out.
FIGURE 9. AC Coupling (DC Restoration). FIGURE 10. Precision Current Source.
V
O
V
O1
18
6
R
G1
11kΩ
R
C
10Ω
R
S
10Ω
R
G2
100kΩ
INA145
5
2
Power
Supply
Load
3
For sense resistors (R
S
)
greater than 5Ω, use
series compensation
resistor (R
C
) for good
common-mode rejection.
Sense resistors greater
than 200Ω are not
recommended.
G = 10
V
O
1V – 50mV
+5V
148
6
8.4kΩ
INA145
57 Feedback
2
3
10MΩ
8kΩ
10kΩ
1V
2kΩ
Lamp
24V
SHUNT
R-I Lamp/10
e.g., 0.1Ω for 1A
V
O
18
6
R
G1
11kΩR
G2
100kΩ
R
1
1MΩ
INA145
OPA277
5
2
3
C
1
0.1µF
V
IN
–
V
IN
+
Pole at
f = = 1.6Hz
1
2πR
1
R
C
VO
IOUT = (VIN – VIN)/10kΩ
18
6
RG2
10kΩ
10kΩ
INA145
5
2
3
VIN
–+
VIN
+
–
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
INA145UA ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA145UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA145UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA145UAE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Feb-2009
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
INA145UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA145UA/2K5 SOIC D 8 2500 346.0 346.0 29.0
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 2
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