© 2006 Microchip Technology Inc. DS22019A-page 1
MCP1406/07
Features
High Peak Output Current: 6.0A (typ.)
Low Shoot-Through/Cross-Conduction Current in
Output Stage
Wide Input Supply Voltage Operating Range:
- 4.5V to 18V
High Capacitive Load Drive Capability:
- 2500 pF in 20 ns
- 6800 pF in 40 ns
Short Delay Times: 40 ns (typ.)
Matched Rise/Fall Times
Low Supply Current:
- With Logic ‘1’ Input – 130 µA (typ.)
- With Logic ‘0’ Input – 35 µA (typ.)
Latch-Up Protected: Will Withstand 1.5A Reverse
Current
Logic Input Will Withstand Negative Swing Up To
5V
Pin compatible with the TC4420/TC4429 devices
Space-saving 8-Pin SOIC, PDIP and 8-Pin 6x5
DFN Packages
Applications
Switch Mode Power Supplies
Pulse Transformer Drive
Line Drivers
Motor and Solenoid Drive
General Description
The MCP1406/07 devices are a family of
buffers/MOSFET drivers that feature a single-output
with 6A peak drive current capability, low shoot-through
current, matched rise/fall times and propagation delay
times. These devices are pin-compatible and are
improved versions of the TC4420/TC4429 MOSFET
drivers.
The MCP1406/07 MOSFET drivers can easily charge
and discharge 2500 pF gate capacitance in under
20 ns, provide low enough impedances in both the on
and off states to ensure the MOSFETs intended state
will not be affected, even by large transients. The input
to the MCP1406/07 may be driven directly from either
TTL or CMOS (3V to 18V).
These devices are highly latch-up resistant under any
conditions within their power and voltage ratings. They
are not subject to damage when up to 5V of noise
spiking (of either polarity) occurs on the ground pin. All
terminals are fully protect against Electrostatic
Discharge (ESD) up to 4 kV.
The MCP1406/07 single-output 6A MOSFET driver
family is offered in both surface-mount and pin-
through-hole packages with a -40°C to +125°C
temperature rating, making it useful in any wide
temperature range application.
Package Types
1
2
3
45
6
7
8
VDD VDD
OUT
OUT
GND GND
INPUT
NC
8-Pin PDIP/SOIC
MCP1407
MCP1406
VDD
OUT
OUT
GND
1234
5
6
7
8
8-Pin 6x5 DFN
VDD
GND
INPUT
NC
VDD
GND
GND
INPUT
OUT
12345
5-Pin TO-220
VDD
OUT
OUT
GND
MCP1407
MCP1406
VDD
OUT
OUT
GND
Tab is
Common
to VDD
Note 1: Duplicate pins must both be connected for proper operation.
2: Exposed pad of the DFN package is electrically isolated.
6A High-Speed Power MOSFET Drivers
MCP1406/07
DS22019A-page 2 © 2006 Microchip Technology Inc.
Functional Block Diagram(1)
Effective
Input C = 25 pF
MCP1406 Inverting
MCP1407 Non-inverting
Input
GND
VDD
300 mV
4.7V
Inverting
Non-inverting
Note 1: Unused inputs should be grounded.
130 µA
Output
Output
© 2006 Microchip Technology Inc. DS22019A-page 3
MCP1406/07
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
Supply Voltage ................................................................+20V
Input Voltage ...............................(VDD + 0.3V) to (GND – 5V)
Input Current (VIN>VDD)................................................50 mA
Notice: Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational sections of this specification is not intended.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, TA = +25°C, with 4.5V VDD18V.
Parameters Sym Min Typ Max Units Conditions
Input
Logic ‘1’, High Input Voltage VIH 2.4 1.8 V
Logic ‘0’, Low Input Voltage VIL —1.30.8V
Input Current IIN –10 10 µA 0VVINVDD
Input Voltage VIN -5 VDD+0.3 V
Output
High Output Voltage VOH VDD – 0.025 V DC Test
Low Output Voltage VOL 0.025 V DC Test
Output Resistance, High ROH —2.12.8ΩIOUT = 10 mA, VDD = 18V
Output Resistance, Low ROL —1.52.5ΩIOUT = 10 mA, VDD = 18V
Peak Output Current IPK —6AV
DD = 18V (Note 2)
Continuous Output Current IDC 1.3 A Note 2, Note 3
Latch-Up Protection With-
stand Reverse Current
IREV 1.5 A Duty cycle2%, t 300 µsec.
Switching Time (Note 1)
Rise Time tR—2030nsFigure 4-1, Figure 4-2
CL = 2500 pF
Fall Time tF—2030nsFigure 4-1, Figure 4-2
CL = 2500 pF
Delay Time tD1 —4055nsFigure 4-1, Figure 4-2
Delay Time tD2 —4055nsFigure 4-1, Figure 4-2
Power Supply
Supply Voltage VDD 4.5 18.0 V
Power Supply Current IS 130 250 µA VIN = 3V
IS 35 100 µA VIN = 0V
Note 1: Switching times ensured by design.
2: Tested during characterization, not production tested.
3: Valid for AT and MF packages only. TA = +25°C
MCP1406/07
DS22019A-page 4 © 2006 Microchip Technology Inc.
DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE)
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, operating temperature range with 4.5V VDD18V.
Parameters Sym Min Typ Max Units Conditions
Input
Logic ‘1’, High Input Voltage VIH 2.4 V
Logic ‘0’, Low Input Voltage VIL ——0.8V
Input Current IIN –10 +10 µA 0VVINVDD
Input Voltage VIN -5 VDD+0.3 V
Output
High Output Voltage VOH VDD – 0.025 V DC TEST
Low Output Voltage VOL 0.025 V DC TEST
Output Resistance, High ROH —3.05.0ΩIOUT = 10 mA, VDD = 18V
Output Resistance, Low ROL —2.35.0ΩIOUT = 10 mA, VDD = 18V
Switching Time (Note 1)
Rise Time tR—2540nsFigure 4-1, Figure 4-2
CL = 2500 pF
Fall Time tF—2540nsFigure 4-1, Figure 4-2
CL = 2500 pF
Delay Time tD1 —5065nsFigure 4-1, Figure 4-2
Delay Time tD2 —5065nsFigure 4-1, Figure 4-2
Power Supply
Supply Voltage VDD 4.5 18.0 V
Power Supply Current IS 200 500 µA VIN = 3V
50 150 VIN = 0V
Note 1: Switching times ensured by design.
Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V VDD 18V.
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range TA–40 +125 °C
Maximum Junction Temperature TJ +150 °C
Storage Temperature Range TA–65 +150 °C
Package Thermal Resistances
Thermal Resistance, 8L-6x5 DFN θJA 33.2 °C/W Typical four-layer board with
vias to ground plane
Thermal Resistance, 8L-PDIP θJA —125 °C/W
Thermal Resistance, 8L-SOIC θJA —155 °C/W
Thermal Resistance, 5L-TO-220 θJA —71 °C/W
© 2006 Microchip Technology Inc. DS22019A-page 5
MCP1406/07
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, TA = +25°C with 4.5V <= VDD <= 18V.
FIGURE 2-1: Rise Time vs. Supply
Voltage.
FIGURE 2-2: Rise Time vs. Capacitive
Load.
FIGURE 2-3: Rise and Fall Times vs.
Temperature.
FIGURE 2-4: Fall Time vs. Supply
Voltage.
FIGURE 2-5: Fall Time vs. Capacitive
Load.
FIGURE 2-6: Propagation Delay vs.
Supply Voltage.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein are
not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0
20
40
60
80
100
120
4 6 8 10 12 14 16 18
Supply Voltage (V)
Rise Time (ns)
100 pF
4,700 pF
1,000 pF
6,800 pF
2,500 pF
10,000 pF
8,200 pF
0
10
20
30
40
50
60
70
80
100 1000 10000
Capacitive Load (pF)
Rise Time (ns)
5V
15V
10V
0
5
10
15
20
25
30
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (oC)
Rise and Fall Time (ns)
VDD = 18V
tRISE
tFALL
0
10
20
30
40
50
60
70
80
4 6 8 10 12 14 16 18
Supply Voltage (V)
Fall Time (ns)
100 pF
4,700 pF
1,000 pF
6,800 pF
2,500 pF
10,000 pF 8,200 pF
0
10
20
30
40
50
60
70
100 1000 10000
Capacitive Load (pF)
Fall Time (ns)
5V
15V
10V
35
45
55
65
75
85
4 6 8 1012141618
Supply Voltage (V)
Propagation Delay (ns)
VIN = 5V
tD1
tD2
MCP1406/07
DS22019A-page 6 © 2006 Microchip Technology Inc.
Typical Performance Curves (Continued)
Note: Unless otherwise indicated, TA = +25°C with 4.5V <= VDD <= 18V.
FIGURE 2-7: Propagation Delay Time vs.
Input Amplitude.
FIGURE 2-8: Propagation Delay Time vs.
Temperature.
FIGURE 2-9: Quiescent Current vs.
Supply Voltage.
FIGURE 2-10: Quiescent Current vs.
Temperature.
FIGURE 2-11: Input Threshold vs. Supply
Voltage.
FIGURE 2-12: Input Threshold vs.
Temperature.
25
50
75
100
125
150
175
200
2345678910
Input Amplitude (V)
Propagation Delay (ns)
VDD = 12V
tD1
tD2
30
35
40
45
50
55
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (oC)
Propagation Delay (ns)
VDD = 18V
VIN = 5V
tD1
tD2
0
20
40
60
80
100
120
140
160
180
4 6 8 1012141618
Supply Voltage (V)
Quiescent Current (µA)
INPUT = 1
INPUT = 0
0
50
100
150
200
250
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (oC)
Quiescent Current (µA)
Input = Low
VDD = 18V
Input = High
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2
4 6 8 1012141618
Supply Voltage (V)
Input Threshold (V)
VHI
VLO
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (oC)
Input Threshold (V)
VDD = 12V VHI
VLO
© 2006 Microchip Technology Inc. DS22019A-page 7
MCP1406/07
Typical Performance Curves (Continued)
Note: Unless otherwise indicated, TA = +25°C with 4.5V <= VDD <= 18V.
FIGURE 2-13: Supply Current vs.
Capacitive Load.
FIGURE 2-14: Supply Current vs.
Capacitive Load.
FIGURE 2-15: Supply Current vs.
Capacitive Load.
FIGURE 2-16: Supply Current vs.
Frequency.
FIGURE 2-17: Supply Current vs.
Frequency.
FIGURE 2-18: Supply Current vs.
Frequency.
0
25
50
75
100
125
150
100 1000 10000
Capacitive Load (pF)
Supply Current (mA)
500 kHz
1 MHz
200 kHz
100 kHz
VDD = 18V
50 kHz
0
25
50
75
100
125
150
100 1000 10000
Capacitive Load (pF)
Supply Current (mA)
500 kHz
1 MHz
200 kHz
100 kHz
VDD = 12V
50 kHz
2 MHz
0
10
20
30
40
50
60
70
80
90
100
100 1000 10000
Capacitive Load (pF)
Supply Current (mA)
500 kHz
1 MHz
200 kHz
100 kHz
VDD = 6V
50 kHz
2 MHz
0
20
40
60
80
100
120
10 100 1000
Frequency (kHz)
Supply Current (mA)
100 pF
4,700 pF
1,000 pF
6,800 pF
VDD = 18V
2,500 pF
10,000 pF
0
10
20
30
40
50
60
70
80
10 100 1000
Frequency (kHz)
Supply Current (mA)
100 pF
4,700 pF
1,000 pF
6,800 pF
VDD = 12V
2,500 pF
10,000 pF
0
5
10
15
20
25
30
35
40
10 100 1000
Frequency (kHz)
Supply Current (mA)
100 pF
4,700 pF
1,000 pF
6,800 pF
VDD = 6V
2,500 pF
10,000 pF
MCP1406/07
DS22019A-page 8 © 2006 Microchip Technology Inc.
Typical Performance Curves (Continued)
Note: Unless otherwise indicated, TA = +25°C with 4.5V <= VDD <= 18V.
FIGURE 2-19: Output Resistance (Output
High) vs. Supply Voltage.
FIGURE 2-20: Output Resistance (Output
Low) vs. Supply Voltage.
FIGURE 2-21: Crossover Energy vs.
Supply Voltage.
1
2
3
4
5
6
7
4 6 8 10 12 14 16 18
Supply Voltage (V)
R
OUT-HI
(
:
)
VIN = 2.5V (MCP1407)
VIN = 0V (MCP1406)
TJ = +125oC
TJ = +25oC
1
2
3
4
5
6
7
4 6 8 10 12 14 16 18
Supply Voltage (V)
R
OUT-LO
(
:
)
VIN = 0V (MCP1407)
VIN = 2.5V (MCP1406)
TJ = +125oC
TJ = +25oC
1.E-09
1.E-08
1.E-07
4 6 8 1012141618
Supply Voltage (V)
Crossover Energy (A*sec)
10-8
10-9
10-10
© 2006 Microchip Technology Inc. DS22019A-page 9
MCP1406/07
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE (1)
3.1 Supply Input (VDD)
VDD is the bias supply input for the MOSFET driver and
has a voltage range of 4.5V to 18V. This input must be
decoupled to ground with local capacitors. The
bypass capacitors provide a localized low-
impedance path for the peak currents that are to be
provided to the load.
3.2 Control Input (INPUT)
The MOSFET driver input is a high-impedance,
TTL/CMOS-compatible input. The input also has
hysteresis between the high and low input levels,
allowing them to be driven from slow rising and falling
signals, and to provide noise immunity.
3.3 Ground (GND)
Ground is the device return pin. The ground pin should
have a low impedance connection to the bias supply
source return. High peak currents will flow out the
ground pin when the capacitive load is being
discharged.
3.4 CMOS Push-Pull Output
(OUTPUT)
The output is a CMOS push-pull output that is capable
of sourcing peak currents of 6A (VDD = 18V). The low
output impedance ensures the gate of the external
MOSFET will stay in the intended state even during
large transients. These output also has a reverse
current latch-up rating of 1.5A.
3.5 Exposed Metal Pad
The exposed metal pad of the DFN package is not
internally connected to any potential. Therefore, this
pad can be connected to a ground plane or other
copper plane on a printed circuit board to aid in heat
removal from the package.
3.6 TO-220 Metal Tab
The metal tab on the TO-220 package is at VDD
potentail. This metal tab is not intended to be the VDD
connection to MCP1406/07. VDD should be supplied
using the Supply Input pin of the TO-220.
8-Pin
PDIP, SOIC
8-Pin
DFN
5-Pin
TO-220 Symbol Description
11V
DD Supply Input
2 2 1 INPUT Control Input
3 3 NC No Connection
4 4 2 GND Ground
5 5 4 GND Ground
6 6 5 OUTPUT CMOS Push-Pull Output
7 7 OUTPUT CMOS Push-Pull Output
883 V
DD Supply Input
—PAD NCExposed Metal Pad
——TABV
DD Metal Tab at VDD Potential
Note 1: Duplicate pins must be connected for proper operation.
MCP1406/07
DS22019A-page 10 © 2006 Microchip Technology Inc.
4.0 APPLICATION INFORMATION
4.1 General Information
MOSFET drivers are high-speed, high current devices
which are intended to provide high peak currents to
charge the gate capacitance of external MOSFETs or
IGBTs. In high frequency switching power supplies, the
PWM controller may not have the drive capability to
directly drive the power MOSFET. A MOSFET driver
like the MCP1406/07 family can be used to provide
additional drive current capability.
4.2 MOSFET Driver Timing
The ability of a MOSFET driver to transition from a fully
off state to a fully on state are characterized by the
drivers rise time (tR), fall time (tF), and propagation
delays (tD1 and tD2). The MCP1406/07 family of
devices is able to make this transition very quickly.
Figure 4-1 and Figure 4-2 show the test circuits and
timing waveforms used to verify the MCP1406/07 tim-
ing.
FIGURE 4-1: Inverting Driver Timing
Waveform.
FIGURE 4-2: Non-Inverting Driver Timing
Waveform.
4.3 Decoupling Capacitors
Careful layout and decoupling capacitors are highly
recommended when using MOSFET drivers. Large
currents are required to charge and discharge
capacitive loads quickly. For example, 2.25A are
needed to charge a 2500 pF load with 18V in 20 ns.
To operate the MOSFET driver over a wide frequency
range with low supply impedance, a ceramic and low
ESR film capacitor are recommended to be placed in
parallel between the driver VDD and GND. A 1.0 µF low
ESR film capacitor and a 0.1 µF ceramic capacitor
placed between pins 1, 8 and 4, 5 should be used.
These capacitors should be placed close to the driver
to minimized circuit board parasitics and provide a local
source for the required current.
4.4 PCB Layout Considerations
Proper PCB layout is important in a high current, fast
switching circuit to provide proper device operation and
robustness of design. PCB trace loop area and
inductance should be minimized by the use of a ground
plane or ground trace located under the MOSFET gate
drive signals, separate analog and power grounds, and
local driver decoupling.
0.1 µF
+5V
10%
90%
10%
90%
10%
90%
18V
F
0V
0V
MCP1406
CL = 2500 pF
Input
Input
Output
tD1 tF
tD2
Output
tR
VDD = 18V
Ceramic
90%
Input
tD1 tF
tD2
Output tR
10%
10% 10%
+5V
18V
0V
0V
90%
90%
0.1 µF
F
MCP1407
CL = 2500 pF
Input Output
VDD = 18V
Ceramic
© 2006 Microchip Technology Inc. DS22019A-page 11
MCP1406/07
The MCP1406/07 devices have two pins each for VDD,
OUTPUT, and GND. Both pins must be used for proper
operation. This also lowers path inductance which will,
along with proper decoupling, help minimize ringing in
the circuit.
Placing a ground plane beneath the MCP1406/07 will
help as a radiated noise shield as well as providing
some heat sinking for power dissipated within the
device.
4.5 Power Dissipation
The total internal power dissipation in a MOSFET driver
is the summation of three separate power dissipation
elements.
4.5.1 CAPACITIVE LOAD DISSIPATION
The power dissipation caused by a capacitive load is a
direct function of frequency, total capacitive load, and
supply voltage. The power lost in the MOSFET driver
for a complete charging and discharging cycle of a
MOSFET is:
4.5.2 QUIESCENT POWER DISSIPATION
The power dissipation associated with the quiescent
current draw depends upon the state of the input pin.
The MCP1406/07 devices have a quiescent current
draw when the input is high of 0.13 mA (typ) and
0.035 mA (typ) when the input is low. The quiescent
power dissipation is:
4.5.3 OPERATING POWER DISSIPATION
The operating power dissipation occurs each time the
MOSFET driver output transitions because for a very
short period of time both MOSFETs in the output stage
are on simultaneously. This cross-conduction current
leads to a power dissipation describes as:
PTPLPQPCC
++=
Where:
PT = Total power dissipation
PL = Load power dissipation
PQ = Quiescent power dissipation
PCC = Operating power dissipation
PLfC
T
×VDD
2
×=
Where:
f = Switching frequency
CT = Total load capacitance
VDD = MOSFET driver supply voltage
PQIQH DI
QL 1D()×+×()VDD
×=
Where:
IQH = Quiescent current in the high state
D = Duty cycle
IQL = Quiescent current in the low state
VDD = MOSFET driver supply voltage
PCC CC f×VDD
×=
Where:
CC = Cross-conduction constant (A*sec)
f = Switching frequency
VDD = MOSFET driver supply voltage
MCP1406/07
DS22019A-page 12 © 2006 Microchip Technology Inc.
5.0 PACKAGING INFORMATION
5.1 Package Marking Information (Not to Scale)
XXXXXXXX
XXXXXNNN
YYWW
8-Lead PDIP (300 mil) Example:
MCP1407
E/P^^256
0644
8-Lead SOIC (150 mil) Example:
XXXXXXXX
XXXXYYWW
NNN 256
MCP1406E
8-Lead DFN Example:
XXXXXXX
XXXXXXX
XXYYWW
NNN
MCP1406
E/MF^^
0644
256
SN^^0644
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
3
e
3
e
3
e
5-Lead TO-220
XXXXXXXXX
XXXXXXXXX
YYWWNNN
Example
MCP1406
EAT^^
0644256
3
e
© 2006 Microchip Technology Inc. DS22019A-page 13
MCP1406/07
5-Lead Plastic Transistor Outline (AT) (TO-220)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
LH1
Q
E
β
e1
e
C1
J1
F
A
D
α
(5°)
ØP
EJECTOR PIN
e3
Drawing No. C04-036
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254 mm) per side.
JEDEC equivalent: TO-220
*
Controlling Parameter
Mold Draft Angle
Lead Width
Lead Thickness
α
C1
β
.014
Dimension Limits
Overall Height
Lead Length
Overall Width
Lead Pitch
A
L
E
.540
MIN
e
Units
.060
INCHES
*
.022 0.36 0.56
MILLIMETERS
.190
.560 13.72
MIN
MAX
4.83
14.22
MAX
.160 4.06
Overall Length D
1.020.64.040
.025
Overall Lead Centers e1 .263
.385
.560
.273 6.68 6.93
.072 1.52 1.83
.415 9.78 10.54
.590 14.22 14.99
Through Hole Diameter P .146 .156 3.71 3.96
J1Base to Bottom of Lead .090 2.29.115 2.92
Through Hole Center Q.103 2.87.113 2.62
Flag Thickness F .045 1.40.055 1.14
Flag Length H1 .234 6.55.258 5.94
Space Between Leads e3 .030 1.02.040 0.76
Revised 08-01-05
MCP1406/07
DS22019A-page 14 © 2006 Microchip Technology Inc.
8-Lead Plastic Dual Flat, No Lead Package (MF) - 6x5 mm Body [DFN-S]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Number of Pins
Pitch
Overall Height
Standoff
Contact Thickness
Overall Length
Overall Width
Exposed Pad Length
Exposed Pad Width
Contact Width
Contact Length §
Contact-to-Exposed Pad §
Units
Dimension Limits
N
e
A
A1
A3
D
E
D2
E2
b
L
K
0.80
0.00
3.90
2.20
0.35
0.50
0.20
8
1.27 BSC
0.85
0.01
0.20 REF
5.00 BSC
6.00 BSC
4.00
2.30
0.40
0.60
1.00
0.05
4.10
2.40
0.48
0.75
MIN NOM MAX
MILLIMETERS
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package may have one or more exposed tie bars at ends.
3. § Significant Characteristic
4. Package is saw singulated
5. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing No. C04–122, Sept. 8, 2006
TOP VIEW BOTTOM VIEW
NOTE 1
EXPOSED PAD
12
E
A3A1
A
NOTE 2
N
D
NOTE 1
E2
b
e
L
N
D2
21
K
© 2006 Microchip Technology Inc. DS22019A-page 15
MCP1406/07
8-Lead Plastic Dual In-line (PA) – 300 mil Body (PDIP)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
B1
B
A1
A
L
A2
p
α
E
eB
β
c
E1
n
D
1
2
Units INCHES*MILLIMETERS
Dimension Limits MIN NOM MAX MIN NOM MAX
Number of Pins n88
Pitch p.100 2.54
Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32
Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68
Base to Seating Plane A1 .015 0.38
Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26
Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60
Overall Length D .360 .373 .385 9.14 9.46 9.78
Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43
Lead Thickness c.008 .012 .015 0.20 0.29 0.38
Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78
Lower Lead Width B .014 .018 .022 0.36 0.46 0.56
Overall Row Spacing §eB .310 .370 .430 7.87 9.40 10.92
Mold Draft Angle Top α51015 51015
Mold Draft Angle Bottom β51015 51015
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
§ Significant Characteristic
MCP1406/07
DS22019A-page 16 © 2006 Microchip Technology Inc.
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil Body (SOIC)
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Foot Angle φ048048
1512015120
β
Mold Draft Angle Bottom
1512015120
α
Mold Draft Angle Top
0.510.420.33.020.017.013BLead Width
0.250.230.20.010.009.008
c
Lead Thickness
0.760.620.48.030.025.019LFoot Length
0.510.380.25.020.015.010hChamfer Distance
5.004.904.80.197.193.189DOverall Length
3.993.913.71.157.154.146E1Molded Package Width
6.206.025.79.244.237.228EOverall Width
0.250.180.10.010.007.004A1Standoff §
1.551.421.32.061.056.052A2Molded Package Thickness
1.751.551.35.069.061.053AOverall Height
1.27
.050
p
Pitch
88
n
Number of Pins
MAXNOMMINMAXNOMMINDimension Limits
MILLIMETERSINCHES*Units
2
1
D
n
p
B
E
E1
h
L
β
c
45°
φ
A2
α
A
A1
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
§ Significant Characteristic
© 2006 Microchip Technology Inc. DS22019A-page 17
MCP1406/07
APPENDIX A: REVISION HISTORY
Revision A (December 2006)
Original Release of this Document.
MCP1406/07
DS22019A-page 18 © 2006 Microchip Technology Inc.
NOTES:
© 2006 Microchip Technology Inc. DS22019A-page 19
MCP1406/07
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Device: MCP1406: 6A High-Speed MOSFET Driver, Inverting
MCP1406T: 6A High-Speed MOSFET Driver, Inverting
(Tape and Reel)
MCP1407: 6A High-Speed MOSFET Driver,
Non-Inverting
MCP1407T: 6A High-Speed MOSFET Driver,
Non-Inverting (Tape and Reel)
Temperature Range: E = -40°C to +125°C
Package: * AT = TO-220, 5-Lead
MF = Dual, Flat, No-Lead (6x5 mm Body), 8-lead
PA = Plastic DIP, (300 mil body), 8-lead
SN = Plastic SOIC (150 mil Body), 8-Lead
* All package offerings are Pb Free (Lead Free)
Examples:
a) MCP1406-E/MF: 6A High-Speed MOSFET
Driver, Inverting
8LD DFN package.
b) MCP1406-E/AT: 6A High-Speed MOSFET
Driver, Inverting
5LD TO-220 package.
c) MCP1406-E/SN: 6A High-Speed MOSFET
Driver, Inverting
8LD SOIC package.
d) MCP1406-E/P: 6A High-Speed MOSFET
Driver, Inverting
8LD PDIP package.
e) MCP1406T-E/MF: Tape and Reel,
6A High-Speed MOSFET
Driver, Inverting,
8LD DFN pkg.
f) MCP1406T-E/SN: Tape and Reel,
6A High-Speed MOSFET
Driver, Inverting,
8LD SOIC pkg.
a) MCP1407-E/MF: 6A High-Speed MOSFET
Driver, Non-Inverting
8LD DFN package.
b) MCP1407-E/AT: 6A High-Speed MOSFET
Driver, Non-Inverting
5LD TO-220 package.
c) MCP1407-E/SN: 6A High-Speed MOSFET
Driver, Non-Inverting
8LD SOIC package.
d) MCP1407-E/P: 6A High-Speed MOSFET
Driver, Non-Inverting
8LD PDIP package.
e) MCP1407T-E/MF: Tape and Reel,
6A High-Speed MOSFET
Driver, Non-Inverting,
8LD DFN pkg.
f) MCP1407T-E/SN: Tape and Reel,
6A High-Speed MOSFET
Driver, Non-Inverting,
8LD SOIC pkg.
PART NO. XXX
PackageTemperature
Range
Device
XXX
Tape & Reel
MCP1406/07
DS22019A-page 20 © 2006 Microchip Technology Inc.
NOTES:
© 2006 Microchip Technology Inc. DS22019A-page 21
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
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Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
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AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
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Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active
Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, PICkit,
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All other trademarks mentioned herein are property of their
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© 2006, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona, Gresham, Oregon and Mountain View, California. The
Company’s quality system processes and procedures are for its PIC®
8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs,
microperipherals, nonvolatile memory and analog products. In addition,
Microchip’s quality system for the design and manufacture of
development systems is ISO 9001:2000 certified.
DS22019A-page 22 © 2006 Microchip Technology Inc.
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