LME49721
www.ti.com
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
LME49721 High-Performance, High-Fidelity Rail-to-Rail Input/Output Audio Operational
Amplifier
Check for Samples: LME49721
1FEATURES DESCRIPTION
The LME49721 is a low-distortion, low-noise Rail-to-
2• Rail-to-Rail Input and Output Rail Input/Output operational amplifier optimized and
• Easily Drives 10kΩLoads to Within 10mV of fully specified for high-performance, high-fidelity
Each Power Supply Voltage applications. Combining advanced leading-edge
• Optimized for Superior Audio Signal Fidelity process technology with state-of-the-art circuit
design, the LME49721 Rail-to-Rail Input/Output
• Output Short Circuit Protection operational amplifier delivers superior signal
amplification for outstanding performance. The
APPLICATIONS LME49721 combines a very high slew rate with low
• Ultra High-Quality Portable Audio THD+N to easily satisfy demanding applications. To
ensure that the most challenging loads are driven
Amplification without compromise, the LME49721 has a high slew
• High-Fidelity Preamplifiers rate of ±8.5V/μs and an output current capability of
• High-Fidelity Multimedia ±9.7mA. Further, dynamic range is maximized by an
• State-of-the-Art Phono Pre Amps output stage that drives 10kΩloads to within 10mV of
either power supply voltage.
• High-Performance Professional Audio The LME49721 has a wide supply range of 2.2V to
• High-Fidelity Equalization and Crossover 5.5V. Over this supply range the LME49721’s input
Networks circuitry maintains excellent common-mode and
• High-Performance Line Drivers power supply rejection, as well as maintaining its low
• High-Performance Line Receivers input bias current. The LME49721 is unity gain
stable.
• High-Fidelity Active Filters
• DAC I–V Converter
• ADC Front-End Signal Conditioning
KEY SPECIFICATIONS
• Power Supply Voltage Range: 2.2V to 5.5V
• Quiescent Current: 2.15mA (typ)
• THD+N (AV= 2, VOUT = 4Vp-p, f IN = 1kHz)
– RL= 2kΩ: 0.00008% (typ)
– RL= 600Ω: 0.0001% (typ)
• Input Noise Density: 4nV/√Hz (typ), @ 1kHz
• Slew Rate: ±8.5V/μs (typ)
• Gain Bandwidth Product: 20MHz (typ)
• Open Loop Gain (RL= 600Ω): 118dB (typ)
• Input Bias Current: 40fA (typ)
• Input Offset Voltage: 0.3mV (typ)
• PSRR: 103dB (typ)
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2007–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
+
-
+5V
VIN
VDD
VSS
1
2
3
45
6
7
8
OUTPUTA
NON-INVERTING INPUT A
INVERTING INPUT A
INVERTING INPUT B
OUTPUTB
NON-INVERTING INPUT B
+
-
+
-
VDD
VSS
LME49721
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
www.ti.com
TYPICAL CONNECTION AND PINOUT
Figure 1. Buffer Amplifier Figure 2. 8-Pin SOIC (D Package)
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS(1)(2)(3)
Power Supply Voltage (VS= V+- V-) 6V
Storage Temperature −65°C to 150°C
Input Voltage (V-) - 0.7V to (V+) + 0.7V
Output Short Circuit(4) Continuous
Power Dissipation Internally Limited
ESD Rating(5) 2000V
ESD Rating(6) 200V
Junction Temperature 150°C
Thermal Resistance, θJA (SOIC) 165°C/W
Temperature Range, TMIN ≤TA≤TMAX –40°C ≤TA≤85°C
Supply Voltage Range 2.2V ≤VS≤5.5V
(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified
(2) The Electrical Characteristics table lists ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(4) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX,θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings,
whichever is lower.
(5) Human body model, applicable std. JESD22-A114C.
(6) Machine model, applicable std. JESD22-A115-A.
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LME49721
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SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
ELECTRICAL CHARACTERISTICS FOR THE LME49721
The following specifications apply for the circuit shown in Figure 1. VS= 5V, RL= 10kΩ, RSOURCE = 10Ω, fIN = 1kHz, and TA=
25°C, unless otherwise specified. LME49721 Units
Symbol Parameter Conditions (Limits)
Typical(1) Limit(2)
AV= +1, VOUT = 2Vp-p,
THD+N Total Harmonic Distortion + Noise RL= 2kΩ0.0002
RL= 600Ω0.0002 0.001 % (max)
AV= +1, VOUT = 2Vp-p,
IMD Intermodulation Distortion 0.0004 %
Two-tone, 60Hz & 7kHz 4:1
GBWP Gain Bandwidth Product 20 15 MHz (min)
SR Slew Rate AV= +1 8.5 V/μs (min)
VOUT = 1VP-P, –3dB
FPBW Full Power Bandwidth referenced to output magnitude 2.2 MHz
at f = 1kHz
AV= 1, 4V step
tsSettling time 800 ns
0.1% error range
fBW = 20Hz to 20kHz, μVP-P
Equivalent Input Noise Voltage .707 1.13
A-weighted (max)
enf = 1kHz nV/√Hz
Equivalent Input Noise Density 4 6
A-weighted (max)
InCurrent Noise Density f = 10kHz 4.0 fA/√Hz
VOS Offset Voltage 0.3 1.5 mV (max)
Average Input Offset Voltage Drift vs
ΔVOS/ΔTemp 40°C ≤TA≤85°C 1.1 μV/°C
Temperature
Average Input Offset Voltage Shift vs
PSRR 103 85 dB (min)
Power Supply Voltage
ISOCH-CH Channel-to-Channel Isolation fIN = 1kHz 117 dB
IBInput Bias Current VCM = VS/2 40 fA
Input Bias Current Drift vs
ΔIOS/ΔTemp –40°C ≤TA≤85°C 48 fA/°C
Temperature
IOS Input Offset Current VCM = VS/2 60 fA
(V+) – 0.1
VIN-CM Common-Mode Input Voltage Range V (min)
(V-) + 0.1
CMRR Common-Mode Rejection VSS - 100mV < VCM < VDD + 100mV 93 70 dB (min)
1/f Corner Frequency 2000 Hz
VSS - 200mV < VOUT < VDD + 200mV
RL= 600Ω118 100 dB (min)
AVOL Open Loop Voltage Gain RL= 2kΩ122 dB (min)
RL= 10kΩ130 115 dB (min)
VDD – 30mV VDD – 80mV V (min)
RL= 600ΩVSS + 30mV VSS + 80mV V (min)
VOUTMIN Output Voltage Swing VDD – 10mV VDD – 20mV V (min)
RL= 10kΩ, VS= 5.0V VSS + 10mV VSS + 20mV V (min)
IOUT Output Current RL= 250Ω, VS= 5.0V 9.7 9.3 mA (min)
IOUT-SC Short Circuit Current 100 mA
fIN = 10kHz
ROUT Output Impedance Closed-Loop 0.01 Ω
Open-Loop 46
ISQuiescent Current per Amplifier IOUT = 0mA 2.15 3.25 mA (max)
(1) Typical values represent most likely parametric norms at TA= +25ºC, and at the Recommended Operation Conditions at the time of
product characterization and are not ensured.
(2) Datasheet min/max specification limits are ensured by test or statistical analysis.
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FREQUENCY (Hz)
0.00001
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0.0001
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0.01
THD+N (%)
20 20k200 2k
FREQUENCY (Hz)
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THD+N (%)
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FREQUENCY (Hz)
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THD+N (%)
20 20k200 2k
FREQUENCY (Hz)
0.00001
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THD+N (%)
20 20k200 2k
FREQUENCY (Hz)
0.00001
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0.001
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THD+N (%)
20 20k200 2k
FREQUENCY (Hz)
0.00001
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0.0001
0.001
0.01
THD+N (%)
20 20k200 2k
LME49721
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS
Graphs were taken in dual supply configuration.
THD+N vs Frequency THD+N vs Frequency
VS= ±2.5V, VOUT = 4VP-P VS= ±2.5V, VOUT = 4VP-P
RL= 2kΩ, AV= 2, BW = 22kHz RL= 2kΩ, AV= 2
Figure 3. Figure 4.
THD+N vs Frequency THD+N vs Frequency
VS= ±2.5V, VOUT = 4VP-P VS= ±2.5V, VOUT = 4VP-P
RL= 10kΩ, AV= 2, BW = 22kHz RL= 10kΩ, AV= 2
Figure 5. Figure 6.
THD+N vs Frequency THD+N vs Frequency
VS= ±2.5V, VOUT = 4VP-P VS= ±2.5V, VOUT = 4VP-P
RL= 600Ω, AV= 2, BW = 22kHz RL= 600Ω, AV= 2
Figure 7. Figure 8.
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FREQUENCY (Hz)
0.00001
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0.0001
0.001
0.01
THD+N (%)
20 20k200 2k
FREQUENCY (Hz)
0.00001
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THD+N (%)
20 20k200 2k
FREQUENCY (Hz)
0.0001
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THD+N (%)
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THD+N (%)
20 20k200 2k
LME49721
www.ti.com
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Graphs were taken in dual supply configuration.
THD+N vs Frequency THD+N vs Frequency
VS= ±2.75V, VOUT = 4VP-P VS= ±2.75V, VOUT = 4VP-P
RL= 2kΩ, AV= 2, BW = 22kHz RL= 2kΩ, AV= 2
Figure 9. Figure 10.
THD+N vs Frequency THD+N vs Frequency
VS= ±2.75V, VOUT = 4VP-P VS= ±2.75V, VOUT = 4VP-P
RL= 10kΩ, AV= 2, BW = 22kHz RL= 10kΩ, AV= 2
Figure 11. Figure 12.
THD+N vs Frequency THD+N vs Frequency
VS= ±2.75V, VOUT = 4VP-P VS= ±2.75V, VOUT = 4VP-P
RL= 600Ω, AV= 2, BW = 22kHz RL= 600Ω, AV= 2
Figure 13. Figure 14.
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0.00001
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0.0001
0.001
0.01
THD+N (%)
100M 2200M 1
OUTPUT VOLTAGE (V)
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THD+N (%)
100m 2200m 1
OUTPUT VOLTAGE (V)
0.0001
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THD+N (%)
OUTPUT VOLTAGE (V)
100m 1
200m
OUTPUT VOLTAGE (V)
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100m 2200m 1
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OUTPUT VOLTAGE (V)
100m 1
200m
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0.001
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THD+N (%)
OUTPUT VOLTAGE (V)
100m 1
200m
LME49721
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Graphs were taken in dual supply configuration.
THD+N vs Output Voltage THD+N vs Output Voltage
VS= ±1.1V VS= ±1.1V
RL= 2kΩ, AV= 2 RL= 10kΩ, AV= 2
Figure 15. Figure 16.
THD+N vs Output Voltage THD+N vs Output Voltage
VS= ±1.1V VS= ±1.5V
RL= 600Ω, AV= 2 RL= 2kΩ, AV= 2
Figure 17. Figure 18.
THD+N vs Output Voltage THD+N vs Output Voltage
VS= ±1.5V VS= ±1.5V
RL= 10kΩ, AV= 2 RL= 600Ω, AV= 2
Figure 19. Figure 20.
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0.00001
0.1
0.0001
0.001
0.01
THD+N (%)
100m 2200m 1 3
OUTPUT VOLTAGE (V)
0.00001
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0.0001
0.001
0.01
THD+N (%)
100m 2200m 1 3
OUTPUT VOLTAGE (V)
0.00001
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THD+N (%)
100m 2200m 1
OUTPUT VOLTAGE (V)
0.00001
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THD+N (%)
100m 2200m 1 3
OUTPUT VOLTAGE (V)
0.00001
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0.001
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THD+N (%)
100m 2200m 1
OUTPUT VOLTAGE (V)
0.00001
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0.0001
0.001
0.01
THD+N (%)
100m 2200m 1
OUTPUT VOLTAGE (V)
LME49721
www.ti.com
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Graphs were taken in dual supply configuration.
THD+N vs Output Voltage THD+N vs Output Voltage
VS= ±2.5V VS= ±2.5V
RL= 2kΩ, AV= 2 RL= 10kΩ, AV= 2
Figure 21. Figure 22.
THD+N vs Output Voltage THD+N vs Output Voltage
VS= ±2.5V VS= ±2.75V
RL= 600Ω, AV= 2 RL= 2kΩ, AV= 2
Figure 23. Figure 24.
THD+N vs Output Voltage THD+N vs Output Voltage
VS= ±2.75V VS= ±2.75V
RL= 10kΩ, AV= 2 RL= 600Ω, AV= 2
Figure 25. Figure 26.
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LME49721
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Graphs were taken in dual supply configuration.
Crosstalk vs Frequency Crosstalk vs Frequency
VS= ±1.1V VS= ±1.1V
VOUT = 2Vp-p VOUT = 2Vp-p
RL= 2kΩRL= 10kΩ
Figure 27. Figure 28.
Crosstalk vs Frequency Crosstalk vs Frequency
VS= ±1.1V VS= ±1.5V,
VOUT = 2Vp-p VOUT = 2Vp-p
RL= 600ΩRL= 2kΩ
Figure 29. Figure 30.
Crosstalk vs Frequency Crosstalk vs Frequency
VS= ±1.5V VS= ±1.5V
VOUT = 2Vp-p VOUT = 2Vp-p
RL= 10kΩRL= 600Ω
Figure 31. Figure 32.
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LME49721
www.ti.com
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Graphs were taken in dual supply configuration.
Crosstalk vs Frequency Crosstalk vs Frequency
VS= ±2.5V VS= ±2.5V
VOUT = 4Vp-p VOUT = 4Vp-p
RL= 2kΩRL= 10kΩ
Figure 33. Figure 34.
Crosstalk vs Frequency Crosstalk vs Frequency
VS= ±2.5V VS= ±2.75V
VOUT = 4Vp-p VOUT = 4Vp-p
RL= 600ΩRL= 2kΩ
Figure 35. Figure 36.
Crosstalk vs Frequency Crosstalk vs Frequency
VS= ±2.75V VS= ±2.75V
VOUT = 4Vp-p VOUT = 4Vp-p
RL= 10kΩRL= 600Ω
Figure 37. Figure 38.
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LME49721
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Graphs were taken in dual supply configuration.
PSRR vs Frequency PSRR vs Frequency
VS= ±1.1V VS= ±1.1V
VRIPPLE = 200mVP-P VRIPPLE = 200mVP-P
RL= 2kΩRL= 10kΩ
Figure 39. Figure 40.
PSRR vs Frequency PSRR vs Frequency
VS= ±1.1V VS= ±1.5V
VRIPPLE = 200mVP-P VRIPPLE = 200mVP-P
RL= 600ΩRL= 2kΩ
Figure 41. Figure 42.
PSRR vs Frequency PSRR vs Frequency
VS= ±1.5V VS= ±1.5V
VRIPPLE = 200mVP-P VRIPPLE = 200mVP-P
RL= 10kΩRL= 600Ω
Figure 43. Figure 44.
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Product Folder Links: LME49721
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LME49721
www.ti.com
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Graphs were taken in dual supply configuration.
PSRR vs Frequency PSRR vs Frequency
VS= ±2.5V VS= ±2.5V
VRIPPLE = 200mVP-P VRIPPLE = 200mVP-P
RL= 2kΩRL= 10kΩ
Figure 45. Figure 46.
PSRR vs Frequency PSRR vs Frequency
VS= ±2.5V VS= ±2.75V
VRIPPLE = 200mVP-P VRIPPLE = 200mVP-P
RL= 600ΩRL= 2kΩ
Figure 47. Figure 48.
PSRR vs Frequency PSRR vs Frequency
VS= ±2.75V VS= ±2.75V
VRIPPLE = 200mVP-P VRIPPLE = 200mVP-P
RL= 10kΩRL= 600Ω
Figure 49. Figure 50.
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-20
CMRR (dB)
20 200k200 2k 20k
FREQUENCY (Hz)
-120
+0
-100
-80
-60
-40
-20
CMRR (dB)
20 200k200 2k 20k
FREQUENCY (Hz)
-120
+0
-100
-80
-60
-40
-20
CMRR (dB)
20 200k200 2k 20k
FREQUENCY (Hz)
LME49721
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Graphs were taken in dual supply configuration.
CMRR vs Frequency CMRR vs Frequency
VS= ±1.5V VS= ±1.5V
RL= 2kΩRL= 10kΩ
Figure 51. Figure 52.
CMRR vs Frequency CMRR vs Frequency
VS= ±1.5V VS= ±2.5V
RL= 600ΩRL= 2kΩ
Figure 53. Figure 54.
CMRR vs Frequency CMRR vs Frequency
VS= ±2.5V VS= ±2.5V
RL= 10kΩRL= 600Ω
Figure 55. Figure 56.
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Product Folder Links: LME49721
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9
OUTPUT VOLTAGE SWING (V)
SUPPLY VOLTAGE (V-)
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9
OUTPUT VOLTAGE SWING (V)
SUPPLY VOLTAGE (V-)
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0.0
1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9
OUTPUT VOLTAGE SWING (V)
SUPPLY VOLTAGE (V-)
-120
+0
-100
-80
-60
-40
-20
CMRR (dB)
20 200k200 2k 20k
FREQUENCY (Hz)
-120
+0
-100
-80
-60
-40
-20
CMRR (dB)
20 200k200 2k 20k
FREQUENCY (Hz)
-120
+0
-100
-80
-60
-40
-20
CMRR (dB)
20 200k200 2k 20k
FREQUENCY (Hz)
LME49721
www.ti.com
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Graphs were taken in dual supply configuration.
CMRR vs Frequency CMRR vs Frequency
VS= ±2.75V VS= ±2.75V
RL= 2kΩRL= 10kΩ
Figure 57. Figure 58.
CMRR vs Frequency
VS= ±2.75V Output Voltage Swing Neg vs Power Supply
RL= 600ΩRL= 2kΩ
Figure 59. Figure 60.
Output Voltage Swing Neg vs Power Supply Output Voltage Swing Neg vs Power Supply
RL= 10kΩRL= 600Ω
Figure 61. Figure 62.
Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LME49721
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
1.10 1.25 1.50 1.75 2.00 2.25 2.50 2.75
POWER SUPPLY (V)
SUPPLY CURRENT (mA)
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
1.10 1.25 1.50 1.75 2.00 2.25 2.50 2.75
POWER SUPPLY (V)
SUPPLY CURRENT (mA)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9
OUTPUT VOLTAGE SWING (V)
SUPPLY VOLTAGE (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
1.10 1.25 1.50 1.75 2.00 2.25 2.50 2.75
POWER SUPPLY (V)
SUPPLY CURRENT (mA)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9
OUTPUT VOLTAGE SWING (V)
SUPPLY VOLTAGE (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9
OUTPUT VOLTAGE SWING (V)
SUPPLY VOLTAGE (V)
LME49721
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Graphs were taken in dual supply configuration.
Output Voltage Swing Pos vs Power Supply Output Voltage Swing Pos vs Power Supply
RL= 2kΩRL= 10kΩ
Figure 63. Figure 64.
Output Voltage Swing Pos vs Power Supply Supply Current per amplifier vs Power Supply
RL= 600ΩRL= 2kΩ, Dual Supply
Figure 65. Figure 66.
Supply Current per amplifier vs Power Supply Supply Current per amplifier vs Power Supply
RL= 10kΩ, Dual Supply RL= 600Ω, Dual Supply
Figure 67. Figure 68.
14 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LME49721
-
+Distortion Signal Gain = 1 + (R2/R3)
R1R2
Audio Precision
System Two
Cascade
LME49721
Generator Output Analyzer Input
1 k:1 k:
R3
10:
LME49721
www.ti.com
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
APPLICATION INFORMATION
DISTORTION MEASUREMENTS
The vanishingly low residual distortion produced by LME49721 is below the capabilities of all commercially
available equipment. This makes distortion measurements just slightly more difficult than simply connecting a
distortion meter to the amplifier's inputs and outputs. The solution. however, is quite simple: an additional
resistor. Adding this resistor extends the resolution of the distortion measurement equipment.
The LME49721's low residual is an input referred internal error. As shown in Figure 69, adding the 10Ωresistor
connected between a the amplifier's inverting and non-inverting inputs changes the amplifier's noise gain. The
result is that the error signal (distortion) is amplified by a factor of 101. Although the amplifier's closed-loop gain
is unaltered, the feedback available to correct distortion errors is reduced by 101. To ensure minimum effects on
distortion measurements, keep the value of R1 low as shown in Figure 69.
This technique is verified by duplicating the measurements with high closed-loop gain and/or making the
measurements at high frequencies. Doing so, produces distortion components that are within equipments
capabilities. This datasheet's THD+N and IMD values were generated using the above described circuit
connected to an Audio Precision System Two Cascade.
Figure 69. THD+N and IMD Distortion Test Circuit with AV= 2
OPERATING RATINGS AND BASIC DESIGN GUIDELINES
The LME49721 has a supply voltage range from +2.2V to +5.5V single supply or ±1.1 to ±2.75V dual supply.
Bypassed capacitors for the supplies should be placed as close to the amplifier as possible. This will help
minimize any inductance between the power supply and the supply pins. In addition to a 10μF capacitor, a 0.1μF
capacitor is also recommended in CMOS amplifiers.
The amplifier's inputs lead lengths should also be as short as possible. If the op amp does not have a bypass
capacitor, it may oscillate.
BASIC AMPLIFIER CONFIGURATIONS
The LME49721 may be operated with either a single supply or dual supplies. Figure 70 shows the typical
connection for a single supply inverting amplifier. The output voltage for a single supply amplifier will be centered
around the common-mode voltage Vcm. Note: the voltage applied to the Vcm insures the output stays above
ground. Typically, the Vcm should be equal to VDD/2. This is done by putting a resistor divider ckt at this node,
see Figure 70.
Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LME49721
+
-
VIN
VDD
VOUT
+
-
R1R2
VOUT
VIN
VDD
VSS
+
-
VDD
R1R2
VOUT
VIN
VCM
R3
R4
VDD
LME49721
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
www.ti.com
Figure 70. Single-Supply Inverting Op Amp
Figure 71 shows the typical connection for a dual supply inverting amplifier. The output voltage is centered on
zero.
Figure 71. Dual-Supply Inverting Op Amp
Figure 72 shows the typical connection for the Buffer Amplifier or also called a Voltage Follower. A Buffer
Amplifier can be used to solve impedance matching problems, to reduce power consumption in the source, or to
drive heavy loads. The input impedance of the op amp is very high. Therefore, the input of the op amp does not
load down the source. The output impedance on the other hand is very low. It allows the load to either supply or
absorb energy to a circuit while a secondary voltage source dissipates energy from a circuit. The Buffer is a unity
stable amplifier, 1V/V. Although the feedback loop is tied from the output of the amplifier to the inverting input,
the gain is still positive. Note: if a positive feedback is used, the amplifier will most likely drive to either rail at the
output.
Figure 72. Buffer
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Product Folder Links: LME49721
LME49721
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SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
TYPICAL APPLICATIONS
AV= 34.5
F = 1 kHz
En= 0.38 μV
A Weighted
Figure 73. ANAB Preamp
Figure 74. NAB Preamp Voltage Gain vs Frequency
VO= V1–V2
Figure 75. Balanced to Single-Ended Converter
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LME49721
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
www.ti.com
VO= V1 + V2 −V3 −V4
Figure 76. Adder/Subtracter
Figure 77. Sine Wave Oscillator
Illustration is f0= 1 kHz
Figure 78. Second-Order High-Pass Filter
(Butterworth)
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Product Folder Links: LME49721
LME49721
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SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
Illustration is f0= 1 kHz
Figure 79. Second-Order Low-Pass Filter
(Butterworth)
Illustration is f0= 1 kHz, Q = 10, ABP = 1
Figure 80. State Variable Filter
Figure 81. AC/DC Converter
Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: LME49721
LME49721
www.ti.com
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
Illustration is:
fL= 32 Hz, fLB = 320 Hz
fH=11 kHz, fHB = 1.1 kHz
Figure 84. Tone Control
Av= 35 dB
En= 0.33 μV
S/N = 90 dB
f = 1 kHz
A Weighted
A Weighted, VIN = 10 mV
@f = 1 kHz
Figure 85. RIAA Preamp
Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Links: LME49721
LME49721
www.ti.com
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
A. See Table 1.
Figure 87. 10-Band Graphic Equalizer
Table 1. C1, C2, R1, and R2Values for Figure 87(1)
fo (Hz) C1C2R1R2
32 0.12μF 4.7μF 75kΩ500Ω
64 0.056μF 3.3μF 68kΩ510Ω
125 0.033μF 1.5μF 62kΩ510Ω
250 0.015μF 0.82μF 68kΩ470Ω
500 8200pF 0.39μF 62kΩ470Ω
1k 3900pF 0.22μF 68kΩ470Ω
2k 2000pF 0.1μF 68kΩ470Ω
4k 1100pF 0.056μF 62kΩ470Ω
8k 510pF 0.022μF 68kΩ510Ω
16k 330pF 0.012μF 51kΩ510Ω
(1) At volume of change = ±12 dB Q = 1.7
Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Links: LME49721
LME49721
SNAS371C –SEPTEMBER 2007–REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Rev Date Description
1.0 09/26/07 Initial release.
1.1 10/01/07 Input more info under the Buffer Amplifier.
1.2 04/21/10 Added the Ordering Information table.
C 04/04/13 Changed layout of National Data Sheet to TI format.
24 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated
Product Folder Links: LME49721
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LME49721MA/NOPB ACTIVE SOIC D 8 95 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 L49721
MA
LME49721MAX/NOPB ACTIVE SOIC D 8 2500 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 L49721
MA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LME49721MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 4-May-2017
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LME49721MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 4-May-2017
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
.228-.244 TYP
[5.80-6.19]
.069 MAX
[1.75]
6X .050
[1.27]
8X .012-.020
[0.31-0.51]
2X
.150
[3.81]
.005-.010 TYP
[0.13-0.25]
0 - 8 .004-.010
[0.11-0.25]
.010
[0.25]
.016-.050
[0.41-1.27]
4X (0 -15 )
A
.189-.197
[4.81-5.00]
NOTE 3
B .150-.157
[3.81-3.98]
NOTE 4
4X (0 -15 )
(.041)
[1.04]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
18
.010 [0.25] C A B
5
4
PIN 1 ID AREA
SEATING PLANE
.004 [0.1] C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 2.800
www.ti.com
EXAMPLE BOARD LAYOUT
.0028 MAX
[0.07]
ALL AROUND
.0028 MIN
[0.07]
ALL AROUND
(.213)
[5.4]
6X (.050 )
[1.27]
8X (.061 )
[1.55]
8X (.024)
[0.6]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
EXPOSED
METAL
OPENING
SOLDER MASK METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED
METAL
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SYMM
1
45
8
SEE
DETAILS
SYMM
www.ti.com
EXAMPLE STENCIL DESIGN
8X (.061 )
[1.55]
8X (.024)
[0.6]
6X (.050 )
[1.27] (.213)
[5.4]
(R.002 ) TYP
[0.05]
SOIC - 1.75 mm max heightD0008A
SMALL OUTLINE INTEGRATED CIRCUIT
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
SYMM
SYMM
1
45
8
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