OP07C, OP07D
PRECISION OPERATIONAL AMPLIFIERS
SLOS099D – OCTOBER 1983 – REVISED FEBRUAR Y 2002
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Low Noise
D
No External Components Required
D
Replace Chopper Amplifiers at a Lower
Cost
D
Wide Input-Voltage Range
...0 to ±14 V Typ
D
Wide Supply-Voltage Range
...±3 V to ±18 V
D
Essentially Equivalent to Fairchild µA714
Operational Amplifiers
D
Direct Replacements for PMI OP07C and
OP07D
description
These devices offer low offset and long-term stability by means of a low-noise, chopperless,
bipolar-input-transistor amplifier circuit. For most applications, external components are not required for offset
nulling and frequency compensation. The true differential input, with a wide input-voltage range and outstanding
common-mode rejection, provides maximum flexibility and performance in high-noise environments and in
noninverting applications. Low bias currents and extremely high input impedances are maintained over the
entire temperature range. The OP07 is unsurpassed for low-noise, high-accuracy amplification of very-low-level
signals.
These devices are characterized for operation from 0°C to 70°C.
AVAILABLE OPTIONS
VIO MAX
PACKAGE
TA
V
IO
MAX
AT 25°CSMALL OUTLINE
(D, PS) PLASTIC DIP
(P)
OP07CD OP07CP
0°C to 70°C 150 µVOP07DD
OP07DPS OP07DP
The D package is available taped and reeled. Add the suffix R to the device type
(e.g., OP07CDR). The PS package is available only taped and reeled.
symbol
OUT
–
+
OFFSET N2
IN–
IN+
OFFSET N1 1
3
2
8
6
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
OFFSET N1
IN–
IN+
VCC–
OFFSET N2
VCC+
OUT
NC
OP07C ...D OR P PACKAGE
OP07D . . . D, P, OR PS PACKAGE
(TOP VIEW)
NC–No internal connection
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
OP07C, OP07D
PRECISION OPERATIONAL AMPLIFIERS
SLOS099D – OCTOBER 1983 – REVISED FEBRUAR Y 2002
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematic
7
6
4
VCC+
OUT
VCC–
OFFSET N1
OFFSET N2
IN+
IN–
1
8
3
2
COMPONENT COUNT
Resistors
Transistors
Capacitors
28
39
4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage: VCC+ (see Note 1) 22 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VCC– (see Note 1) –22 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage (see Note 2) ±30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI (either input, see Note 3) ±22 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of output short circuit (see Note 4) Unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 5): D package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
P package 85°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PS package 95°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltage values, unless otherwise noted, are with respect to the midpoint between VCC+ and VCC–.
2. Differential voltages are at IN+ with respect to IN–.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to ground or either power supply.
5. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN MAX UNIT
VCC±Supply voltage ±3±18 V
VIC Common-mode input voltage VCC± = ±15 V –13 13 V
TAOperating free-air temperature 0 70 °C
OP07C, OP07D
PRECISION OPERATIONAL AMPLIFIERS
SLOS099D – OCT OBER 1983 – REVISED FEBRUARY 2002
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
•3
electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS†
TA
OP07C OP07D
UNIT
PARAMETER
TEST
CONDITIONS†
T
AMIN TYP MAX MIN TYP MAX
UNIT
VIO
In
p
ut offset voltage
VO=0
RS=50Ω
25°C 60 150 60 150
µV
V
IO
Input
offset
voltage
V
O =
0
,
R
S =
50
Ω
0°C to 70°C 85 250 85 250 µ
V
a
VIO Temperature coefficient of input offset voltage VO = 0, RS = 50 Ω0°C to 70°C 0.5 1.8 0.7 2.5 µV/°C
Long-term drift of input offset voltage See Note 6 0.4 0.5 µV/mo
Offset adjustment range RS = 20 kΩ,See Figure 1 25°C±4±4 mV
IIO
In
p
ut offset current
25°C 0.8 6 0.8 6
nA
I
IO
Input
offset
current
0°C to 70°C 1.6 8 1.6 8
nA
a
IIO Temperature coefficient of input offset current 0°C to 70°C 12 50 12 50 pA/°C
IIB
In
p
ut bias current
25°C±1.8 ±7±2±12
nA
I
IB
Input
bias
current
0°C to 70°C±2.2 ±9±3±14
nA
a
IIB Temperature coefficient of input bias current 0°C to 70°C 18 50 18 50 pA/°C
VICR
Common mode in
p
ut voltge range
25°C±13 ±14 ±13 ±14
V
V
ICR
Common
-
mode
input
voltge
range
0°C to 70°C±13 ±13.5 ±13 ±13.5
V
RL ≥ 10 kΩ ±12 ±13 ±12 ±13
VOM
Peak out
p
ut voltage
RL ≥ 2 kΩ25°C±11.5 ±12.8 ±11.5 ±12.8
V
V
OM
Peak
output
voltage
RL ≥ 1 kΩ ±12 ±12
V
RL ≥ 2 kΩ0°C to 70°C±11 ±12.6 ±11 ±12.6
A
L i l diff ti l lt lifi ti
VCC±= ±3 V,
RL ≥ 500 kΩVO = ±0.5 V, 25°C 100 400 400
V/ V
AVD Large-signal dif ferential voltage amplification
VO=±10 V
RL=2kΩ
25°C 120 400 120 400 V/mV
V
O =
±10
V
,
R
L =
2
kΩ
0°C to 70°C 100 400 100 400
B1Unity-gain bandwidth 25°C 0.4 0.6 0.4 0.6 MHz
riInput resistance 25°C 8 33 7 31 MΩ
CMRR
Common mode rejection ratio
VIC =±13 V
RS=50Ω
25°C 100 120 94 110
dB
CMRR
Common
-
mode
rejection
ratio
V
IC =
±13
V
,
R
S =
50
Ω
0°C to 70°C 97 120 94 106
dB
kSVS
Su
pp
ly voltage sensitivity (∆VIO/∆VCC)
V
CC±
= ±3 V to ±18 V, 25°C 7 32 7 32
µV/V
k
SVS
Supply
-
voltage
sensitivity
(∆V
IO
/∆V
CC
)
CC±,
RS = 50 Ω0°C to 70°C 10 51 10 51 µ
V/V
VO = 0, No load 80 150 80 150
PDPower dissipation VCC±= ±3 V,
No load VO = 0, 25°C4 8 4 8 mW
†All characteristics are measured under open-loop conditions with zero common-mode input voltage, unless otherwise noted.
NOTE 6: Since long-term drift cannot be measured on the individual devices prior to shipment, this specification is not intended to be a warranty . It is an engineering estimate of the
averaged trend line of drift versus time over extended periods after the first thirty days of operation.
OP07C, OP07D
PRECISION OPERATIONAL AMPLIFIERS
SLOS099D – OCTOBER 1983 – REVISED FEBRUAR Y 2002
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics, VCC± = ±15 V, TA = 25°C
TEST OP07C OP07D
UNIT
CONDITIONS†TYP TYP
UNIT
f = 10 Hz 10.5 10.5
√
VnEquivalent input noise voltage f = 100 Hz 10.2 10.3 nV/
√
Hz
f = 1 kHz 9.8 9.8
VN(PP) Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 10 Hz 0.38 0.38 µV
f = 10 Hz 0.35 0.35
√
InEquivalent input noise current f = 100 Hz 0.15 0.15 pA/
√
Hz
f = 1 kHz 0.13 0.13
IN(PP) Peak-to-peak equivalent input noise current f = 0.1 Hz to 10 Hz 15 15 pA
SR Slew rate RL≥ 2 kΩ0.3 0.3 V/µs
†All characteristics are measured under open-loop conditions with zero common-mode input voltage, unless otherwise noted.
APPLICATION INFORMATION
OUT
VCC–
VCC+
IN–
IN+ +
–
OFFSET N1
3
2
4
76
20 kΩ
N2
OFFSET
8
1
Figure 1. Input Offset-Voltage Null Circuit
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Copyright 2002, Texas Instruments Incorporated