MCP6401/1R/1U/2/4/6/7/9 1 MHz, 45 A Op Amps Features Description * * * * * * The Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 family of operational amplifiers (op amps) has low quiescent current (45 A, typical) and rail-to-rail input and output operation. This family is unity gain stable and has a gain bandwidth product of 1 MHz (typical). These devices operate with a power supply voltage of 1.8V to 6.0V. These features make the family of op amps well suited for single-supply, battery-powered applications. Low Quiescent Current: 45 A (typical) Gain Bandwidth Product: 1 MHz (typical) Rail-to-Rail Input and Output Supply Voltage Range: 1.8V to 6.0V Unity Gain Stable Extended Temperature Ranges: - -40C to +125C (E temp) - -40C to +150C (H temp) * No Phase Reversal The MCP6401/1R/1U/2/4/6/7/9 family is designed with Microchip's advanced CMOS process and offered in single, dual and quad packages. The devices are available in two extended temperature ranges (E temp and H temp) with different package types, which makes them well-suited for automotive and industrial applications. Applications * * * * * * * Portable Equipment Battery Powered System Medical Instrumentation Automotive Electronics Data Acquisition Equipment Sensor Conditioning Analog Active Filters Design Aids * * * * * SPICE Macro Models FilterLab(R) Software Microchip Advanced Part Selector (MAPS) Analog Demonstration and Evaluation Boards Application Notes Typical Application R2 D2 VIN R1 VOUT MCP6401 D1 Precision Half-Wave Rectifier (c) 2009-2011 Microchip Technology Inc. DS22229D-page 1 MCP6401/1R/1U/2/4/6/7/9 E Temp Package Types MCP6401 H Temp Package Types MCP6401R SC70-5, SOT-23-5 VOUT 1 SOT-23-5 5 VDD VOUT 1 VSS 2 5 VSS VDD 2 VIN+ 3 4 VIN- VIN+ 3 4 VIN- MCP6402 MCP6401U SOIC SOT-23-5 VOUTA 1 8 VDD VINA- 2 7 VOUTB VSS 2 6 VINB- VIN- 3 VINA+ 3 VSS 4 VIN+ 1 5 VDD 4 VOUT 5 VINB+ MCP6404 2x3 TDFN SOIC, TSSOP VOUTA 1 8 VDD VINA- 2 V - 7 VOUTB INA 2 V + 6 VINB- INA 3 5 V + VDD 4 13 VIND- VINB+ 5 10 VINC+ VINB- 6 VOUTB 7 9 VINC- VSS 4 SOT-23-5 SOIC VOUT 1 5 VDD VOUTA 1 VSS 2 VINA- 2 VIN+ 3 4 VIN- V + 3 INA 6 VINB- VSS 4 5 VINB+ INB 8 VDD 7 VOUTB MCP6404 MCP6406 SOIC SOT-23-5 14 VOUTD VOUT 1 VSS 2 13 V - 5 VDD VINA- 2 VINA+ 3 12 VIND+ VIN+ 3 4 VIN- VOUTA 1 IND 11 VSS VINB+ 5 10 VINC+ VINB- 6 VOUTB 7 9 VINC- 8 VOUTC 14 VOUTD VOUTA 1 VINA+ 3 MCP6402 VDD 4 MCP6402 EP 9 MCP6401 12 VIND+ 11 VSS 8 VOUTC VOUTA 1 VINA- 2 VINA+ 3 VSS 4 MCP6407 MCP6409 SOIC SOIC 8 VDD VOUTA 1 VINA- 2 7 V 14 VOUTD 6 VINB- VINA+ 3 5 V + VDD 4 12 VIND+ VINB+ 5 10 VINC+ VINB- 6 9 VINC- 8 VOUTC OUTB INB * Includes Exposed Thermal Pad (EP); see Table 3-1. E temp: -40C to +125C VOUTB 7 13 VIND- 11 VSS H temp: -40C to +150C DS22229D-page 2 (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 1.0 ELECTRICAL CHARACTERISTICS 1.1 Absolute Maximum Ratings Notice: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. VDD - VSS ........................................................................7.0V Current at Input Pins .....................................................2 mA Analog Inputs (VIN+, VIN-) .......... VSS - 1.0V to VDD + 1.0V See Section 4.1.2 "Input Voltage Limits". All Other Inputs and Outputs ......... VSS - 0.3V to VDD + 0.3V Difference Input Voltage ...................................... |VDD - VSS| Output Short-Circuit Current ................................ Continuous Current at Output and Supply Pins ............................30 mA Storage Temperature ....................................-65C to +150C Maximum Junction Temperature (TJ) .......................... +155C ESD Protection on All Pins (HBM; MM; CDM).... 4 kV; 300V, 1500V 1.2 MCP6401/1R/1U/2/4 Electrical Specifications DC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.8v to +6.0v, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDDD/2 and RL = 100 k to VL (Refer to Figure 1-1). Parameters Units Temp Parts (Note 1) Sym Min Typ Max VOS -4.5 0.8 +4.5 mV -- 1.0 -- mV +125C E -- 1.5 -- mV +150C H -- 2.0 -- V/C -40C to +125C E -- 2.5 -- V/C -40C to +150C H 63 78 -- dB -- 75 -- dB +125C E -- 73 -- dB +150C H -- 1 100 pA Conditions Input Offset Input Offset Voltage Input Offset Drift with Temperature Power Supply Rejection Ratio VOS/TA PSRR E, H E, H VCM = VSS VCM = VSS VCM = VSS Input Bias Current and Impedance Input Bias Current Input Offset Current Note 1: 2: IB IOS E, H -- 30 -- pA +85C E, H -- 800 -- pA +125C E -- 7 -- nA +150C -- 1 -- pA H E, H -- 5 -- pA +85C -- 20 -- pA +125C E, H E -- 45 -- pA +150C H E part stands for the one whose operating temperature range is from -40C to +125C and H part stands for the one whose operating temperature range is from -40C to +150C. Figure 2-14 shows how VCMR changes across temperature. (c) 2009-2011 Microchip Technology Inc. DS22229D-page 3 MCP6401/1R/1U/2/4/6/7/9 DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.8v to +6.0v, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDDD/2 and RL = 100 k to VL (Refer to Figure 1-1). Temp Parts (Note 1) Parameters Sym Min Typ Max Units Common Mode Input Impedance ZCM -- 1013||6 -- ||pF E, H Differential Input Impedance ZDIFF -- 1013||6 -- ||pF E, H VCMR VSS-0.20 -- VDD+0.20 V VSS-0.05 -- VDD+0.05 V +125C +150C Conditions Common Mode Common Mode Input Voltage Range (Note 2) Common Mode Rejection Ratio CMRR E, H VDD = 1.8V E VSS -- VDD V VSS-0.30 -- VDD+0.30 V H VSS-0.15 -- VDD+0.15 V +125C E VSS-0.10 -- VDD+0.10 V +150C H 56 71 -- dB -- 68 -- dB +125C E VCM = -0.05V to 1.85V, VDD = 1.8V -- 65 -- dB +150C H VCM = 0V to 1.8V, VDD = 1.8V 63 78 -- dB -- 76 -- dB +125C E VCM = -0.15V to 6.15V, VDD = 6.0V -- 75 -- dB +150C H VCM = -0.1V to 6.1V, VDD = 6.0V E, H VOUT = 0.3V to VDD0.3V, VCM = VSS E, H E, H E, H VDD = 6.0V VCM = -0.2V to 2.0V, VDD = 1.8V VCM = -0.3V to 6.3V, VDD = 6.0V Open-Loop Gain DC Open-Loop Gain (Large Signal) AOL 90 110 -- dB -- 105 -- dB +125C E -- 100 -- dB +150C H 1.790 1.792 -- V -- 1.788 -- V +125C +150C Output High-Level Output Voltage Low-Level Output Voltage Note 1: 2: VOH VOL E, H E -- 1.785 -- V 5.980 5.985 -- V H -- 5.980 -- V +125C E -- 5.975 -- V +150C H -- 0.008 0.010 V -- 0.012 -- V +125C -- 0.015 -- V +150C -- 0.015 0.020 V -- 0.020 -- V +125C E -- 0.025 -- V +150C H E, H E, H E H E, H VDD = 1.8V RL = 10 k 0.5V input overdrive VDD = 6.0V RL = 10 k 0.5V input overdrive VDD = 1.8V RL = 10 k 0.5V input overdrive VDD = 6.0V RL = 10 k 0.5V input overdrive E part stands for the one whose operating temperature range is from -40C to +125C and H part stands for the one whose operating temperature range is from -40C to +150C. Figure 2-14 shows how VCMR changes across temperature. DS22229D-page 4 (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.8v to +6.0v, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDDD/2 and RL = 100 k to VL (Refer to Figure 1-1). Parameters Output Short-Circuit Current Typ Max Units Temp Parts (Note 1) Conditions Sym Min ISC -- 5 -- mA E, H VDD = 1.8V -- 15 -- mA E, H VDD = 6.0V VDD 1.8 -- 6.0 V E, H IQ 20 45 70 A -- 55 -- A +125C E -- 60 -- A +150C H Power Supply Supply Voltage Quiescent Current per Amplifier Note 1: E, H IO = 0, VDD = 5.0V VCM = 0.2VDD E part stands for the one whose operating temperature range is from -40C to +125C and H part stands for the one whose operating temperature range is from -40C to +150C. Figure 2-14 shows how VCMR changes across temperature. 2: AC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.8 to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF (Refer to Figure 1-1). Parameters Sym Min Typ Max Units Parts Conditions AC Response Gain Bandwidth Product GBWP -- 1 -- MHz E, H Phase Margin PM -- 65 -- E, H Slew Rate SR -- 0.5 -- V/s E, H Input Noise Voltage Eni -- 3.6 -- Vp-p E, H f = 0.1 Hz to 10 Hz Input Noise Voltage Density eni -- 28 -- nV/Hz E, H f = 1 kHz Input Noise Current Density ini -- 0.6 -- fA/Hz E, H f = 1 kHz G = +1 V/V Noise TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V and VSS = GND. Parameters Sym Min Typ Max Units Conditions TA -40 -- +125 C E temp parts (Note 1) TA -40 -- +150 C H temp parts (Note 1) TA -65 -- +155 C Thermal Resistance, 5L-SC70 JA -- 331 -- C/W Thermal Resistance, 5L-SOT-23 JA -- 220.7 -- C/W Thermal Resistance, 8L-SOIC JA -- 149.5 -- C/W Thermal Resistance, 8L-2x3 TDFN JA -- 52.5 -- C/W Thermal Resistance, 14L-SOIC JA -- 95.3 -- C/W Thermal Resistance, 14L-TSSOP JA -- 100 -- C/W Temperature Ranges Operating Temperature Range Storage Temperature Range Thermal Package Resistances Note 1: The internal junction temperature (TJ) must not exceed the absolute maximum specification of +155C. (c) 2009-2011 Microchip Technology Inc. DS22229D-page 5 MCP6401/1R/1U/2/4/6/7/9 1.3 MCP6406/7/9 Electrical Specifications DC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2 and RL = 100 k to VL (Refer to Figure 1-1). Parameters Temp Parts (Note 1) Sym Min Typ Max Units VOS -4.5 -- +4.5 mV -5.0 1.0 +5.0 mV +125C E -5.5 1.5 +5.5 mV +150C H -- 2.0 -- V/C -40C to +125C E -- 2.5 -- V/C -40C to +150C H Conditions Input Offset Input Offset Voltage Input Offset Drift with Temperature Power Supply Rejection Ratio VOS/DTA PSRR E, H 63 78 -- dB 60 75 -- dB +125C E, H E 58 73 -- dB +150C H -- 1 100 pA -- 30 -- pA +85C E, H -- 800 2000 pA +125C E -- 7 12 nA +150C H -- 1 -- pA -- 5 -- pA +85C -- 20 -- pA +125C E -- 45 -- pA +150C H VCM = VSS VCM = VSS VCM = VSS Input Bias Current and Impedance Input Bias Current Input Offset Current IB IOS E, H E, H E, H Common Mode Input Impedance ZCM -- 1013||6 -- ||pF E, H Differential Input Impedance ZDIFF -- 1013||6 -- ||pF E, H VCMR VSS-0.20 -- VDD+0.20 V E, H VSS-0.05 -- VDD+0.05 V +125C +150C Common Mode Common Mode Input Voltage Range (Note 2) Note 1: 2: VDD = 1.8V E VSS -- VDD V VSS-0.30 -- VDD+0.30 V VSS-0.15 -- VDD+0.15 V +125C E VSS-0.10 -- VDD+0.10 V +150C H H E, H VDD = 6.0V E part stands for the one whose operating temperature range is from -40C to +125C and H part stands for the one whose operating temperature range is from -40C to +150C. Figure 2-14 shows how VCMR changes across temperature. DS22229D-page 6 (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2 and RL = 100 k to VL (Refer to Figure 1-1). Parameters Common Mode Rejection Ratio Temp Parts (Note 1) Conditions Sym Min Typ Max Units CMRR 56 71 -- dB 53 68 -- dB +125C E VCM = -0.05V to 1.85V, VDD = 1.8V 50 65 -- dB +150C H VCM = 0V to 1.8V, VDD = 1.8V 63 78 -- dB 61 76 -- dB +125C E VCM = -0.15V to 6.15V, VDD = 6.0V 60 75 -- dB +150C H VCM = -0.1V to 6.1V, VDD = 6.0V E, H VOUT = 0.3V to VDD-0.3V, VCM = VSS E, H E, H VCM = -0.2V to 2.0V, VDD = 1.8V VCM = -0.3V to 6.3V, VDD = 6.0V Open-Loop Gain DC Open-Loop Gain (Large Signal) AOL 90 110 -- dB 88 105 -- dB +125C E 85 100 -- dB +150C H Output High-Level Output Voltage Low-Level Output Voltage Output Short-Circuit Current VOH VOL 1.790 1.792 -- V 1.785 1.788 -- V +125C E, H 1.782 1.785 -- V +150C 5.980 5.985 -- V 5.970 5.980 -- V +125C E 5.965 5.975 -- V +150C H E H E, H -- 0.008 0.010 V -- 0.012 0.015 V +125C E, H -- 0.015 0.018 V +150C -- 0.015 0.020 V -- 0.020 0.030 V +125C E -- 0.025 0.035 V +150C H E H E, H VDD = 1.8V RL = 10 k 0.5V input overdrive VDD = 6.0V RL = 10 k 0.5V input overdrive VDD = 1.8V RL = 10 k 0.5V input overdrive VDD = 6.0V RL = 10 k 0.5V input overdrive -- 5 -- mA E, H VDD = 1.8V -- 15 -- mA E, H VDD = 6.0V VDD 1.8 -- 6.0 V E, H IQ 20 45 70 A 30 55 80 A +125C E 35 60 90 A +150C H ISC Power Supply Supply Voltage Quiescent Current per Amplifier Note 1: 2: E, H IO = 0, VDD = 5.0V VCM = 0.2VDD E part stands for the one whose operating temperature range is from -40C to +125C and H part stands for the one whose operating temperature range is from -40C to +150C. Figure 2-14 shows how VCMR changes across temperature. (c) 2009-2011 Microchip Technology Inc. DS22229D-page 7 MCP6401/1R/1U/2/4/6/7/9 AC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.8 to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF (Refer to Figure 1-1). Parameters Sym Min Typ Max Units Part Conditions AC Response Gain Bandwidth Product GBWP -- 1 -- MHz E, H Phase Margin PM -- 65 -- E, H Slew Rate SR -- 0.5 -- V/s E, H Input Noise Voltage Eni -- 3.6 -- Vp-p E, H f = 0.1 Hz to 10 Hz Input Noise Voltage Density eni -- 28 -- nV/Hz E, H f = 1 kHz Input Noise Current Density ini -- 0.6 -- fA/Hz E, H f = 1 kHz G = +1 V/V Noise TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V and VSS = GND. Parameters Sym Min Typ Max Units Conditions TA -40 -- +125 C E temp parts (Note 1) TA -40 -- +150 C H temp parts (Note 1) TA -65 -- +155 C Temperature Ranges Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 5L-SOT-23 JA -- 220.7 -- C/W Thermal Resistance, 8L-SOIC JA -- 149.5 -- C/W Thermal Resistance, 14L-SOIC JA -- 95.3 -- C/W Note 1: 1.4 The internal junction temperature (TJ) must not exceed the absolute maximum specification of +155C. Test Circuits The circuit used for most DC and AC tests is shown in Figure 1-1. This circuit can independently set VCM and VOUT; see Equation 1-1. Note that VCM is not the circuit's Common Mode voltage ((VP + VM)/2), and that VOST includes VOS plus the effects (on the input offset error, VOST) of temperature, CMRR, PSRR and AOL. CF 6.8 pF RG 100 k VP G DM = RF RG CB1 100 nF MCP640x V CM = ( V P + VDD 2 ) 2 VDD/2 CB2 1 F VIN- V OST = VIN- - V IN+ V OUT = ( VDD 2 ) + ( VP - V M ) + V OST ( 1 + GDM ) VM RG 100 k Where: GDM = Differential Mode Gain (V/V) VCM = Op Amp's Common Mode Input Voltage (V) DS22229D-page 8 VDD VIN+ EQUATION 1-1: VOST = Op Amp's Total Input Offset Voltage RF 100 k (mV) RL 100 k RF 100 k CF 6.8 pF VOUT CL 60 pF VL FIGURE 1-1: AC and DC Test Circuit for Most Specifications. (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF. 45% 1760 Samples VCM = VSS 21% Percentage of Occurences 18% 15% 12% 9% 6% 3% 35% 30% 25% 20% 15% 10% 5% 0% -10 -8 5 FIGURE 2-4: 3% 0% -5 -4 -3 -2 -1 0 1 2 3 4 5 -10 -8 Input Offset Voltage (mV) FIGURE 2-5: Input Offset Voltage. 1000 800 600 400 200 0 -200 -400 -600 -800 -1000 21% Input Offset Voltage (V) Percentage of Occurences 24% 1200 Samples VCM = VSS TA = +150C 18% 15% 12% 9% 6% 3% 0% -5 -4 FIGURE 2-3: -3 -2 -1 0 1 2 3 Input Offset Voltage (mV) Input Offset Voltage. (c) 2009-2011 Microchip Technology Inc. 4 5 10 Input Offset Voltage Drift. VDD = 6.0V Representative Part TA = +25C TA = -40C TA = +150C TA = +125C TA = +85C -0.5 FIGURE 2-2: -6 -4 -2 0 2 4 6 8 Input Offset Voltage Drift (V/C) 6.5 6% 6.0 9% 5.5 12% 5.0 15% 1200 Samples VCM = VSS TA = -40C to +150C 4.5 1200 Samples VCM = VSS TA = +125C 18% 50% 45% 40% 35% 30% 25% 20% 15% 10% 5% 0% 4.0 21% Percentage of Occurences 24% 10 Input Offset Voltage Drift. 3.5 Input Offset Voltage. -6 -4 -2 0 2 4 6 8 Input Offset Voltage Drift (V/C) 3.0 4 2.5 FIGURE 2-1: -2 -1 0 1 2 3 Input Offset Voltage (mV) 1.5 -3 1.0 -4 0.5 -5 2.0 0% Percentage of Occurences 1760 Samples VCM = VSS TA = -40C to +125C 40% 0.0 Percentage of Occurences 24% Common Mode Input Voltage (V) FIGURE 2-6: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 6.0V. DS22229D-page 9 MCP6401/1R/1U/2/4/6/7/9 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF. 1,000 100 10 0.1 0.1 11 100 1000 1010 100 1k Frequency (Hz) Common Mode Input Voltage (V) FIGURE 2-10: vs. Frequency. 10 f = 1 kHz VDD = 6.0 V 5 Input Offset Voltage vs. TA = +150C TA = +125C -100 -200 TA = +85C TA = +25C TA = -40C -500 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 Power Supply Voltage (V) FIGURE 2-9: Input Offset Voltage vs. Power Supply Voltage. DS22229D-page 10 90 Representative Part 0 -400 6.5 100 100 -300 FIGURE 2-11: Input Noise Voltage Density vs. Common Mode Input Voltage. CMRR, PSRR (dB) Input Offset Voltage (V) 200 6.0 Common Mode Input Voltage (V) Output Voltage (V) FIGURE 2-8: Output Voltage. 5.5 0 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -1000 15 5.0 Representative Part -750 20 4.5 -500 25 4.0 VDD = 1.8V -250 30 3.5 VDD = 6.0V 0 35 3.0 250 40 1.0 500 10000 100k 100000 10k Input Noise Voltage Density 0.5 750 -0.5 Input Noise Voltage Density (nV/Hz) Input Offset Voltage (V) 1000 0.0 FIGURE 2-7: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 1.8V. 2.5 2.3 2.1 1.9 1.7 1.5 1.3 1.1 0.9 0.7 0.5 0.3 0.1 -0.1 -0.3 -0.5 TA = +150C TA = +125C TA = +85C TA = +25C TA = -40C 2.0 Input Noise Voltage Density (nV/Hz) Input Offset Voltage (V) VDD = 1.8V Representative Part 1.5 1400 1200 1000 800 600 400 200 0 -200 -400 -600 -800 PSRR+ Representative Part 80 CMRR 70 PSRR- 60 50 40 30 20 10 10 100 100 FIGURE 2-12: Frequency. 1k 10k 1000 10000 Frequency (Hz) 100k 1M 100000 1000000 CMRR, PSRR vs. (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF. 90 10000 80 75 70 65 CMRR (VDD = 6.0V) 60 CMRR (VDD = 1.8V) 55 TA = +150C 1000 10 FIGURE 2-13: Temperature. CMRR, PSRR vs. Ambient 60 Quiescent Current (A/Amplifier) 65 VCMR_H - VOH @ VDD = 6.0V @ VDD = 1.8V 0.0 -0.1 VCMR_L - VSS @ VDD = 1.8V VOL - VSS @ VDD = 6.0V -0.2 50 6.0 5.5 5.0 4.5 4.0 40 35 30 25 0 25 50 75 100 Ambient Temperature (C) 3.5 45 -0.4 -25 125 VCM = 0.2VDD -50 150 FIGURE 2-14: Common Mode Input Voltage Range Limits vs. Ambient Temperature. VDD = 6.0V VDD = 5.0V VDD = 1.8V 55 -0.3 -50 3.0 FIGURE 2-16: Input Bias Current vs. Common Mode Input Voltage. 0.3 0.1 2.5 Common Mode Input Voltage (V) 0.4 0.2 2.0 150 1.5 125 1.0 0 25 50 75 100 Ambient Temperature (C) 0.5 -25 0.0 -50 -25 0 25 50 75 100 Ambient Temperature (C) 125 150 FIGURE 2-17: Quiescent Current vs. Ambient Temperature. 80 10000 70 30 TA = +125C TA = +85C TA = +25C TA = -40C 20 10 FIGURE 2-15: Input Bias, Offset Current vs. Ambient Temperature. (c) 2009-2011 Microchip Technology Inc. 7.0 6.5 3.5 3.0 2.5 150 2.0 50 75 100 125 Ambient Temperature (C) 1.5 25 0 1.0 1 0.0 Input Offset Current 6.0 10 40 5.5 100 50 5.0 Input Bias Current TA = +150C 60 4.5 1000 VCM = 0.2VDD 4.0 VDD = 6.0V Quiescent Current (A/Amplifier) Input Bias Current, Input Offset Current (pA) TA = +85C VDD = 6.0V 1 50 Common Mode Input Voltage Range Limits (V) TA = +125C 100 0.5 CMRR,PSRR (dB) Input Bias Current (pA) PSRR (VDD = 1.8V to 6.0V) 85 Power Supply Voltage (V) FIGURE 2-18: Quiescent Current vs. Power Supply Voltage. DS22229D-page 11 MCP6401/1R/1U/2/4/6/7/9 1.0E+00 1 1.0E+01 10 DC Open-Loop Gain (dB) FIGURE 2-19: Frequency. 150 145 140 135 130 125 120 115 110 105 100 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 -210 1.0E+07 100 1k 10k 100k 1M 10M Frequency (Hz) R L = 10 k VSS + 0.3V < V OUT < V DD - 0.3V 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Power Supply Voltage (V) 5.5 DC Open-Loop Gain (dB) FIGURE 2-21: DC Open-Loop Gain vs. Output Voltage Headroom. DS22229D-page 12 1.6 90 1.5 85 1.4 80 Phase Margin 1.3 75 1.2 70 1.1 65 1.0 60 0.9 55 Gain Bandwidth Product 0.8 50 VDD = 1.8V 0.7 45 -50 -25 0 25 50 75 100 125 150 Temperature (C) FIGURE 2-23: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. Output Short Circuit Current (mA) 0.25 0 25 50 75 100 125 150 Temperature (C) FIGURE 2-22: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. 6.0 FIGURE 2-20: DC Open-Loop Gain vs. Power Supply Voltage. 150 145 VDD = 6.0V 140 135 130 125 120 VDD = 1.8V 115 110 Large Signal AOL 105 100 0.00 0.05 0.10 0.15 0.20 Output Voltage Headroom VDD - VOH or VOL-VSS (V) 45 -50 -25 Open-Loop Gain, Phase vs. 50 0.7 Phase Margin () 0.1 55 VDD = 6.0V 25 20 TA = -40C TA = +25C TA = +85C TA = +125C TA = +150C 15 10 5 0 6.0 1.0E-01 Gain Bandwidth Product (MHz) -20 VDD = 6.0V 0.8 5.5 -180 5.0 0 60 Gain Bandwidth Product 0.9 4.5 -150 65 1.0 4.0 20 70 1.1 3.5 -120 3.0 40 75 1.2 2.5 -90 1.0 Open-Loop Phase 60 80 Phase Margin 1.3 2.0 -60 85 1.4 0.5 80 90 1.5 1.5 -30 1.6 0.0 100 Gain Bandwidth Product (MHz) 0 Open-Loop Gain Open-Loop Phase () Open-Loop Gain (dB) 120 Phase Margin () Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF. Power Supply Voltage (V) FIGURE 2-24: Output Short Circuit Current vs. Power Supply Voltage. (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF. 0.9 VDD = 6.0V 0.8 Slew Rate (V/s) Output Voltage Swing (V P-P) 10 VDD = 1.8V 1 Falling Edge, VDD = 6.0V Rising Edge, VDD = 6.0V 0.7 0.6 0.5 0.4 0.3 Falling Edge, VDD = 1.8V Rising Edge, VDD = 1.8V 0.2 0.1 0.1 100 100 1k 1000 FIGURE 2-25: Frequency. 10k 100k 10000 100000 Frequency (Hz) 1M 1000000 Output Voltage Swing vs. -50 -25 0 FIGURE 2-28: Temperature. 25 50 75 100 Temperature (C) 125 150 Slew Rate vs. Ambient VDD - VOH @ VDD = 1.8V VOL - VSS @ VDD = 1.8V 100 10 1 VDD - VOH @ VDD = 6.0V VOL - VSS @ VDD = 6.0V RL = 10 k 0.1 0.01 10 0.1 1 100 1000 Output Current (mA) Output Voltage (20 mv/div) Output Voltage Headroom (mV) 1000 10 10000 FIGURE 2-26: Output Voltage Headroom vs. Output Current. VDD = 6.0V G = +1 V/V Time (2 s/div) FIGURE 2-29: Pulse Response. Small Signal Non-Inverting VDD - VOH @ VDD = 6.0V VOL - VSS@ VDD = 6.0V 21 Output Voltage (20 mv/div) Output Voltage Headroom VDD - VOH or VOL - VSS (mV) 24 18 15 12 9 6 VDD - VOH @ VDD = 1.8V VOL - VSS @ VDD = 1.8V 3 0 -50 -25 0 25 50 75 100 Ambient Temperature (C) 125 150 FIGURE 2-27: Output Voltage Headroom vs. Ambient Temperature. (c) 2009-2011 Microchip Technology Inc. VDD = 6.0V G = -1 V/V Time (2 s/div) FIGURE 2-30: Response. Small Signal Inverting Pulse DS22229D-page 13 MCP6401/1R/1U/2/4/6/7/9 10000 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 VDD = 6.0V G = +1 V/V Closed Loop Output Impedance () Output Voltage (V) Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 100 k to VL and CL = 60 pF. 1000 100 GN: 101 V/V 11 V/V 1 V/V 10 1 1.0E+01 10 Time (20 s/div) Large Signal Non-Inverting Input, Output Voltages (V) 1.0E+05 100k 1.0E+06 1M 1.00E-04 100 1.00E-05 10 1 1.00E-06 -IIN (A) VDD = 6.0V G = -1 V/V TA = -40C TA = +25C TA = +85C TA = +125C TA = +150C 1.00E-07 100n 1.00E-08 10n 1n 1.00E-09 1.00E-10 100p 1.00E-11 10p 1p 1.00E-12 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 VIN (V) Time (20 s/div) Large Signal Inverting Pulse 7.0 6.0 VOUT 5.0 VIN 3.0 2.0 0.0 1.0E+04 1k 10k Frequency (Hz) 1.00E-03 FIGURE 2-32: Response. 1.0 1.0E+03 1m 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 4.0 100 FIGURE 2-34: Closed Loop Output Impedance vs. Frequency. VDD = 6.0V G = +2 V/V -1.0 Time (0.1 ms/div) FIGURE 2-33: The MCP6401/1R/1U/2/4/6/7/9 Shows No Phase Reversal. DS22229D-page 14 FIGURE 2-35: Measured Input Current vs. Input Voltage (below VSS). Channel to Channel Separation (dB) Output Voltage (V) FIGURE 2-31: Pulse Response. 1.0E+02 150 140 130 120 110 100 Input Referred 90 80 100 100 10000 1k 10k Frequency (Hz) 1000 100000 100k FIGURE 2-36: Channel-to-Channel Separation vs. Frequency (MCP6402/4/7/9 only). (c) 2009-2011 Microchip Technology Inc. (c) 2009-2011 Microchip Technology Inc. 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE 1 MCP6401 MCP6401R MCP6401U SC70-5, SOT-23-5 SOT-23-5 SOT-23-5 1 1 4 MCP6402 MCP6404 MCP6406 MCP6407 MCP6409 SOIC 2x3 TDFN SOIC, TSSOP SOT-23-5 SOIC SOIC 1 1 1 1 1 1 Symbol Description VOUT, VOUTA Analog Output (op amp A) 4 4 3 2 2 2 4 2 2 VIN-, VINA- Inverting Input (op amp A) 3 3 1 3 3 3 3 3 3 VIN+, VINA+ Non-inverting Input (op amp A) 5 2 5 8 8 4 5 8 4 VDD Positive Power Supply -- -- -- 5 5 5 -- 5 5 VINB+ Non-inverting Input (op amp B) -- -- -- 6 6 6 -- 6 6 VINB- Inverting Input (op amp B) -- -- 7 7 7 -- 7 7 VOUTB Analog Output (op amp B) -- -- -- -- 8 -- -- 8 VOUTC Analog Output (op amp C) -- -- -- -- -- 9 -- -- 9 VINC- Inverting Input (op amp C) -- -- -- -- -- 10 -- -- 10 VINC+ Non-inverting Input (op amp C) 2 5 2 4 4 11 2 4 11 VSS -- -- -- -- -- 12 -- -- 12 VIND+ Non-inverting Input (op amp D) Negative Power Supply -- -- -- -- -- 13 -- -- 13 VIND- Inverting Input (op amp D) -- -- -- -- -- 14 -- -- 14 VOUTD Analog Output (op amp D) -- -- -- -- 9 -- -- -- -- EP Exposed Thermal Pad (EP); must be connected to VSS. DS22229D-page 15 MCP6401/1R/1U/2/4/6/7/9 -- -- MCP6401/1R/1U/2/4/6/7/9 3.1 Analog Output (VOUT) The output pin is low-impedance voltage source. 3.2 Analog Inputs (VIN+, VIN-) The non-inverting and inverting inputs are highimpedance CMOS inputs with low bias currents. 3.3 Power Supply Pin (VDD, VSS) The positive power supply (VDD) is 1.8V to 6.0V higher than the negative power supply (VSS). For normal operation, the other pins are at voltages between VSS and VDD. Typically, these parts are used in a single (positive) supply configuration. In this case, VSS is connected to ground and VDD is connected to the supply. VDD will need bypass capacitors. DS22229D-page 16 (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 4.0 APPLICATION INFORMATION The MCP6401/1R/1U/2/4/6/7/9 family of op amps is manufactured using Microchip's state-of-the-art CMOS process and is specifically designed for low-power, high-precision applications. 4.1 VDD D1 D2 U1 V1 VOUT Rail-to-Rail Input 4.1.1 MCP640x V2 PHASE REVERSAL The MCP6401/1R/1U/2/4/6/7/9 op amps are designed to prevent phase reversal when the input pins exceed the supply voltages. Figure 2-33 shows the input voltage exceeding the supply voltage with no phase reversal. 4.1.2 INPUT VOLTAGE LIMITS In order to prevent damage and/or improper operation of these amplifiers, the circuit must limit the voltages at the input pins (see Section 1.1 "Absolute Maximum Ratings "). The ESD protection on the inputs can be depicted as shown in Figure 4-1. This structure was chosen to protect the input transistors against many (but not all) over-voltage conditions, and to minimize the input bias current (IB). FIGURE 4-2: Inputs. Protecting the Analog A significant amount of current can flow out of the inputs when the Common Mode voltage (VCM) is below ground (VSS); See Figure 2-35. 4.1.3 INPUT CURRENT LIMITS In order to prevent damage and/or improper operation of these amplifiers, the circuit must limit the currents into the input pins (see Section 1.1 "Absolute Maximum Ratings "). Figure 4-3 shows one approach to protecting these inputs. The resistors R1 and R2 limit the possible currents in or out of the input pins (and the ESD diodes, D1 and D2). The diode currents will go through either VDD or VSS. VDD VDD Bond Pad D1 VIN+ Bond Pad Input Stage Bond VIN- Pad D2 U1 V1 R1 VOUT MCP640x V2 R2 VSS Bond Pad FIGURE 4-1: Structures. Simplified Analog Input ESD The input ESD diodes clamp the inputs when they try to go more than one diode drop below VSS. They also clamp any voltages that go well above VDD; their breakdown voltage is high enough to allow normal operation, but not low enough to protect against slow over-voltage (beyond VDD) events. Very fast ESD events (that meet the spec) are limited so that damage does not occur. In some applications, it may be necessary to prevent excessive voltages from reaching the op amp inputs; Figure 4-2 shows one approach to protecting these inputs. (c) 2009-2011 Microchip Technology Inc. min(R1,R2) > VSS - min(V1, V2) 2 mA min(R1,R2) > max(V1,V2) - VDD 2 mA FIGURE 4-3: Inputs. 4.1.4 Protecting the Analog NORMAL OPERATION The input stage of the MCP6401/1R/1U/2/4/6/7/9 op amps use two differential input stages in parallel. One operates at a low Common Mode input voltage (VCM), while the other operates at a high VCM. With this topology, the device operates with a VCM up to 300 mV above VDD and 300 mV below VSS (see Figure 2-14). The input offset voltage is measured at VCM = VSS - 0.3V and VDD + 0.3V to ensure proper operation. The transition between the input stages occurs when VCM is near VDD - 1.1V (see Figures 2-6 and 2-7). For the best distortion performance and gain linearity, with non-inverting gains, avoid this region of operation. DS22229D-page 17 MCP6401/1R/1U/2/4/6/7/9 4.2 Rail-to-Rail Output The output voltage range of the MCP6401/1R/1U/2/4/6/7/9 op amps is VSS + 20 mV (minimum) and VDD - 20 mV (maximum) when RL = 10 k is connected to VDD/2 and VDD = 6.0V. Refer to Figures 2-26 and 2-27 for more information. 4.3 4.4 Capacitive Loads Driving large capacitive loads can cause stability problems for voltage feedback op amps. As the load capacitance increases, the feedback loop's phase margin decreases and the closed-loop bandwidth is reduced. This produces gain peaking in the frequency response, with overshoot and ringing in the step response. While a unity-gain buffer (G = +1 V/V) is the most sensitive to capacitive loads, all gains show the same general behavior. When driving large capacitive loads with these op amps (e.g., > 100 pF when G = +1 V/V), a small series resistor at the output (RISO in Figure 4-4) improves the feedback loop's phase margin (stability) by making the output load resistive at higher frequencies. The bandwidth will be generally lower than the bandwidth with no capacitance load. - Supply Bypass With this family of operational amplifiers, the power supply pin (VDD for single-supply) should have a local bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm for good high frequency performance. It can use a bulk capacitor (i.e., 1 F or larger) within 100 mm to provide large, slow currents. This bulk capacitor can be shared with other analog parts. 4.5 Unused Op Amps An unused op amp in quad packages (MCP6404 or MCP6409) should be configured as shown in Figure 46. These circuits prevent the output from toggling and causing crosstalk. Circuit A sets the op amp at its minimum noise gain. The resistor divider produces any desired reference voltage within the output voltage range of the op amp, which buffers that reference voltage. Circuit B uses the minimum number of components and operates as a comparator, but it may draw more current. RISO MCP640x + VIN After selecting RISO for your circuit, double-check the resulting frequency response peaking and step response overshoot. Modify RISO's value until the response is reasonable. Bench evaluation and simulations with the MCP6401/1R/1U/2/4/6/7/9 SPICE macro model are very helpful. VOUT CL FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. Figure 4-5 gives recommended RISO values for different capacitive loads and gains. The x-axis is the normalized load capacitance (CL/GN), where GN is the circuit's noise gain. For non-inverting gains, GN and the Signal Gain are equal. For inverting gains, GN is 1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V). 1/4 MCP6404 (B) 1/4 MCP6404 (A) VDD R1 VDD VDD R2 VREF R2 VREF = VDD x ------------------R 1 + R2 FIGURE 4-6: Unused Op Amps. Recommended R ISO () 10000 VDD = 6.0 V RL = 10 k 1000 100 10 GN: 1 V/V 2 V/V 5 V/V 1 10p 100p 1.E-09 1n 10n 0.1 1 1.E-11 1.E-10 1.E-08 1.E-07 1.E-06 Normalized Load Capacitance; CL/GN (F) FIGURE 4-5: Recommended RISO Values for Capacitive Loads. DS22229D-page 18 (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 4.6 PCB Surface Leakage 4.7 In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5 pA of current to flow; which is greater than the MCP6401/1R/1U/2/4/6/7/9 family's bias current at +25C (1.0 pA, typical). The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 4-7. Guard Ring VIN- VIN+ VSS 4.7.1 Application Circuits PRECISION HALF-WAVE RECTIFIER The precision half-wave rectifier, which is also known as a super diode, is a configuration obtained with an operational amplifier in order to have a circuit behave like an ideal diode and rectifier. It effectively cancels the forward voltage drop of the diode so that very low level signals can still be rectified with minimal error. This can be useful for high-precision signal processing. The MCP6401/1R/1U/2/4/6/7/9 op amps have high input impedance, low input bias current and rail-to-rail input/output, which makes this device suitable for precision rectifier applications. Figure 4-8 shows a precision half-wave rectifier and its transfer characteristic. The rectifier's input impedance is determined by the input resistor R1. To avoid loading effect, it must be driven from a low-impedance source. When VIN is greater than zero, D1 is OFF, D2 is ON, and VOUT is zero. When VIN is less than zero, D1 is ON, D2 is OFF, and VOUT is the VIN with an amplification of -R2/R1. FIGURE 4-7: for Inverting Gain. Example Guard Ring Layout The rectifier circuit shown in Figure 4-8 has the benefit that the op amp never goes in saturation, so the only thing affecting its frequency response is the amplification and the gain bandwidth product. . 1. 2. Non-inverting Gain and Unity-Gain Buffer: a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b) Connect the guard ring to the inverting input pin (VIN-). This biases the guard ring to the Common Mode input voltage. Inverting Gain and Transimpedance Gain Amplifiers (convert current to voltage, such as photo detectors): a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the op amp (e.g., VDD/2 or ground). b) Connect the inverting pin (VIN-) to the input with a wire that does not touch the PCB surface. R2 D2 VIN R1 VOUT MCP6401 D1 Precision Half-Wave Rectifier VOUT -R2/R1 VIN Transfer Characteristic FIGURE 4-8: Rectifier. (c) 2009-2011 Microchip Technology Inc. Precision Half-Wave DS22229D-page 19 MCP6401/1R/1U/2/4/6/7/9 4.7.2 BATTERY CURRENT SENSING The MCP6401/1R/1U/2/4/6/7/9 op amps' Common Mode Input Range, which goes 0.3V beyond both supply rails, supports their use in high-side and lowside battery current sensing applications. The low quiescent current (45 A, typical) helps prolong battery life, and the rail-to-rail output supports detection of low currents. Figure 4-9 shows a high-side battery current sensor circuit. The 10 resistor is sized to minimize power losses. The battery current (IDD) through the 10 resistor causes its top terminal to be more negative than the bottom terminal. This keeps the Common Mode input voltage of the op amp below VDD, which is within its allowed range. The output of the op amp will also be below VDD, which is within its Maximum Output Voltage Swing specification. 4.7.3 INSTRUMENTATION AMPLIFIER The MCP6401/1R/1U/2/4/6/7/9 op amps are well suited for conditioning sensor signals in batterypowered applications. Figure 4-10 shows a two op amp instrumentation amplifier, using the MCP6402, that works well for applications requiring rejection of Common Mode noise at higher gains. The reference voltage (VREF) is supplied by a low impedance source. In single supply applications, VREF is typically VDD/2. RG VREF R1 R2 R2 1.8V to 6.0V To load 10 100 k VDD VOUT MCP6401 1 M VOUT V2 1/2 MCP6402 IDD R1 1/2 MCP6402 V1 R 1 2R 1 VOUT = ( V 1 - V 2 ) 1 + ------ + --------- + V REF R 2 RG FIGURE 4-10: Two Op Amp Instrumentation Amplifier. V DD - VOUT I DD = -----------------------------------------( 10 V/V ) ( 10 ) FIGURE 4-9: DS22229D-page 20 Supply Current Sensing. (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 5.0 DESIGN AIDS Microchip provides the basic design tools needed for the MCP6401/1R/1U/2/4/6/7/9 family of op amps. 5.1 SPICE Macro Model The latest SPICE macro model for the MCP6401/1R/1U/2/4/6/7/9 op amp is available on the Microchip web site at www.microchip.com. The model was written and tested in official Orcad (Cadence) owned PSPICE. For other simulators, translation may be required. The model covers a wide aspect of the op amp's electrical specifications. Not only does the model cover voltage, current, and resistance of the op amp, but it also covers the temperature and noise effects on the behavior of the op amp. The model has not been verified outside of the specification range listed in the op amp data sheet. The model behaviors under these conditions cannot be guaranteed to match the actual op amp performance. Moreover, the model is intended to be an initial design tool. Bench testing is a very important part of any design and cannot be replaced with simulations. Also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. 5.2 FilterLab(R) Software Microchip's FilterLab(R) software is an innovative software tool that simplifies analog active filter (using op amps) design. Available at no cost from the Microchip web site at www.microchip.com/filterlab, the FilterLab design tool provides full schematic diagrams of the filter circuit with component values. It also outputs the filter circuit in SPICE format, which can be used with the macro model to simulate actual filter performance. 5.3 Microchip Advanced Part Selector (MAPS) MAPS is a software tool that helps semiconductor professionals efficiently identify Microchip devices that fit a particular design requirement. Available at no cost from the Microchip website at www.microchip.com/maps, the MAPS is an overall selection tool for Microchip's product portfolio that includes Analog, Memory, MCUs and DSCs. Using this tool, you can define a filter to sort features for a parametric search of devices and export side-by-side technical comparison reports. Helpful links are also provided for Datasheets, Purchase, and Sampling of Microchip parts. (c) 2009-2011 Microchip Technology Inc. 5.4 Analog Demonstration and Evaluation Boards Microchip offers a broad spectrum of Analog Demonstration and Evaluation Boards that are designed to help you achieve faster time to market. For a complete listing of these boards and their corresponding user's guides and technical information, visit www.microchip.com/analogtools, the Microchip web site. Some boards that are especially useful are: * * * * * * * MCP6XXX Amplifier Evaluation Board 1 MCP6XXX Amplifier Evaluation Board 2 MCP6XXX Amplifier Evaluation Board 3 MCP6XXX Amplifier Evaluation Board 4 Active Filter Demo Board Kit 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board, P/N SOIC8EV * 14-Pin SOIC/TSSOP/DIP Evaluation Board, P/N SOIC14EV 5.5 Application Notes The following Microchip Analog Design Note and Application Notes are available on the Microchip web site at www.microchip.com/appnotes and are recommended as supplemental reference resources. * ADN003: "Select the Right Operational Amplifier for your Filtering Circuits", DS21821 * AN722: "Operational Amplifier Topologies and DC Specifications", DS00722 * AN723: "Operational Amplifier AC Specifications and Applications", DS00723 * AN884: "Driving Capacitive Loads With Op Amps", DS00884 * AN990: "Analog Sensor Conditioning Circuits - An Overview", DS00990 * AN1177: "Op Amp Precision Design: DC Errors", DS01177 * AN1228: "Op Amp Precision Design: Random Noise", DS01228 * AN1297: "Microchip's Op Amp SPICE Macro Models", DS01297 * AN1332: "Current Sensing Circuit Concepts and Fundamentals", DS01332 These application notes and others are listed in the design guide: * "Signal Chain Design Guide", DS21825 DS22229D-page 21 MCP6401/1R/1U/2/4/6/7/9 6.0 PACKAGING INFORMATION 6.1 Package Marking Information 5-Lead SC70 (MCP6401 only) Example: BL25 5-Lead SOT-23 (MCP6401/1R/1U, MCP6406) Part Number Code MCP6401T-E/OT NLNN MCP6401T-H/OT U8NN MCP6401RT-E/OT NMNN MCP6401RT-H/OT U9NN MCP6401UT-E/OT NPNN MCP6401UT-H/OT V8NN MCP6406T-E/OT ZXNN MCP6406T-H/OT ZYNN 8-Lead TDFN (2 x 3) (MCP6402 only) Legend: XX...X Y YY WW NNN e3 * Note: DS22229D-page 22 NL25 Example: Part Number Code MCP6402T-E/MNY AAW 8-Lead SOIC (150 mil) (MCP6401, MCP6402, MCP6407) NNN Example: AAW 129 25 Example: MCP6402E e3 SN ^^1129 256 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 Package Marking Information (Continued) 14-Lead SOIC (150 mil) (MCP6404, MCP6409) Example: MCP6404 H/SL e ^^3 1129256 and 14-Lead TSSOP (MCP6404 only) XXXXXXXX YYWW NNN Legend: XX...X Y YY WW NNN e3 * Note: Example: 6404E/ST 1129 256 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. (c) 2009-2011 Microchip Technology Inc. DS22229D-page 23 MCP6401/1R/1U/2/4/6/7/9 . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / D b 3 1 2 E1 E 4 e A e 5 A2 c A1 L 3# 4# 5$8 %1 44" " 5 5 56 7 ( 1# 6, : # ; < ; < < !!1/ / #! %% 9()* 6, =!# " ; !!1/=!# " ( ( ( 6, 4# ; ( . 4 9 #4# 4! / 4!=!# ; < 9 8 ( < !"! #$! !% # $ !% # $ !# "'( )*+ ) #&#,$ --# $## #&! ! DS22229D-page 24 - *9) (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / (c) 2009-2011 Microchip Technology Inc. DS22229D-page 25 MCP6401/1R/1U/2/4/6/7/9 ! . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / b N E E1 3 2 1 e e1 D A2 A c A1 L L1 3# 4# 5$8 %1 44" " 5 56 7 5 ( 4!1# ()* 6$# !4!1# 6, : # < ; < < ( 6, =!# " < !!1/=!# " < ; 6, 4# < !!1/ / #! %% )* ( . #4# 4 < 9 . # # 4 ( < ; . # > < > ; < 9 4! / 4!=!# 8 < ( !"! #$! !% # $ !% # $ #&! ! !# "'( )*+ ) #&#,$ --# $## DS22229D-page 26 - *) (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (c) 2009-2011 Microchip Technology Inc. DS22229D-page 27 MCP6401/1R/1U/2/4/6/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22229D-page 28 (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (c) 2009-2011 Microchip Technology Inc. DS22229D-page 29 MCP6401/1R/1U/2/4/6/7/9 " #$%!&'()* . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / DS22229D-page 30 (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (c) 2009-2011 Microchip Technology Inc. DS22229D-page 31 MCP6401/1R/1U/2/4/6/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22229D-page 32 (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 " + , % -./# 0!0&()+, . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / (c) 2009-2011 Microchip Technology Inc. DS22229D-page 33 MCP6401/1R/1U/2/4/6/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22229D-page 34 (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (c) 2009-2011 Microchip Technology Inc. DS22229D-page 35 MCP6401/1R/1U/2/4/6/7/9 . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / DS22229D-page 36 (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (c) 2009-2011 Microchip Technology Inc. DS22229D-page 37 MCP6401/1R/1U/2/4/6/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22229D-page 38 (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (c) 2009-2011 Microchip Technology Inc. DS22229D-page 39 MCP6401/1R/1U/2/4/6/7/9 APPENDIX A: REVISION HISTORY Revision D (September 2011) The following is the list of modifications: 1. Section 1.0 "Electrical Characteristics": Updated minor typographical corrections in both "DC Electrical Specifications" tables to show the correct unit for RL (k instead of kW). Revision C (August 2011) The following is the list of modifications: 1. 2. 3. 4. 5. 6. 7. 8. Added new MCP6406, MCP6407 and MCP6409 devices and the related information throughout the document. Created two package type drawings based on the temperature characterization (see E Temp Package Types and H Temp Package Types). Added MCP6406/7/9 specification tables in Section 1.3 "MCP6406/7/9 Electrical Specifications". Updated characterization graphics in Section 2.0 "Typical Performance Curves". Updated Table 3-1 in Section 3.0 "Pin Descriptions" to show all the devices. Updated markings examples in Section 6.1 "Package Marking Information". Updated the package markings information to show all drawings available for each type of package. Updated the Product Identification System page with the new devices and temperature specifications. DS22229D-page 40 Revision B (June 2010) The following is the list of modifications: 1. Added the MCP6402 and MCP6404 package information. 2. Updated the ESD protection value on all pins in Section 1.1 "Absolute Maximum Ratings ". 3. Added Figure 2-36. 4. Updated Table 3-1. 5. Updated Section 4.1.2 "Input Voltage Limits". 6. Added Section 4.1.3 "Input Current Limits". 7. Added Section 4.5 "Unused Op Amps". 8. Updated Section 5.4 "Analog Demonstration and Evaluation Boards". 9. Updated the package markings information and drawings. 10. Updated the Product Identification System page. Revision A (December 2009) Original data sheet for the MCP6401/1R/1U/2/4/6/7/9 family of devices. (c) 2009-2011 Microchip Technology Inc. MCP6401/1R/1U/2/4/6/7/9 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. -X /XX Device Temperature Range Package Device: MCP6401T: MCP6401RT: MCP6401UT: MCP6402: MCP6402T: MCP6404: MCP6404T: MCP6406T: MCP6407: MCP6407T: MCP6409: MCP6409T: Temperature Range: Package: E H Single Op Amp (Tape and Reel) (SC70, SOT-23) Single Op Amp (Tape and Reel) (SOT-23) Single Op Amp (Tape and Reel) (SOT-23) Dual Op Amp Dual Op Amp (Tape and Reel) (SOIC, 2x3 TDFN) Quad Op Amp Quad Op Amp (Tape and Reel) (SOIC, TSSOP) Single Op Amp (Tape and Reel) (SOT-23) Dual Op Amp Dual Op Amp (Tape and Reel) (SOIC) Quad Op Amp Quad Op Amp (Tape and Reel) (SOIC) = -40C to +125C (Extended Temperature) = -40C to +150C (High Temperature) LT = OT = SN = MNY* = SL = ST = Plastic Package (SC70), 5-lead Plastic Small Outline Transistor (SOT-23), 5-lead Plastic SOIC, (3.90 mm body), 8-lead Plastic Dual Flat, No Lead, (2x3 TDFN), 8-lead Plastic SOIC (3.90 mm body), 14-lead Plastic TSSOP (4.4mm body), 14-lead * Y = Nickel palladium gold manufacturing designator. Only available on the TDFN package. (c) 2009-2011 Microchip Technology Inc. Examples: a) MCP6401T-E/LT: Tape and Reel, Extended Temperature, 5LD SC70 pkg Tape and Reel, Extended Temperature, 5LD SOT-23 pkg Tape and Reel, 5LD SOT-23 pkg Tape and Reel, Extended Temperature, 5LD SOT-23 pkg b) MCP6401T-E/OT: c) MCP6401RT-E/OT: d) MCP6401UT-E/OT: e) MCP6402-E/SN: f) MCP6402T-E/SN: g) MCP6402T-E/MNY: h) MCP6404-E/SL: i) MCP6404T-E/SL: j) MCP6404-E/ST: k) MCP6404T-E/ST: a) MCP6401T-H/OT: Tape and Reel, High Temperature, 5LD SOT-23 pkg b) MCP6402-H/SN: c) MCP6402T-H/SN: High Temperature, 8LD SOIC pkg Tape and Reel, High Temperature, 8LD SOIC pkg d) MCP6404-H/SL: e) MCP6404T-H/SL: f) MCP6406T-H/OT: Tape and Reel, High Temperature, 5LD SOT-23 pkg g) MCP6407-H/SN: h) MCP6407T-H/SN: High Temperature, 8LD SOIC pkg Tape and Reel, High Temperature, 8LD SOIC pkg i) MCP6409-H/SL: j) MCP6409T-H/SL: Extended Temperature, 8LD SOIC pkg Tape and Reel, Extended Temperature, 8LD SOIC pkg Tape and Reel, Extended Temperature, 8LD 2x3 TDFN pkg Extended Temperature, 14LD SOIC pkg Tape and Reel, Extended Temperature, 14LD SOIC pkg Extended Temperature, 14LD TSSOP pkg Tape and Reel, Extended Temperature, 14LD TSSOP pkg. High Temperature, 14LD SOIC pkg Tape and Reel, High Temperature, 14LD SOIC pkg High Temperature, 14LD SOIC pkg Tape and Reel, High Temperature, 14LD SOIC pkg DS22229D-page 41 MCP6401/1R/1U/2/4/6/7/9 NOTES: DS22229D-page 42 (c) 2009-2011 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2009-2011, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-61341-616-7 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2009-2011 Microchip Technology Inc. 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