1
®
TB415.1
Using the EL7566 Demo Board
Introduction
The EL7566 is a high efficiency full-
featured synchronous 6A step-down
regulator. This document lists the
completed schematic diagram and BOM, as well as the
layout. With components on one side of the PCB, the
complete converter occupies less than 0.72in2 of space.
Please refer to the datasheet for the application of features.
This demo board is preset to 1.8V for VO and operates at
500kHz switching frequency. The measured crossover
frequencies are around 50kHz with the compensation
values.
Circuit Diagram
CC
VREF
FB
VO
VTJ
TM
SEL
LX
LX
LX
LX
LX
LX
NC
SGND
COSC
STN
STP
EN
PG
VDD
VIN
VIN
VIN
PGND
PGND
PGND
NC
1
2
3
4
28
27
26
25
5
6
7
24
23
22
821
9
10
20
19
11
12
13
18
17
16
14 15
EL7566CRE
U1
+
+
R0
7.68K
C0
8200pF
C1
OPEN C2
0.022µF
R1
12.7K
R2
10.2K
VTJ C4
0.022µF
TM
LX
L1
2.7µH
C5
150µF
VOUT
C7
270pF
R3
OPEN
C8
1µF
C9
1µF
C10
100µF
VIN
PG
EN
STP
STN
R6
10K
SEL
R5
10K
GND
GND
R4
OPEN
C11
OPEN
C12
OPEN
Technical Brief July 9, 2003
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
2
The output voltage can be as high as the input voltage minus
the PMOS and inductor voltage drops. Use R1 and R2 to set
the output voltage according to the following formula:
Where VFB=0.8V
When the resisters are changed, please change the
compensation capacitor C0 and resister R0. For the
convenience, standard values of R1 and R2 are listed in
Table 2.
R5 and R6 can be eliminated if voltage margin feature is not
used. Connect TM and SEL pins directly to ground.
1206, 1210, 1812, and D-size can be placed at C5 and C10
positions.
Ceramic capacitors (X5R or X7R types only) can be use for
the input and output with equivalent capacitance for C5 and
C10. Different R0 and C0 are required. Table 3 lists the
compensation values with MLCC capacitors.
TABLE 1. DEMO BOARD BILL OF MATERIAL WITH SPCAP (VO = 1.8V)
DESIGNATOR VALUE PACKAGE MANUFACTURER PHONE # PART NUMBER
C08200pF 0603 Any X5R or X7R
C2, C40.022µF 0603 Any X5R or X7R
C5 (Note 1) 150µF/4V D-Size Panasonic 408-945-5660 EEFUD0G151(X)R
C7270pF 5% 0603 Any
C81µF 0603 Any X5R or X7R
C91µF 0603 Any X5R or X7R
C10 (Note 2) 100µF/6V D-Size Panasonic EEFUD0J101(X)R
R07.68K/1% 0603 Any
R112.7K/1% 0603 Any
R210.2K/1% 0603 Any
R510K/1% 0603 Any
R610K/1% 0603 Any
L12.7µH Coilcraft 847-639-6400 DO3316P-272HC
U1 EL7566DRE HTSSOP-28 Intersil 888-INTERSIL EL7566DRE
NOTES:
1. May be substituted by Sanyo (619-661-6835) POSCAP 4TPE150M.
2. May be substituted by Sanyo POSCAP 6TPE100M or higher value.
TABLE 2. FEEDBACK RESISTER AND COMPENSATION
VALUES (SPCAP)
VO (V) C0 (pF) R0 (kΩ) R1 (kΩ) R2 (kΩ)
0.8 8200 3.57 0Open
18200 4.42 2.49 10
1.2 8200 5.23 4.99 10
1.5 8200 6.49 10 11.5
1.8 8200 7.68 12.7 10.2
2.5 8200 10.5 21.5 10
3.3 8200 13.7 36 11.5
VOVFB 1R1
R2
-------+
×=TABLE 3. FEEDBACK RESISTER AND COMPENSATION
VALUES WITH MLCC CAPACITORS
VO (V) C0 (µF) R0 (kΩ) R1 (kΩ) R2 (kΩ)
0.8 0.012 3.09 0Open
10.012 3.57 2.49 10
1.2 0.012 4.42 4.99 10
1.5 0.012 5.23 10 11.5
1.8 0.012 6.49 12.7 10.2
2.5 0.012 7.68 21.5 10
3.3 0.012 10.5 36 11.5
Technical Brief 415
3
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
Demo Board Layout
TOP LAYER
TOP SILKSCREEN
BOTTOM LAYER
Technical Brief 415
