PBSS3515M,315 - NEXPERIA

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DATA SH EET

Product data sheet 2003 Jul 22

DISCRETE SEMICONDUCTORS

PBSS3515M

15 V, 0.5 A

PNP low VCEsat (BISS) transistor

M3D883

BOTTOM VIEW

2003 Jul 22 2

NXP Semiconductors Product data sheet

15 V, 0.5 A

PNP low VCEsat (BISS) transistor PBSS3515M

FEATURES

•Low collector-emitter saturation volt age VCEsat

•High collector current capability IC and ICM

•High efficiency lead ing to reduced heat generation

•Reduced printed-circuit board requirements.

APPLICATIONS

•Power management:

– DC-DC converter

– Supply line switching

– Battery charge r

– LCD backlighting.

•Peripheral driver:

– Driver in low supply voltag e applications (e.g. lamps

and LEDs).

– Inductive load dr ivers (e.g. relays, buzzer s and

motors).

DESCRIPTION

Low VCEsat PNP transistor in a SOT883 leadless ultra

small plastic package.

NPN complement: PBSS2515M.

PINNING

PIN DESCRIPTION

1base

2emitter

3collector

handbook, halfpage

MAM469

Bottom view 2

Fig.1 Simplified outline (SOT883) and symbol.

MARKING

TYPE NUMBER MARKING CODE

PBSS3515M DB

QUICK REFERENCE DATA

SYMBOL PARAMETER MAX. UNIT

VCEO collector-emitter voltage −15 V

ICcollector current (DC) −500 mA

ICM peak collector current −1 A

RCEsat equivalent on-resistance <500 mΩ

2003 Jul 22 3

NXP Semiconductors Pr oduct data shee t

15 V, 0.5 A

PNP low VCEsat (BISS) transistor PBSS3515M

LIMITING VALUES

In accordance with th e Absolute Maximum Ratin g S ystem (IEC 60134).

Notes

1. Refer to SOT883 standard mounting conditions.

2. Device mounted on an FR4 printed-circ uit board, single-sided copp er, tinplated, stand ard footprint, with 60 μm

copper strip line.

3. Device mounted on a pr inted-circuit board, single-s ided copper, tinplate d, mounting pad for collector 1 cm2.

THERMAL CHARACTE RISTICS

Notes

1. Refer to SOT883 standard mounting conditions.

2. Device mounted on an FR4 printed-circ uit board, single-sided copp er, tinplated, stand ard footprint, with 60 μm

copper strip line.

3. Device mounted on a pr inted-circuit board, single-s ided copper, tinplate d, mounting pad for collector 1 cm2.

4. Operated under pulsed conditions: duty cy cle δ ≤ 20%, pulse width tp ≤ 30 ms.

Soldering

Reflow soldering is the only recommended soldering method.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

VCBO collector-base volta ge open emitter − −15 V

VCEO collector-emitter voltage open base − −15 V

VEBO emitter-base voltage open collector − −6 V

ICcollector current (DC) notes 1 and 2 − −500 mA

ICM peak collector current − −1 A

IBM peak base current − −100 mA

Ptot total power dissipation Tamb ≤ 25 °C; notes 1 and 2 −250 mW

Tamb ≤ 25 °C; note 1 and 3 −430 mW

Tstg storage temperature −65 +150 °C

Tjjunction temperature −150 °C

Tamb operating ambient temperature −65 +150 °C

SYMBOL PARAMETER CONDITIONS VALUE UNIT

Rth j-a thermal resistance from junction to

ambient in free air; notes 1 and 2 500 K/W

in free air; notes 1, 3 and 4 290 K/W

2003 Jul 22 4

NXP Semiconductors Pr oduct data shee t

15 V, 0.5 A

PNP low VCEsat (BISS) transistor PBSS3515M

CHARACTERISTICS

Tamb = 25 °C unless otherwise specified.

Note

1. Pulse test: tp ≤ 300 μs; δ ≤ 0.02.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

ICBO collector-base cut-off current VCB = −15 V; IE = 0 −−−100 nA

VCB = −15 V; IE = 0; Tj = 150 °C−−−50 μA

IEBO emitter-base cu t-off current VEB = −5 V; IC = 0 −−−100 nA

hFE DC current gain VCE = −2 V; IC = −10 mA 200 − −

VCE = −2 V; IC = −100 mA; note 1 150 − −

VCE = −2 V; IC = −500 mA; note 1 90 − −

VCEsat collector-emitte r sa turation v oltage IC = −10 mA; IB = −0.5 mA −−−25 mV

IC = −200 mA; IB = −10 mA; note 1 −−−150 mV

IC = −500 mA; IB = −50 mA; note 1 −−−250 mV

RCEsat equivalent on-resistance IC = −500 mA; IB = −50 mA; note 1 −300 <500 mΩ

VBEsat base-emitt er saturation voltage IC = −500 mA; IB = −50 mA; note 1 −−−1.1 V

VBEon base-emitter turn-on voltage VCE = −2 V; IC = −100 mA; note 1 −−−0.9 V

fTtransition frequen c y IC = −100 mA; VCE = −5 V;

f = 100 MHz 100 280 −MHz

Cccollector capacitance VCB = −10 V; IE = Ie = 0; f = 1 MHz −−10 pF

2003 Jul 22 5

NXP Semiconductors Pr oduct data shee t

15 V, 0.5 A

PNP low VCEsat (BISS) transistor PBSS3515M

handbook, halfpage

400

600

200

MLD665

−10−1−1−10 I

(mA)

hFE

−102−103

(2)

(1)

(3)

Fig.2 DC current gain as a fu nction of collector

current; ty pical values.

(1) Tamb = 150 °C.

(2) Tamb = 25 °C.

(3) Tamb = −55 °C.

VCE = −2 V.

handbook, halfpage

−200

−1200

−400

−600

−800

−1000

MLD667

−1−10−1IC (mA)

VBE

(mV)

−10 −102−103

(1)

(3)

(2)

Fig.3 Base-emitter voltage as a function of

collector current; typical values.

(1) Tamb = −55 °C.

(2) Tamb = 25 °C.

(3) Tamb = 150 °C.

VCE = −2 V.

handbook, halfpage

−103

−102

−10

−1

MLD669

−10−1−1−10 IC (mA)

VCEsat

(mV)

−102−103

(1)

(2)

(3)

Fig.4 Collector-emitter saturation voltage as a

function of collector current; typical values.

(1) Tamb = 150 °C.

(2) Tamb = 25 °C.

(3) Tamb = −55 °C.

IC/IB = 20.

handbook, halfpage

−200

−1200

−400

−600

−800

−1000

MLD668

−1−10−1IC (mA)

VBEsat

(mV)

−10 −102−103

(2)

(3)

(1)

Fig.5 Base-emitter saturation v oltage as a

function of collector current; typical values.

(1) Tamb = 150 °C.

(2) Tamb = 25 °C.

(3) Tamb = −55 °C.

IC/IB = 20.

2003 Jul 22 6

NXP Semiconductors Pr oduct data shee t

15 V, 0.5 A

PNP low VCEsat (BISS) transistor PBSS3515M

handbook, halfpage

(1)

(2)(3)

(4)

(5)

(6)

(7)

(8)

(10)

(mA)

VCE (V)

−1200

−800

−400

0−2−10

−4−6−8

MLD666

(9)

Fig.6 Collector current as a function of

collector-emitter voltage; typical values.

(1) IB = −7 mA.

(2) IB = −6.3 mA.

(3) IB = −5.6 mA.

(4) IB = −4.9 mA.

(5) IB = −4.2 mA.

(6) IB = −3.5 mA.

(7) IB = −2.8 mA.

(8) IB = −2.1 mA.

(9) IB = −1.4 mA.

(10) IB = −0.7 mA.

Tamb = 25 °C.

handbook, halfpage

103

102

10−1

MLD670

−10−1−1−10 IC (mA)

RCEsat

(Ω)

−102−103

(1)

(3)(2)

Fig.7 Collector-emitter equivale nt on-resistance

as a function of collector current; typical

values.

IC/IB = 20.

(1) Tamb = 150 °C.

(2) Tamb = 25 °C.

(3) Tamb = −55 °C.

2003 Jul 22 7

NXP Semiconductors Pr oduct data shee t

15 V, 0.5 A

PNP low VCEsat (BISS) transistor PBSS3515M

PACKAGE OUTLINE

UNIT A1

max.

A(1) bb

1e1

eLL

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.50

0.46 0.20

0.12 0.55

0.47

0.03 0.62

0.55 0.35 0.65

DIMENSIONS (mm are the original dimensions)

Note

1. Including plating thickness

0.30

0.22

0.30

0.22

SOT883 SC-101 03-02-05

03-04-03

1.02

0.95

0 0.5 1 mm

scale

eadless ultra small plastic package; 3 solder lands; body 1.0 x 0.6 x 0.5 mm SOT88

2003 Jul 22 8

NXP Semiconductors Pr oduct data shee t

15 V, 0.5 A

PNP low VCEsat (BISS) transistor PBSS3515M

DATA SHEET STATUS

Notes

1. Please consult the most rec en tly issued document before initiating or co mpleting a design.

2. The product s tatus of device(s) described in this document may have changed since this document was pub lis hed

and may differ in case of multiple devices. The latest product status information is available on th e Internet at

URL http://www.nxp.com.

DOCUMENT

STATUS(1) PRODUCT

STATUS(2) DEFINITION

Objective data sheet Development This document contains data from the objective specification for pro duct

development.

Preliminary data sheet Qualification This document contains data from the preliminary specification.

Product data sheet Production T his document contains the product specification.

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Limiting values ⎯ Stress above one or more limiting

values (as defined in the Absolute Maximum Ratings

System of IEC 60134) may cause permanent damage to

the device. Limiting values are stress ratings only and

operation of the device at these or any other conditions

above those given in the Characteristics sections of this

document is not implied. Exposure to limiting values for

extended periods may affect device reliability.

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Quick refer ence data ⎯ The Quick reference data is an

extract of th e product data given in the Limiting values an d

Characteristics sections of this docu ment, and as such is

not complete, exhaus tive or legally binding.

NXP Semiconductors

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made to the content, except for the legal definitions and disclaimers.

Printed in The Netherlands 613514/01/pp9 Date of release: 2003 Jul 22 Document orde r number: 9397 750 11558