19-4810; Rev 0; 7/09 PCIe, Single Lane, 2:1/1:2 Multiplexer and Redriver with Equalization Features The MAX4969 active 2:1 and 1:2 multiplexer equalizes and redrives PCIeM signals up to 5.0GT/s (Gigatransfers per second) and operates from a single +3.3V supply. S Single +3.3V Supply Operation The MAX4969 features PCIe-required electrical idle and receiver detection on each channel, and improves signal integrity at the receiver through independent programmable input equalization and output deemphasis. S Independent Input Equalization S PCIe Gen 1 (2.5GT/s) and Gen 2 (5.0GT/s) Return Loss 8dB (1.25GHz f 2.5GHz) S Independent Output Deemphasis S Independent Output Level Selection Reduced Power and EMI The MAX4969 is available in a small, 42-pin (3.5mm x 9.0mm) TQFN package optimal for simplified layout and space-saving requirements. The MAX4969 is specified over the 0NC to +70NC commercial operating temperature range. S On-Chip 50I Input/Output Terminations S Inline Signal Traces for Simplified Layout S Space-Saving, 3.5mm x 9.0mm TQFN Package Applications Ordering Information Blade Servers Workstations Communications Switches PART TEMP RANGE PIN-PACKAGE MAX4969CTO+ 0NC to +70NC 42 TQFN-EP* +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. Test Equipment Storage Area Network Pin Configuration VCC GND INBM INBP GND INAM INAP GND RX_DET GND OUTBM OUTBP GND OUTAM OUTAP GND VCC TOP VIEW 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 INEQB0 ODEB0 39 20 INEQB1 ODEB1 40 MAX4969 19 INEQA0 *EP 7 8 9 VCC INEQ0 GND INP INM GND SEL1 SEL2 18 INEQA1 10 11 12 13 14 15 16 17 ODE1 6 GND 5 OUTM 4 OUTP 3 GND 2 EN 1 INEQ1 + ODE0 ODEA1 42 VCC ODEA0 41 TQFN *CONNECT EXPOSED PAD (EP) TO GND. PCIe is a registered trademark of PCI-SIG Corp. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. MAX4969 General Description MAX4969 PCIe, Single Lane, 2:1/1:2 Multiplexer and Redriver with Equalization ABSOLUTE MAXIMUM RATINGS (Voltages referenced to GND.) VCC. ......................................................................-0.3V to +4.0V All Other Pins (Note 1) ............................. -0.3V to (VCC + 0.3V) Continuous Current, IN_P, IN_M, OUT_P, OUT_M.......... Q30mA Peak Current, IN_P, IN_M, OUT_P, OUT_M (for 10kHz, 1% duty cycle) . ......................... Q100mA Continuous Power Dissipation (TA = +70NC) 42-Pin TQFN (derate 34.5mW/NC above +70NC) ......2758mW Junction-to-Case Thermal Resistance BJC (Note 2)................................................................. +2NC/W Junction-to-Ambient Thermal Resistance BJA (Note 2)............................................................... +29NC/W Operating Temperature Range.............................. 0NC to +70NC Junction Temperature Range............................ -40NC to +150NC Storage Temperature Range............................. -65NC to +150NC Lead Temperature (soldering, 10s).................................+300NC Note 1: All I/O pins are clamped by internal diodes. Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +3.0V to +3.6V, CCL = 75nF coupling capacitor on each output, RL = 50I on each output, TA = 0NC to +70NC, unless otherwise noted. Typical values are at VCC = +3.3V and TA = +25NC.) (Note 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 3.6 V INEQ_ = ODE_ = GND 120 150 INEQ_ = ODE_ = VCC 160 200 mA DC PERFORMANCE Power-Supply Range Supply Current VCC ICC 3.0 EN = VCC EN = GND Input Impedance, Differential Output Impedance, Differential Common-Mode Resistance to GND, Input Terminations Not Powered Common-Mode Resistance to GND, Input Terminations Powered Output Short-Circuit Current Common-Mode Delta, Between Active and Idle States 50 ZRX-DIFF-DC DC 80 100 120 I ZTX-DIFF-DC DC 80 100 120 I VIN_P = VIN_M = 0 to 200mV 50 kI VIN_P = VIN_M = -150mV to 0V 1 kI DC 40 ZRX-HIGH-IMPDC-POS ZRX-HIGH-IMPDC-NEG ZRX-DC ITX-SHORT 60 I 90 mA -100 +100 mV Difference between DC average of VOUT_P and VOUT_M -25 +25 mV ABS(VOUT_P - VOUT_M) -10 +10 mV 0.05GHz < f P 1.25GHz (Note 4) 10 dB 1.25GHz < f P 2.5GHz (Note 4) 8 dB Single-ended (Note 4) 50 VTX-CM-DCACTIVE-IDLEDELTA DC Output Offset, During Active State VTX-CM-DC- DC Output Offset, During Electrical Idle VTX-IDLE-DIFF- LINE-DELTA DC AC PERFORMANCE Input Return Loss, Differential 2 RLRX-DIFF PCIe, Single Lane, 2:1/1:2 Multiplexer and Redriver with Equalization (VCC = +3.0V to +3.6V, CCL = 75nF coupling capacitor on each output, RL = 50I on each output, TA = 0NC to +70NC, unless otherwise noted. Typical values are at VCC = +3.3V and TA = +25NC.) (Note 3) PARAMETER SYMBOL Input Return Loss, Common Mode RLRX-CM Output Return Loss, Differential RLTX-DIFF Output Return Loss, Common Mode RLTX-CM CONDITIONS MIN dB 0.05GHz < f P 1.25GHz (Note 4) 10 dB 1.25GHz < f P 2.5GHz (Note 4) 8 dB 0.05GHz < f P 2.5GHz (Note 4) 6 dB 0.05GHz < f P 2.5GHz 150 Differential Output Voltage, Full Swing, No Deemphasis VTX-DIFF-PP 2 x ABS(VOUT_P - VOUT_M), ODE_1 = GND, ODE_0 = VCC (see Table 1), f = 500MHz 800 2 x ABS(VOUT_P - VOUT_M), ODE_1 = ODE_0 = GND (see Table 1), f = 500MHz 600 LOW UNITS 6 VRX-DIFF-PP VTX-DIFF-PP- MAX 0.05GHz < f P 2.5GHz (Note 4) Differential Input Signal Range, Redriver Operation Differential Output Voltage, Low Swing, No Deemphasis TYP 1200 mVP-P 1000 1200 mVP-P 750 900 mVP-P Output Deemphasis Ratio, 0dB VTX-DE-RATIO- f = 2.5GHz, ODE_1 = GND, ODE_0 = VCC or GND, Figure 1 (see Table 1) 0dB 0 dB Output Deemphasis Ratio, 3.5dB VTX-DE-RATIO- f = 2.5GHz, ODE_1 = VCC, ODE_0 = GND, Figure 1 (see Table 1) 3.5dB 3.5 dB Output Deemphasis Ratio, 6dB VTX-DE-RATIO- f = 2.5GHz, ODE_1 = VCC, ODE_0 = VCC, Figure 1 (see Table 1) 6dB 6 dB f = 2.5GHz, INEQ_1 = GND, INEQ_0 = GND or VCC (see Table 2) 0 dB 3.5 dB 6 dB Input Equalization, 0dB Input Equalization, 3.5dB Input Equalization, 6dB Output Common-Mode Voltage Propagation Delay VRX-EQ-0dB VRX-EQ-3.5dB VRX-EQ-6dB VTX-CM-AC-PP f = 2.5GHz, INEQ_1 = VCC, INEQ_0 = VCC (see Table 2) MAX(VOUT_P + VOUT_M)/2 MIN(VOUT_P + VOUT_M)/2 (Note 4) (Note 4) 160 TTX-RISE-FALL (Notes 4, 5) 30 Rise/Fall Time Mismatch TTX-RFMISMATCH (Notes 4, 5) Output Skew Same Pair TSK Rise/Fall Time Deterministic Jitter Random Jitter Electrical Idle Entry Delay Electrical Idle Exit Delay TPD f = 2.5GHz, INEQ_1 = VCC, INEQ_0 = GND (see Table 2) 280 100 mVP-P 400 ps ps 20 ps 15 ps (Note 4) 10 TTX-DJ-DD K28.5 P pattern, AC-coupled, RL = 50I, effects of deemphasis deembedded (Note 4), 5GT/s 20 TTX-RJ-DD D10.2 pattern, f > 1.5MHz 0.5 From input to output 15 ns From input to output 8 ns TTX-IDLE-SETTO-IDLE TTX-IDLE-TODIFF-DATA psP-P 1.4 psRMS 3 MAX4969 ELECTRICAL CHARACTERISTICS (continued) MAX4969 PCIe, Single Lane, 2:1/1:2 Multiplexer and Redriver with Equalization ELECTRICAL CHARACTERISTICS (continued) (VCC = +3.0V to +3.6V, CCL = 75nF coupling capacitor on each output, RL = 50I on each output, TA = 0NC to +70NC, unless otherwise noted. Typical values are at VCC = +3.3V and TA = +25NC.) (Note 3) PARAMETER Electrical Idle Detect Threshold SYMBOL CONDITIONS MIN TYP MAX UNITS 65 100 120 mVP-P ABS(VOUT_P - VOUT_M) 35 mVP-P Voltage change in positive direction (Note 4) 600 mV VTX-IDLETHRESH Output Voltage During Electrical Idle (AC) VTX-IDLE-DIFF- Receiver Detect Pulse Amplitude VTX-RCV- AC-P DETECT Receiver Detect Pulse Width 100 ns Receiver Detect Retry Period 200 ns CONTROL LOGIC Input Logic-Level Low VIL Input Logic-Level High VIH Input Logic Hysteresis VHYST Input Pulldown Resistor RDOWN 0.6 1.4 V 130 37.5 V 60 mV 150 kW Note 3: All devices are 100% production tested at TA = +70NC. Specifications for all temperature limits are guaranteed by design. Note 4: Guaranteed by design. Note 5: Rise and fall times are measured using 20% and 80% levels. Timing Diagram VLOW_P-P VHIGH_P-P DE(dB) = 20 log Figure 1. Illustration of Output Deemphasis 4 VHIGH_P-P VLOW_P-P PCIe, Single Lane, 2:1/1:2 Multiplexer and Redriver with Equalization VIN = 200mVP-P, 5GT/s, ODE_ = 00, INEQ_ = 00 VIN = 200mVP-P, 5GT/s, ODE_ = 01, INEQ_ = 00 MAX4969 toc01 500 MAX4969 toc02 600 400 300 400 100 200mV/div 100mV/div 200 0 -100 200 0 -200 -200 -300 -400 -400 -600 -500 -150 -100 -50 0 50 100 150 -150 -100 0 50 VIN = 200mVP-P, 5GT/s, ODE_ = 10, INEQ_ = 00 VIN = 200mVP-P, 5GT/s, ODE_ = 11, INEQ_ = 00 600 400 400 200 200 200mV/div 600 0 150 MAX4969 toc04 0 -200 -200 -400 -400 -600 -600 -150 -100 -50 0 50 100 150 -150 -100 -50 0 50 100 150 50ps/div 50ps/div VIN = 500mVP-P WITH 6in STRIPLINE, 5GT/s, ODE_ = 01, INEQ_ = 00 VIN = 500mVP-P WITH 19in STRIPLINE, 5GT/s, ODE_ = 01, INEQ_ = 00 MAX4969 toc06 MAX4969 toc05 600 600 400 400 200 200 200mV/div 200mV/div 100 50ps/div MAX4969 toc03 200mV/div -50 50ps/div 0 0 -200 -200 -400 -400 -600 -600 -150 -100 -50 0 50ps/div 50 100 150 -150 -100 -50 0 50 100 150 50ps/div 5 MAX4969 Typical Operating Characteristics (VCC = +3.3V, TA = +25NC, unless otherwise noted.) Typical Operating Characteristics (continued) (VCC = +3.3V, TA = +25NC, unless otherwise noted.) VIN = 500mVP-P WITH 19in STRIPLINE, 5GT/s, ODE_ = 01, INEQ_ = 11 VIN = 500mVP-P, 5GT/s, ODE_ = 01, INEQ_ = 00, AFTER 6in STRIPLINE MAX4969 toc07 MAX4969 toc08 600 400 400 200 200 200mV/div 200mV/div 600 0 -200 0 -200 -400 -400 -600 -600 -150 -100 -50 0 50 100 150 -150 -100 -50 0 50 100 150 50ps/div 50ps/div VIN = 500mVP-P, 5GT/s, ODE_ = 01, INEQ_ = 00, AFTER 19in STRIPLINE VIN = 500mVP-P, 5GT/s, ODE_ = 11, INEQ_ = 00, AFTER 19in STRIPLINE MAX4969 toc09 600 MAX4969 toc10 300 400 200 100mV/div 200 200mV/div MAX4969 PCIe, Single Lane, 2:1/1:2 Multiplexer and Redriver with Equalization 0 100 0 -100 -200 -200 -400 -300 -600 -150 -100 -50 0 50ps/div 6 50 100 150 -150 -100 -50 0 50ps/div 50 100 150 PCIe, Single Lane, 2:1/1:2 Multiplexer and Redriver with Equalization PIN NAME 1, 17, 22, 38 VCC Power-Supply Input. Bypass VCC to GND with 1FF and 0.01FF capacitors in parallel as close to the device as possible, recommended on each VCC pin. 2 INEQ1 Channel 1 Input Equalization Control MSB. See Table 2. INEQ1 is internally pulled down by a 60kI (typ) resistor. 3 INEQ0 Channel 1 Input Equalization Control LSB. See Table 2. INEQ0 is internally pulled down by a 60kI (typ) resistor. 4, 7, 11, 14, 23, 26, 29, 31, 34, 37 GND MAX4969 Pin Description FUNCTION Ground 5 INP Channel 1 Noninverting Input 6 INM Channel 1 Inverting Input 8 SEL1 Channel 1 Active Output Selection Input. Drive SEL1 low to activate A outputs. Drive SEL high to activate B outputs. SEL1 is internally pulled down by a 60kI (typ) resistor. 9 SEL2 Channel 2 Active Input Selection Input. Drive SEL2 low to activate A inputs. Drive SEL high to activate B inputs. SEL2 is internally pulled down by a 60kI (typ) resistor. 10 EN Enable Input. Drive EN low for reduced power standby mode. Drive EN high for normal operation. EN is internally pulled down by a 60kI (typ) resistor. 12 13 OUTP OUTM Channel 2 Noninverting Output Channel 2 Inverting Output 15 ODE1 Channel 2 Output Deemphasis Control MSB. See Table 1. ODE1 is internally pulled down by a 60kI (typ) resistor. 16 ODE0 Channel 2 Output Deemphasis Control LSB. See Table 1. ODE0 is internally pulled down by a 60kI (typ) resistor. 18 INEQA1 Channel 2 Input A Equalization Control MSB. See Table 2. INEQA1 is internally pulled down by a 60kI (typ) resistor. 19 INEQA0 Channel 2 Input A Equalization Control LSB. See Table 2. INEQA0 is internally pulled down by a 60kI (typ) resistor. 20 INEQB1 Channel 2 Input B Equalization Control MSB. See Table 2. INEQB1 is internally pulled down by a 60kI (typ) resistor. 21 INEQB0 Channel 2 Input B Equalization Control LSB. See Table 2. INEQB0 is internally pulled down by a 60kI (typ) resistor. 24 INBM Channel 2 Inverting Input B 25 INBP Channel 2 Noninverting Input B 27 INAM Channel 2 Inverting Input A 28 INAP Channel 2 Noninverting Input A 30 RX_DET Receiver Detection Control Bit. Toggle RX_DET to initiate receiver detection. RX_DET is internally pulled down by a 60kI (typ) resistor. 32 OUTBM Channel 1 Inverting Output B 33 OUTBP Channel 1 Noninverting Output B 35 OUTAM Channel 1 Inverting Output A 36 OUTAP Channel 1 Noninverting Output A 39 ODEB0 Channel 1 Output B Deemphasis Control LSB. See Table 1. ODEB0 is internally pulled down by a 60kI (typ) resistor. 7 PCIe, Single Lane, 2:1/1:2 Multiplexer and Redriver with Equalization MAX4969 Pin Description PIN NAME FUNCTION 40 ODEB1 Channel 1 Output B Deemphasis Control MSB. See Table 1. ODEB1 is internally pulled down by a 60kI (typ) resistor. 41 ODEA0 Channel 1 Output A Deemphasis Control LSB. See Table 1. ODEA0 is internally pulled down by a 60kI (typ) resistor. 42 ODEA1 Channel 1 Output A Deemphasis Control MSB. See Table 1. ODEA1 is internally pulled down by a 60kI (typ) resistor. -- EP Exposed Pad. Internally connected to GND. Connect EP to a large ground plane to maximize thermal performance. EP is not intended as an electrical connection point. Functional Diagram VCC VCC ODEB0 ODEB1 ODEA0 ODEA1 INEQ1 INEQ0 SEL1 MAX4969 CHANNEL 1 CONTROL OUTAP VCC OUTAM INP INM OUTBP OUTBM EN RX_DET GLOBAL CONTROL VCC INAP INAM OUTP OUTM SEL2 ODE1 ODE0 INEQA1 INEQA0 INEQB1 INEQB0 INBP INBM CHANNEL 2 CONTROL GND 8 PCIe, Single Lane, 2:1/1:2 Multiplexer and Redriver with Equalization The MAX4969 is an active 2:1/1:2 multiplexer designed to equalize and redrive PCIe signals up to 5.0GT/s. The MAX4969 features PCIe-required electrical idle and receiver detection on each channel, and improves signal integrity at the receiver through independent programmable input equalization and output deemphasis. Enable Input (EN) The MAX4969 features an active-high enable input (EN). EN has an internal pulldown resistor of 60kI (typ). When EN is driven low or left unconnected, the MAX4969 enters reduced power standby mode and the redrivers are disabled. Drive EN high for normal operation. Active Input/Output Select (SEL1, SEL2) SEL1 selects the active output for channel 1 and SEL2 selects the active input for channel 2. Drive SEL1 or SEL2 low or leave unconnected to activate A inputs or outputs. Drive SEL1 or SEL2 high to activate B inputs or outputs. SEL1 and SEL2 have internal pulldown resistors of 60kI (typ). Table 1. Output Deemphasis ODE_1 ODE_0 OUTPUT DEEMPHASIS (dB) 0 0 0, low swing 0 1 0, full swing 1 0 3.5, full swing 1 1 6, full swing Table 2. Input Equalization The MAX4969 features independent programmable output deemphasis capable of providing 0dB, 3.5dB, or 6dB deemphasis on any channel. When both ODE_0 and ODE_1 are driven low or left unconnected, the output is in low-swing mode (750mV typ) (see Table 1). ODE0, ODE1, ODEA0, ODEA1, ODEB0, and ODEB1 have internal pulldown resistors of 60kI (typ). Programmable Input Equalization (INEQ_0, INEQ_1) The MAX4969 features independent programmable input equalization capable of providing 0dB, 3.5dB, or 6dB of high-frequency equalization on any channel (see Table 2.) INEQ0, INEQ1, INEQA0, INEQA1, INEQB0, and INEQB1 have internal pulldown resistors of 60kI (typ). Receiver Detection (RX_DET) The MAX4969 features receiver detection on each channel. Receiver detection initializes on the rising edge of EN, or upon initial power-up if EN is high. Receiver detection can also be initiated on a rising or falling edge of the RX_DET, SEL1, or SEL2 inputs when EN is high. During this time, the part remains in reduced power standby mode and the outputs are squelched, despite the logic-high state of EN. Once started, receiver detection repeats indefinitely on each channel. Once a receiver is detected on one of the channels, up to 216 more attempts are made on the other channel. Upon receiver detection, channel output and electrical idle detection are enabled (see Table 3). RX_DET has an internal pulldown resistor of 60kI (typ). Electrical Idle Detection INPUT EQUALIZATION (dB) INEQ_1 INEQ_0 0 X 0 1 0 3.5 1 1 6 X = Don't Care Programmable Output Deemphasis (ODE_0, ODE_1) The MAX4969 features electrical idle detection to prevent unwanted noise from being redriven at the output. If the MAX4969 detects that the differential input has fallen below VTX-IDLE-THRESH, the MAX4969 squelches the output. For differential input signals that are above VTX-IDLE-THRESH, the MAX4969 turns on the output and redrives the signal. Table 3. Receiver Detection RX_DET/ SEL1/SEL2 EN X 0 Receiver detection inactive 0 1 Following a rising or falling edge; indefinite retry until receiver detected Rising or falling edge 1 Initiate receiver detection 1 1 Following a rising or falling edge; indefinite retry until receiver detected DESCRIPTION X = Don't Care 9 MAX4969 Detailed Description PCIe, Single Lane, 2:1/1:2 Multiplexer and Redriver with Equalization MAX4969 Typical Application Circuit Tx PCIe DEVICE A OUTA Tx Rx IN OUTB MAX4969 PCIe HOST INA Rx OUT Tx INB PCIe DEVICE B Rx Applications Information Layout Circuit board layout and design can significantly affect the performance of the MAX4969. Use good high-frequency design techniques, including minimizing ground inductance and using controlled-impedance transmission lines on data signals. It is recommended to run receive and transmit on different layers to minimize crosstalk and to place 1FF and 0.01FF power-supply bypass capacitors in parallel as close to VCC as possible on each VCC pin. Always connect VCC to a power plane. Exposed Pad Package The exposed-pad, 42-pin TQFN package incorporates features that provide a very low thermal resistance path for heat removal from the IC. The exposed pad on the MAX4969 must be soldered to the circuit board ground plane for proper thermal performance. For more information on exposed-pad packages, refer to Application Note 862: HFAN-08.1: Thermal Considerations of QFN and Other Exposed-Paddle Packages. Power-Supply Sequencing Caution: Do not exceed the absolute maximum ratings because stresses beyond the listed ratings may cause permanent damage to the device. Proper power-supply sequencing is recommended for all devices. Always apply GND then VCC before applying signals, especially if the signal is not current limited. Chip Information PROCESS: BiCMOS Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 42 TQFN-EP T423590+1 21-0181 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 10 (c) Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.