HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S Data Sheet May 1999 File Number 600V, SMPS Series N-Channel IGBT Features The HGTP12N60A4, HGTG12N60A4 and HGT1S12N60A4S are MOS gated high voltage switching devices combining the best features of MOSFETs and bipolar transistors. These devices have the high input impedance of a MOSFET and the low on-state conduction loss of a bipolar transistor. The much lower on-state voltage drop varies only moderately between 25oC and 150oC. * >100kHz Operation at 390V, 12A This IGBT is ideal for many high voltage switching applications operating at high frequencies where low conduction losses are essential. This device has been optimized for high frequency switch mode power supplies. * Temperature Compensating SABER Model http://www.intersil.com Formerly Developmental Type TA49335. * 200kHz Operation at 390V, 9A * 600V Switching SOA Capability * Typical Fall Time. . . . . . . . . . . . . . . . . 70ns at TJ = 125oC * Low Conduction Loss * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards Packaging Ordering Information PART NUMBER 4656.2 JEDEC TO-220AB ALTERNATE VERSION PACKAGE BRAND HGTP12N60A4 TO-220AB 12N60A4 HGTG12N60A4 TO-247 12N60A4 HGT1S12N60A4S TO-263AB 12N60A4 E C G COLLECTOR (FLANGE) NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in tape and reel, e.g. HGT1S12N60A4S9A JEDEC TO-263AB Symbol C COLLECTOR (FLANGE) G E G JEDEC STYLE TO-247 E E C G COLLECTOR (FLANGE) INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS 4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,567,641 4,587,713 4,598,461 4,605,948 4,618,872 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637 4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986 4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767 4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4SSP Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified HGTG12N60A4, HGTP12N60A4, HGT1S12N60A4S 600 Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . BVCES Collector Current Continuous At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .C110 Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . ICM Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . VGES Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . VGEM Switching Safe Operating Area at TJ = 150oC, Figure 2 . . . . . SSOA Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . PD Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Junction Temperature Range . . . . TJ, TSTG Maximum Lead Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . TPKG UNITS V 54 23 96 20 30 60A at 600V 167 1.33 -55 to 150 A A A V V W W/oC oC 300 260 oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. Pulse width limited by maximum junction temperature. TJ = 25oC, Unless Otherwise Specified Electrical Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Collector to Emitter Breakdown Voltage BVCES IC = 250A, VGE = 0V 600 - - V Emitter to Collector Breakdown Voltage BVECS IC = 10mA, VGE = 0V 10 - - V - - 250 A Collector to Emitter Leakage Current ICES VCE = 600V VCE(SAT) IC = 12A, VGE = 15V TJ = 25oC TJ = 125oC TJ = 25oC TJ = 125oC - - 2.0 mA - 2.0 2.7 V - 1.6 2.0 V IC = 250A, VCE = 600V - 5.6 - V IGES VGE = 20V - - 250 nA Switching SOA SSOA TJ = 150oC, RG = 10, VGE = 15V L = 100H, VCE = 600V 60 - - A Gate to Emitter Plateau Voltage VGEP IC = 12A, VCE = 300V - 8 - V IC = 12A, VCE = 300V VGE = 15V - 78 96 nC VGE = 20V - 97 120 nC - 17 - ns - 8 - ns - 96 - ns - 18 - ns - 55 - J Collector to Emitter Saturation Voltage Gate to Emitter Threshold Voltage Gate to Emitter Leakage Current On-State Gate Charge VGE(TH) Qg(ON) Current Turn-On Delay Time td(ON)I Current Rise Time trI Current Turn-Off Delay Time td(OFF)I Current Fall Time tfI IGBT and Diode at TJ = 25oC ICE = 12A VCE = 390V VGE =15V RG = 10 L = 500H Test Circuit - (Figure 20) Turn-On Energy (Note 3) EON1 Turn-On Energy (Note 3) EON2 - 160 - J Turn-Off Energy (Note 2) EOFF - 50 - J 2 HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4SPD TJ = 25oC, Unless Otherwise Specified (Continued) Electrical Specifications PARAMETER SYMBOL Current Turn-On Delay Time IGBT and Diode at TJ = 125oC ICE = 12A VCE = 390V VGE = 15V RG = 10 td(ON)I Current Rise Time trI Current Turn-Off Delay Time td(OFF)I Current Fall Time TEST CONDITIONS tfI L = 500H Test Circuit - (Figure 20) MIN TYP MAX UNITS - 17 - ns - 16 - ns - 110 170 ns - 70 95 ns - 55 - J J Turn-On Energy (Note 3) EON1 Turn-On Energy (Note 3) EON2 - 250 350 Turn-Off Energy (Note 2) EOFF - 175 285 J 0.75 oC/W Thermal Resistance Junction To Case RJC - - NOTES: 2. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. 3. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. EON1 is the turn-on loss of the IGBT only. EON2 is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in Figure 20. Unless Otherwise Specified VGE = 15V 50 40 30 20 10 0 25 50 75 100 125 150 70 TJ = 150oC, RG = 10, VGE = 15V, L = 200H 60 50 40 30 20 10 0 0 TC , CASE TEMPERATURE (oC) FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA fMAX, OPERATING FREQUENCY (kHz) 500 TC 300 75oC 100 VGE 15V fMAX1 = 0.05 / (td(OFF)I + td(ON)I) fMAX2 = (PD - PC) / (EON2 + EOFF) PC = CONDUCTION DISSIPATION (DUTY FACTOR = 50%) ROJC = 0.75oC/W, SEE NOTES TJ = 125oC, RG = 10, L = 500H, V CE = 390V 10 1 3 10 20 ICE, COLLECTOR TO EMITTER CURRENT (A) FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO EMITTER CURRENT 3 30 tSC , SHORT CIRCUIT WITHSTAND TIME (s) FIGURE 1. DC COLLECTOR CURRENT vs CASE TEMPERATURE 700 100 200 300 400 500 600 VCE, COLLECTOR TO EMITTER VOLTAGE (V) 20 300 VCE = 390V, RG = 10, TJ = 125oC 18 275 250 16 14 225 ISC 12 200 10 175 8 150 6 125 tSC 4 100 2 75 0 9 10 11 12 13 14 15 VGE , GATE TO EMITTER VOLTAGE (V) FIGURE 4. SHORT CIRCUIT WITHSTAND TIME 50 ISC, PEAK SHORT CIRCUIT CURRENT (A) ICE , DC COLLECTOR CURRENT (A) 60 ICE, COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S 24 DUTY CYCLE < 0.5%, VGE = 12V PULSE DURATION = 250s 20 16 TJ = 150oC 12 TJ = 125oC 8 TJ = 25oC 4 0 1.5 2 0.5 1.0 VCE, COLLECTOR TO EMITTER VOLTAGE (V) 0 2.5 TJ = 125oC, VGE = 12V, VGE = 15V 400 300 200 TJ = 25oC, VGE = 12V, VGE = 15V 0 4 2 6 8 10 12 14 16 18 20 22 ICE , COLLECTOR TO EMITTER CURRENT (A) td(ON)I, TURN-ON DELAY TIME (ns) TJ = 150oC 12 TJ = 125oC 8 TJ = 25oC 4 0 0 0.5 1.0 1.5 2 2.5 RG = 10, L = 500H, VCE = 390V 350 300 TJ = 125oC, VGE = 12V OR 15V 250 200 150 100 50 0 TJ = 25oC, VGE = 12V OR 15V 2 4 6 8 10 12 14 16 18 20 22 24 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT 32 RG = 10, L = 500H, VCE = 390V RG = 10, L = 500H, VCE = 390V 28 17 16 TJ = 25oC, TJ = 125oC, VGE = 12V 15 14 13 24 TJ = 125oC, OR TJ = 25oC, VGE = 12V 20 16 12 8 12 TJ = 25oC, TJ = 125oC, VGE = 15V TJ = 25oC OR TJ = 125oC, VGE = 15V 4 11 10 16 24 FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT 18 20 FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE EOFF, TURN-OFF ENERGY LOSS (J) EON2 , TURN-ON ENERGY LOSS (J) 600 100 DUTY CYCLE < 0.5%, VGE = 15V PULSE DURATION = 250s 400 RG = 10, L = 500H, VCE = 390V 500 24 VCE, COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE 700 ICE, COLLECTOR TO EMITTER CURRENT (A) Unless Otherwise Specified (Continued) trI , RISE TIME (ns) ICE, COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves 0 2 4 6 8 10 12 14 16 18 20 22 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO EMITTER CURRENT 4 24 2 4 6 8 10 12 14 16 18 20 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO EMITTER CURRENT 22 24 HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S Unless Otherwise Specified (Continued) 115 90 RG = 10, L = 500H, VCE = 390V RG = 10, L = 500H, VCE = 390V 80 110 VGE = 12V, VGE = 15V, TJ = 125oC tfI , FALL TIME (ns) td(OFF)I , TURN-OFF DELAY TIME (ns) Typical Performance Curves 105 100 95 VGE = 12V, VGE = 15V, TJ = 25oC 70 TJ = 125oC, VGE = 12V OR 15V 60 50 40 30 TJ = 25oC, VGE = 12V OR 15V 90 20 85 2 4 6 8 10 12 14 16 18 20 22 10 24 2 4 6 250 16 DUTY CYCLE < 0.5%, VCE = 10V PULSE DURATION = 250s TJ = 25oC TJ = -55oC 150 TJ = 125oC 100 50 0 6 7 8 11 14 9 10 12 13 VGE, GATE TO EMITTER VOLTAGE (V) 15 ICE = 24A 0.6 0.4 ICE = 12A 0.2 ICE = 6A 75 100 125 TC , CASE TEMPERATURE (oC) FIGURE 15. TOTAL SWITCHING LOSS vs CASE TEMPERATURE 5 18 20 22 24 IG(REF) = 1mA, RL = 25, TC = 25oC 12 VCE = 600V VCE = 400V 10 8 VCE = 200V 6 4 2 0 150 ETOTAL, TOTAL SWITCHING ENERGY LOSS (mJ) ETOTAL, TOTAL SWITCHING ENERGY LOSS (mJ) ETOTAL = EON2 + EOFF 50 16 10 20 30 40 50 60 QG , GATE CHARGE (nC) 70 80 FIGURE 14. GATE CHARGE WAVEFORMS 0.8 0 25 14 0 16 RG = 10, L = 500H, VCE = 390V, VGE = 15V 1.0 12 14 FIGURE 13. TRANSFER CHARACTERISTIC 1.2 10 FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER CURRENT VGE, GATE TO EMITTER VOLTAGE (V) ICE, COLLECTOR TO EMITTER CURRENT (A) FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO EMITTER CURRENT 200 8 ICE , COLLECTOR TO EMITTER CURRENT (A) ICE , COLLECTOR TO EMITTER CURRENT (A) 10 TJ = 125oC, L = 500H, VCE = 390V, VGE = 15V ETOTAL = EON2 + EOFF ICE = 24A 1 ICE = 12A ICE = 6A 0.1 5 10 100 1000 RG, GATE RESISTANCE () FIGURE 16. TOTAL SWITCHING LOSS vs GATE RESISTANCE HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S Unless Otherwise Specified (Continued) VCE, COLLECTOR TO EMITTER VOLTAGE (V) Typical Performance Curves 3.0 C, CAPACITANCE (nF) FREQUENCY = 1MHz 2.5 2.0 CIES 1.5 1.0 COES 0.5 CRES 0 0 5 10 15 20 25 2.4 DUTY CYCLE < 0.5%, VGE = 15V PULSE DURATION = 250s, TJ = 25oC 2.3 2.2 ICE = 18A 2.1 ICE = 12A 2.0 ICE = 6A 1.9 8 9 FIGURE 17. CAPACITANCE vs COLLECTOR TO EMITTER VOLTAGE ZJC , NORMALIZED THERMAL RESPONSE 11 10 13 12 14 15 FIGURE 18. COLLECTOR TO EMITTER ON-STATE VOLTAGE vs GATE TO EMITTER VOLTAGE 100 0.5 0.2 0.1 10-1 t1 0.05 PD t2 0.02 0.01 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZJC X RJC) + TC SINGLE PULSE 10-2 -5 10 10-4 10-3 10-2 10-1 100 101 t1 , RECTANGULAR PULSE DURATION (s) FIGURE 19. IGBT NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE Test Circuit and Waveforms RHRP660 90% 10% VGE EON2 EOFF L = 500H VCE RG = 10 90% + - ICE VDD = 390V 10% td(OFF)I tfI trI td(ON)I FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT 6 16 VGE, GATE TO EMITTER VOLTAGE (V) VCE, COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 21. SWITCHING TEST WAVEFORMS HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S Handling Precautions for IGBTs Operating Frequency Information Insulated Gate Bipolar Transistors are susceptible to gateinsulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler's body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows fMAX1 or fMAX2; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as "ECCOSORBDTM LD26" or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 21. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJM. fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2). The allowable dissipation (PD) is defined by PD = (TJM - TC)/RJC. The sum of device switching and conduction losses must not exceed PD. A 50% duty factor was used (Figure 3) and the conduction losses (PC) are approximated by PC = (VCE x ICE)/2. EON2 and EOFF are defined in the switching waveforms shown in Figure 21. EON2 is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss (ICE x VCE) during turn-off. All tail losses are included in the calculation for EOFF; i.e., the collector current equals zero (ICE = 0). 7. Gate Protection - These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended. 7 ECCOSORBDTM is a trademark of Emerson and Cumming, Inc. HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S TO-263AB SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE E A A1 H1 TERM. 4 D L2 L1 L 1 3 b b1 e c J1 e1 0.450 (11.43) TERM. 4 L3 0.350 (8.89) b2 0.700 (17.78) 3 0.150 (3.81) 1 0.080 TYP (2.03) 0.062 TYP (1.58) MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS 1.5mm DIA. HOLE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.170 0.180 4.32 4.57 A1 0.048 0.052 1.22 1.32 4, 5 b 0.030 0.034 0.77 0.86 4, 5 b1 0.045 0.055 1.15 1.39 4, 5 b2 0.310 7.88 2 c 0.018 0.022 0.46 0.55 4, 5 D 0.405 0.425 10.29 10.79 E 0.395 0.405 10.04 10.28 e 0.100 TYP 2.54 TYP 7 e1 0.200 BSC 5.08 BSC 7 H1 0.045 0.055 1.15 1.39 J1 0.095 0.105 2.42 2.66 L 0.175 0.195 4.45 4.95 L1 0.090 0.110 2.29 2.79 4, 6 L2 0.050 0.070 1.27 1.77 3 L3 0.315 8.01 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-263AB outline dated 2-92. 2. L3 and b2 dimensions established a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled in this area. 4. Dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder plating. 6. L1 is the terminal length for soldering. 7. Position of lead to be measured 0.120 inches (3.05mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 11 dated 5-99. 4.0mm USER DIRECTION OF FEED 2.0mm TO-263AB 1.75mm C L 24mm TAPE AND REEL 24mm 16mm COVER TAPE 40mm MIN. ACCESS HOLE 30.4mm 13mm 330mm 100mm GENERAL INFORMATION 1. 800 PIECES PER REEL. 2. ORDER IN MULTIPLES OF FULL REELS ONLY. 3. MEETS EIA-481 REVISION "A" SPECIFICATIONS. 8 24.4mm HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S TO-247 3 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE A E SYMBOL OP Q OR D L1 b1 c 2 1 3 3 J1 e e1 LEAD 1 - GATE LEAD 2 - COLLECTOR LEAD 3 - EMITTER TERM. 4 - COLLECTOR 9 MAX MILLIMETERS MIN MAX NOTES 0.180 0.190 4.58 4.82 - b 0.046 0.051 1.17 1.29 2, 3 b1 0.060 0.070 1.53 1.77 1, 2 b2 0.095 0.105 2.42 2.66 1, 2 c 0.020 0.026 0.51 0.66 1, 2, 3 D 0.800 0.820 20.32 20.82 - E 0.605 0.625 15.37 15.87 e1 b MIN A e b2 L INCHES TERM. 4 OS 0.219 TYP 0.438 BSC - 5.56 TYP 4 11.12 BSC 4 J1 0.090 0.105 2.29 2.66 1 L 0.620 0.640 15.75 16.25 - BACK VIEW L1 0.145 0.155 3.69 3.93 1 OP 0.138 0.144 3.51 3.65 - Q 0.210 0.220 5.34 5.58 - 2 5 OR 0.195 0.205 4.96 5.20 - OS 0.260 0.270 6.61 6.85 - NOTES: 1. Lead dimension and finish uncontrolled in L1. 2. Lead dimension (without solder). 3. Add typically 0.002 inches (0.05mm) for solder coating. 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 5. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93. HGTP12N60A4, HGTG12N60A4, HGT1S12N60A4S TO-220AB (Alternate Version) 3 LEAD JEDEC TO-220AB PLASTIC PACKAGE A E OP INCHES A1 Q H1 TERM. 4 D L1 b1 c 2 3 J1 e e1 MIN MAX NOTES 0.170 0.180 4.32 4.57 - 0.048 0.052 1.22 1.32 2, 4 b 0.030 0.034 0.77 0.86 2, 4 b1 0.045 0.055 1.15 1.39 2, 4 c 0.018 0.022 0.46 0.55 2, 4 D 0.590 0.610 14.99 15.49 - E 0.395 0.405 10.04 10.28 H1 1 MILLIMETERS MAX A e1 60o MIN A1 e b L SYMBOL 0.100 TYP 0.200 BSC 0.235 0.255 - 2.54 TYP 5 5.08 BSC 5 5.97 6.47 - J1 0.095 0.105 2.42 2.66 6 L 0.530 0.550 13.47 13.97 - L1 0.110 0.130 2.80 3.30 3 OP 0.149 0.153 3.79 3.88 - Q 0.105 0.115 2.66 2.92 - NOTES: 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO-220AB outline dated 3-24-87. 2. Dimension (without solder). 3. Solder finish uncontrolled in this area. 4. Add typically 0.002 inches (0.05mm) for solder plating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 3 dated 7-97. All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 10 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029