TIP105 / TIP107 — PNP Epitaxial Silicon Darlington Transistor
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
TIP105 / TIP 107 Rev. 1.1.0
December 2014
TIP105 / TIP107
PNP Epitaxial Silicon Darlington Transistor
Features
• Monolithic Constructi on with Built-in Base -Emitte r
Shunt Resistors
• High DC Current Gain:
hFE = 1000 @ VCE = -4 V, IC = -3 A (Minimum)
• Collector-Emitter Sustaining Voltage
• Low Collector-Emitter Saturation Voltage
• Industr ial Use
• Complementary to TIP102
Ordering Information
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the re co mmen ded operating cond iti ons an d s tres si ng the parts to the se lev el s i s n ot re co mme nde d. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. Values are at TC = 25°C unless otherwise noted.
Part Number Top Mark Package Packing Method
TIP105 TIP105 TO-220 3L (Single Gauge) Bulk
TIP105TU TIP105 TO-220 3L (Single Gauge) Rail
TIP107 TIP107 TO-220 3L (Single Gauge) Bulk
TIP107TU TIP107 TO-220 3L (Single Gauge) Rail
Symbol Parameter Value Unit
VCBO Collector-Base Voltage TIP105 -60 V
TIP107 -100
VCEO Collector-Emitter Voltage TIP105 -60 V
TIP107 -100
VEBO Emitter-Base Voltage -5 V
ICCollector Current (DC) -8 A
ICP Collector Current (Pulse) -15 A
IBBase Current (DC) -1 A
TJJunction Temperature 150 °C
TSTG Storage Temperature Range -65 to 150 °C
1.Base 2.Collector 3.Emitter
1TO-220
R1 10kΩ≅
R2 0.6kΩ≅
Equivalent Circuit
B
E
C
R1 R2
TIP105 / TIP107 — PNP Epitaxial Silicon Darlington Transistor
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
TIP105 / TIP 107 Rev. 1.1.0 2
Thermal Characteristics
Values are at TC = 25°C unless otherwise noted.
Electrical Characteristics(1)
Values are at TC = 25°C unless otherwise noted.
Note:
1. Pulse test: pw ≤ 300 μs, duty cycle ≤ 2%.
Symbol Parameter Value Unit
PC Collector Dissipation (TA = 25°C) 2 W
Collector Dissipation (TC = 25°C) 80
Symbol Parameter Conditions Min. Max. Unit
VCEO(sus) Collector-Emitter Sustaining
Voltage TIP105 IC = -30 mA, IB = 0 -60 V
TIP107 -100
ICEO Collector Cut-Off Current TIP105 VCE = -30 V, IB = 0-50
μA
TIP107 VCE = -50 V, IB = 0-50
ICBO Collector Cut-Off Current TIP105 VCB = -60 V, IE = 0 -50 μA
TIP107 VCB = -100 V, IE = 0 -50
IEBO Emitter Cut-Off Current VEB = -5 V, IC = 0 -2 mA
hFE DC Current Gain VCE = -4 V, IC = -3 A 1000 20000
VCE = -4 V, IC = -8 A 200
VCE(sat) Collector-Emitter Saturation
Voltage IC = -3 A, IB = -6 mA -2.0 V
IC = -8 A, IB = -80 mA -2.5
VBE(on) Base-Emitter On Voltage VCE = -4 V, IC = -8 A -2.8 V
Cob Output Capacitance VCB = -10 V, IE = 0,
f = 0.1 MHz 300 pF
TIP105 / TIP107 — PNP Epitaxial Silicon Darlington Transistor
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
TIP105 / TIP 107 Rev. 1.1.0 3
Typical Performance Characteristics
Figure 1. Static Characteristic Figure 2. DC Current Gain
Figure 3. Collector-Emitter Saturation Voltage and
Base-Emitter Saturation Voltage Figure 4. Collector Output Capacitance
Figure 5. Safe Operating Area Figure 6. Power Derating
-0 -1 -2 -3 -4 -5
-0
-1
-2
-3
-4
-5
IB = -800μA
IB = -900 μA
IB = -1000μA
IB = -700μA
IB = -600μA
IB = -500μA
IB = -400μA
IB = -300 μA
IB = -200μA
IC[A], COLLECTOR CURRENT
VCE[V], CO L L E CTO R -EMIT T E R VO L TAGE
-0.1 -1 -10
100
1k
10k
VCE = -4V
hFE, DC CURRENT GAIN
Ic[A], COLLECTOR CURRENT
-0.1 -1 -10 -100
-100
-1k
-10k
-100k
IC = 500 IB
VCE(sat)
VBE(sat)
VBE(sat), VCE(sat) [m V], SATU R ATI ON VOLTAGE
IC[A], COLLECTOR CURRENT
-0.1 -1 -10 -100
1
10
100
1k
10k
f = 0.1 MHz
IE = 0
Cob[pF], CAPACITANCE
VCB[V], COLLECTOR-BASE VOLTAGE
-0.1 -1 -10 -100
-0.01
-0.1
-1
-10
-100
TIP106
TIP107
TIP105
5ms
100
μ
s
1ms
DC
IC[mA], COLLECTOR CURRENT
VCE[V], COLLECTOR-EMITTER VOLTAGE
0 25 50 75 100 125 150 175
0
10
20
30
40
50
60
70
80
90
100
PC[W], POWER DISSIPATION
TC[oC], CASE TEMPERATURE
TIP105 / TIP107 — PNP Epitaxial Silicon Darlington Transistor
© 2001 Fairchild Semiconductor Corporation www.fairchildsemi.com
TIP105 / TIP 107 Rev. 1.1.0 4
Physical Dimensions
Figure 7. TO-220, MOLDED, 3LEAD, JEDEC VARIATION AB
© Fairchild Semiconductor Corporation www.fairchildsemi.com
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Rev. I72
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