© 2000 Fairchild Semiconductor Corporation DS006513 www .fairchildsemi.com
September 1986
Revised February 2000
DM7438 • 7438 Quad 2-Input NAND Buffers with Open-Collector Outputs
DM7438 • 7438
Quad 2-Input NAND Buffers with Open-Collector Outputs
General Descript ion
This device contains four independent gates each of which
performs the logic NAND functio n. The op en-colle ctor out-
puts require external pull-up resistors for proper logical
operation.
Pull-Up Resistor Equations
Where: N1 (IOH) = total ma ximum output high curr ent
for all outputs tied to pull-up resistor
N
2 (IIH) = total maximum inp ut high cur ren t for
all inputs tied to pull-up resistor
N3 (IIL) = total maximum input low current for
all inputs tied to pull-up resistor
Ordering Code:
Devices also available in Tape and R eel. Speci fy by appending the s uffix let t er “X” to the o rdering c ode.
Connection Diagram Function Table
Y = AB
H = HIGH Logic Lev el
L = LOW Lo gic Level
Order Number Package Number Package Description
DM7438M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM7438N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
7438SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Inputs Output
ABY
LLH
LHH
HLH
HHL
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DM7438 • 7438
Absolute Maximum Ratings(Note 1) Note 1: The “Absolute Maximum Ratings” are those values beyond which
the saf ety of the device cannot be guarante ed. The device s hould not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not gua rant eed at the absolute maximum rati n gs.
The “Re comme nded Operat ing Co ndition s” table will define the cond itions
for actu al device operation.
Recommended Operating Conditions
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Switching Characteri stics
at VCC = 5V and TA = 25°C
Note 2: All typic als are at VCC = 5V, TA = 25°C.
Supply Voltage 7V
Input Voltage 5.5V
Output Voltage 7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range 65°C to +150°C
Symbol Parameter Min Nom Max Units
VCC Supply Voltage 4.75 5 5.25 V
VIH HIGH Level Input Voltage 2 V
VIL LOW Level Input Voltage 0.8 V
VOH HIGH Level Output Voltage 5.5 V
IOL LOW Level Output Current 48 mA
TAFree Air Operating Temperature 0 70 °C
Symbol Parameter Conditions Min Typ Max Units
(Note 2)
VIInput Clamp Voltage VCC = Min, II = 12 mA 1.5 V
ICEX HIG H Level VCC = Min, VO = 5.5V 250 µA
Output Current VIL = Max
VOL LOW Level VCC = Min, IOL = Max 0.4 V
Output Voltage VIH = Min
IIInput Current @ Max Input Voltage VCC = Max, VI = 5.5V 1 mA
IIH HIGH Level Input Current VCC = Max, VI = 2.4V 40 µA
IIL LOW Level Input Current VCC = Max, VI = 0.4V 1.6 mA
ICCH Supply Current with Outputs HIGH VCC = Max 5 8.5 mA
ICCL Supply Current with Outputs LOW VCC = Max 34 54 mA
Symbol Parameter Conditions Min Max Units
tPLH Propagation Delay Time CL = 45 pF 22 ns
LOW-to-HIGH Level Output RL = 133
tPHL Propagation Delay Time 18 ns
HIGH-to-LOW Level Output
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DM7438 • 7438
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M14A
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DM7438 • 7438
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Sma ll Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
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DM7438 • 7438 Quad 2-Input NAND Buffers with Open-Collector Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Packag e Num be r N14A
Fairchild does not assume any responsibility for use of any circu itry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life suppor t de vices o r syst ems are devices or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instruct ions fo r use pr ovi de d in the labe l ing, can be re a-
sonably expected to result in a significant injury to the
user.
2. A criti cal com ponen t in any compo nent o f a l ife supp ort
device or system whose failure to perform can be rea-
sonabl y e xpec ted to c ause th e fa i lure of the li fe s upp or t
device or system, or to affect its safety or effectiveness.
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