BLF900-110 - Philips Semiconductors / NXP Semiconductors

DATA SH EET

Product speciﬁcation

Supersedes data of 2003 Sep 22 2004 Feb 04

DISCRETE SEMICONDUCTORS

BLF900-110; BLF900S-110

Base station LDMOS transistors

M3D379

M3D461

2004 Feb 04 2

Philips Semiconductors Product speciﬁcation

Base station LDMOS transistors BLF900-110; BLF900S-110

FEATURES

•Typical CDMA IS95 performance at standard settings

with a supply voltage of 27 V, frequency of 881.5 MHz

and IDQ of 700 mA; adjacent channel bandwidth is

30 kHz, adjacent channel at ±750 kHz:

– Output power = 24 W (AV)

– Gain = 15 dB

– Efficiency = 27%

– ACPR = −45 dBc at 750 kHz and BW = 30 kHz.

•110 W CW performance

•Easy power control

•Excellent ruggedness

•High power gain

•Excellent thermal stability

•Designed for broadband operation (800 to 1000 MHz)

•Internally matched for ease of use.

APPLICATIONS

•RF power amplifier for GSM, EDGE and CDMA base

stations and multicarrier operations in the

800 to 1000 MHz frequency range.

DESCRIPTION

110 W LDMOS power transistor for base station

applications at frequencies from 800 to 1000 MHz.

PINNING - SOT502A PINNING - SOT502B

PIN DESCRIPTION

1 drain

2 gate

3 source; connected to ﬂange

handbook, halfpage

Top view

MBK394

Fig.1 Simplified outline SOT502A (BLF900-110).

PIN DESCRIPTION

1 drain

2 gate

3 source; connected to ﬂange

Top view

MBL105

Fig.2 Simplified outline SOT502B (BLF900S-110).

Leads are gold-plated.

QUICK REFERENCE DATA

Typical RF performance at Th=25°C in a common source test circuit.

MODE OF OPERATION f

(MHz) VDS

(V) PL

(W) Gp

(dB) ηD

(%) d3

(dBc) ACPR 750

(dBc)

2-tone, class-AB f1= 890.0; f2= 890.1 27 100 (PEP) 17 38 −33 −

CDMA (IS95) 881.5 27 24 (AV) 15 27 −−45

2004 Feb 04 3

Philips Semiconductors Product speciﬁcation

Base station LDMOS transistors BLF900-110; BLF900S-110

ORDERING INFORMATION

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

THERMAL CHARACTERISTICS

Note

1. Thermal resistance is determined under specified RF operating conditions.

CHARACTERISTICS

Tj=25°C unless otherwise speciﬁed.

TYPE NUMBER PACKAGE

NAME DESCRIPTION VERSION

BLF900-110 −Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A

BLF900S-110 −Earless ﬂanged LDMOST ceramic package; 2 leads SOT502B

SYMBOL PARAMETER MIN. MAX. UNIT

VDS drain-source voltage −75 V

VGS gate-source voltage −±15 V

Tstg storage temperature −65 +150 °C

Tjjunction temperature −200 °C

SYMBOL PARAMETER CONDITIONS VALUE UNIT

Rth(j-c) thermal resistance from junction to case Th=25°C, PL= 160 W (AV), note 1 0.9 K/W

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V(BR)DSS drain-source breakdown voltage VGS = 0; ID= 3 mA 75 −−V

VGSth gate-source threshold voltage VDS = 10 V; ID= 250 mA 4.5 −5.5 V

IDSS drain-source leakage current VGS = 0; VDS =28V −−3µA

IDSX on-state drain current VGS =V

GSth +9V; V

DS =10V 31 −−A

IGSS gate leakage current VGS =±15 V; VDS =0 −−0.5 µA

gfs forward transconductance VDS = 20 V; ID= 7.5 A −7−S

RDSon drain-source on-state resistance VGS =V

GSth + 9 V; ID=9A −90 −mΩ

2004 Feb 04 4

Philips Semiconductors Product speciﬁcation

Base station LDMOS transistors BLF900-110; BLF900S-110

APPLICATION INFORMATION

RF performance in a common source class-AB circuit. VDS = 27 V; f = 890 MHz; Th=25°C; unless otherwise speciﬁed.

Note

1. Refer to RF Gain grouping table.

RF Gain grouping

Notes

1. 0.2 dB overlap is allowed for measurement repeatability.

2. For 2-tone at f1= 890 MHz; f2= 890.1 MHz.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Mode of operation: 2-tone CW, 100 kHz spacing, IDQ = 700 mA

Gppower gain PL= 100 W (PEP) 16 17 (1) −dB

ηDdrain efﬁciency 35 38 −%

IRL input return loss −−9<−6dB

d3third order intermodulation

distortion −−33 −27 dBc

ruggedness VSWR = 10 : 1 through all

phases; PL= 125 W (PEP) no degradation in output power

Mode of operation: CDMA, IS95 (pilot, paging, sync and trafﬁc codes 8 to 13), IDQ = 575 mA

Gppower gain PL=24W(AV) −15 −dB

ηDdrain efﬁciency PL=24W(AV) −27 −%

ACPR 750 adjacent channel power ratio at BW = 30 kHz −−45 −dBc

CODE(1) GAIN(2)

(dB)

MIN. MAX.

B 16.0 16.5

C 16.5 17.0

D 17.0 17.5

E 17.5 18.0

2004 Feb 04 5

Philips Semiconductors Product speciﬁcation

Base station LDMOS transistors BLF900-110; BLF900S-110

handbook, halfpage

MLE343

(dB)

10 Pout (W) 103

102

ηD

(%)

ηD

Fig.3 Power gain and efficiency as functions of

load power; typical values.

VDS = 27 V; IDQ = 700 mA; f = 890 MHz.

handbook, halfpage

040 PL(PEP) (W)

(dB)

80 120

ηD

(%)

MLE344

ηD

Fig.4 Power gain and efficiency as functions of

peak envelope load power; typical values.

VDS = 27 V; IDQ = 700 mA; f1= 890.0 MHz; f2= 890.1 MHz.

handbook, halfpage

−60

−40

−20

MLE345

dim

(dBc)

10 PL(PEP) (W)103

102

(1)

(2)

(3)

VDS = 27 V; f1= 890.0 MHz; f2= 890.1 MHz.

Fig.5 Third order intermodulation distortion as a

function of peak envelope load power;

typical values.

(1) IDQ = 600 mA. (2) IDQ = 800 mA. (3) IDQ = 700 mA.

handbook, halfpage

−80

−40

−20

−60

MLE346

110 PL(PEP) (W)

dim

(dBc)

103

102

(1)

(3)

(2)

VDS =27V;I

DQ = 700 mA; f1= 890.0 MHz; f2= 890.1 MHz.

Fig.6 Third order intermodulation distortion as a

function of peak envelope load power;

typical values.

(1) d3. (2) d5. (3) d7.

2004 Feb 04 6

Philips Semiconductors Product speciﬁcation

Base station LDMOS transistors BLF900-110; BLF900S-110

handbook, halfpage

0.86 0.87

f (GHz)

(Ω)

0.88 0.9

1.5

0.5

−1.5

−2.5

−0.5

0.89

MLE348

Fig.7 Input impedance as a function of frequency

(series components); typical values.

Class-AB operation; VDS = 27 V; IDQ = 700 mA; PL= 100 W.

Values comprised for different parameters.

handbook, halfpage

0.86 0.87

f (GHz)

(Ω)

0.88 0.9

2.5

1.5

0.89

MLE349

Fig.8 Input impedance as a function of frequency

(series components); typical values.

Class-AB operation; VDS = 27 V; IDQ = 700 mA; PL= 100 W.

Values comprised for different parameters.

24 32

(dB)

ηD

(%)

ACPR

(dB)

Pout (dBm) 48

−40

−50

−70

−80

−60

mle347

ADJ

ALT

ηD

Fig.9 Single carrier CDMA performance as a

function of output power.

VDS =27V;I

DQ = 575 mA; f = 881.5 MHz.

Test signal: Single carrier IS-97 CDMA with PAR = 9.5 dB at 0.01 %

(pilot, paging, sync, 6 traffic channels with Walsh codes 8-13).

ADJ at 750 kHz offset in 30 kHz BW;

ALT at 1.98 MHz offset in 30 kHz BW.

handbook, halfpage

MGS998

drain

gate

ZIN

Fig.10 Definition of transistor impedance.

2004 Feb 04 7

Philips Semiconductors Product speciﬁcation

Base station LDMOS transistors BLF900-110; BLF900S-110

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mle351

RF in

C4 C10

C14 C15 C16

C18 C19

L6L5

C7 C11

C1 C17

D.U.T.

RF out

L8 L 9 L 10 L 11

L 3

Vdd

L 12

C13

C12

L7 L2

R2 L1

Fig.11 Test circuit for 860 to 900 MHz operation.

2004 Feb 04 8

Philips Semiconductors Product speciﬁcation

Base station LDMOS transistors BLF900-110; BLF900S-110

mle350

PHILIPS

900 MHz Input

Rev. 1

PHILIPS

900 MHz Output

Rev. 1

+V9

L8 L9 L10 L11 L12L7L6L5

58.5 58.5

C7 C11

C14 C16 C17

C10

C18

C19

R3 Vdd

C12

C13

PHILIPS

900 MHz Input

Rev. 1

PHILIPS

900 MHz Output

Rev. 1

C12

C13

C14

C15

Fig.12 Component layout for 860 to 900 MHz test circuit.

Dimensions in mm.

The components are situated on one side of the copper-clad Ultralam 2000 printed-circuit board (εr= 2.5); thickness = 31 mm.

The other side is unetched and serves as a ground plane.

2004 Feb 04 9

Philips Semiconductors Product speciﬁcation

Base station LDMOS transistors BLF900-110; BLF900S-110

List of components (see Figs 11 and 12)

Notes

1. American Technical Ceramics type 100A or capacitor of same quality.

2. Mounted flat.

3. Striplines are on a double copper-clad Ultralam 2000 printed-circuit board (εr= 2.5); thickness = 0.31 mm.

COMPONENT DESCRIPTION VALUE DIMENSIONS

C1 multilayer ceramic chip capacitor; note 1 30 pF

C2, C12 multilayer ceramic chip capacitor; note 1 47 pF

C3, C13 multilayer ceramic chip capacitor; note 1 300 pF

C4 multilayer ceramic chip capacitor; note 1 10 pF

C5 multilayer ceramic chip capacitor; note 1 3 pF

C6, C7, C15 trimmer capacitors (Tekelec); note 2 0.8 to 8 pF

C8 multilayer ceramic chip capacitor; note 1 20 nF

C9 tantalum capacitor 10 µF; 35 V

C10, C11 multilayer ceramic chip capacitor; note 1 13 pF

C14 multilayer ceramic chip capacitor; note 1 8.2 pF

C16 trimmer capacitor 0.5 to 4.5 pF

C17 multilayer ceramic chip capacitor; note 1 56 pF

C18 tantalum capacitor; low ESR 10 µF; 35 V

C19 electrolytic capacitor 220 µF; 40 V

L1 ferrite bead (long) grade 4S2

L2 3 turn ind. copper wire 1 mm; int dia = 4.5 mm

L3 4 turn ind. copper wire 1 mm; int dia = 3 mm

L4 ferrite bead (short) grade 4S2

L5 stripline; note 3 Z0=50Ω2 x 17.2 mm

L6 stripline; note 3 Z0=50Ω2 x 25.4 mm

L7 stripline; note 3 Z0=50Ω5.6 x 17.4 mm

L8 stripline; note 3 Z0=50Ω16 x 10.2 mm

L9 stripline; note 3 Z0=10Ω16 x 10.2 mm

L10 stripline; note 3 Z0=25Ω5.6 x 17.4 mm

L11 stripline; note 3 Z0=50Ω2 x 25.4 mm

L12 stripline; note 3 Z0=50Ω2 x 17.2 mm

R1 SMD resistor 8.2 Ω, 0.1 W

R2 SMD resistor 4.7 Ω, 0.1 W

R3 metal ﬁlm resistor 10 Ω, 0.6 W

2004 Feb 04 10

Philips Semiconductors Product speciﬁcation

Base station LDMOS transistors BLF900-110; BLF900S-110

PACKAGE OUTLINES

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT502A 99-12-28

03-01-10

0 5 10 mm

scale

Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A

M M

UNIT A

12.83

12.57 0.15

0.08 20.02

19.61 9.53

9.25 19.94

18.92 9.91

9.65

4.72

3.43

cU2

0.25 0.5127.94

1.14

0.89

34.16

33.91

5.33

4.32

3.38

3.12

1.70

1.45

9.50

9.30

inches 0.505

0.495 0.006

0.003 0.788

0.772

19.96

19.66

0.786

0.774 0.375

0.364 0.785

0.745 0.390

0.380

0.186

0.135 0.01 0.021.100

0.045

0.035 1.345

1.335

0.210

0.170 0.133

0.123 0.067

0.057

0.374

0.366

DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)

w1AB

M M M

2004 Feb 04 11

Philips Semiconductors Product speciﬁcation

Base station LDMOS transistors BLF900-110; BLF900S-110

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT502B 99-12-28

03-01-10

0 5 10 mm

scale

Earless flanged LDMOST ceramic package; 2 leads SOT502B

M M

UNIT A

12.83

12.57 0.15

0.08 20.02

19.61 9.53

9.25 19.94

18.92 9.91

9.65

4.72

3.43

cU2

0.25

1.14

0.89

20.70

20.45

5.33

4.32

1.70

1.45

9.50

9.30

inches 0.505

0.495 0.006

0.003 0.788

0.772

19.96

19.66

0.786

0.774 0.375

0.364 0.785

0.745 0.390

0.380

0.186

0.135 0.010

0.045

0.035 0.815

0.805

0.210

0.170 0.067

0.057

0.374

0.366

DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)

2004 Feb 04 12

Philips Semiconductors Product speciﬁcation

Base station LDMOS transistors BLF900-110; BLF900S-110

DATA SHEET STATUS

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was

published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

LEVEL DATA SHEET

STATUS(1) PRODUCT

STATUS(2)(3) DEFINITION

I Objective data Development This data sheet contains data from the objective speciﬁcation for product

development. Philips Semiconductors reserves the right to change the

speciﬁcation in any manner without notice.

II Preliminary data Qualiﬁcation This data sheet contains data from the preliminary speciﬁcation.

Supplementary data will be published at a later date. Philips

Semiconductors reserves the right to change the speciﬁcation without

notice, in order to improve the design and supply the best possible

product.

III Product data Production This data sheet contains data from the product speciﬁcation. Philips

Semiconductors reserves the right to make changes at any time in order

to improve the design, manufacturing and supply. Relevant changes will

be communicated via a Customer Product/Process Change Notiﬁcation

(CPCN).

DEFINITIONS

Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the

same type number and title. For detailed information see

the relevant data sheet or data handbook.

Limiting values definition Limiting values given are in

accordance with the Absolute Maximum Rating System

(IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device.

These are stress ratings only and operation of the device

attheseor at anyotherconditions above thosegiveninthe

Characteristics sections of the specification is not implied.

Exposure to limiting values for extended periods may

affect device reliability.

Application information  Applications that are

described herein for any of these products are for

illustrative purposes only. Philips Semiconductors make

norepresentation orwarrantythatsuchapplications willbe

suitable for the specified use without further testing or

modification.

DISCLAIMERS

Life support applications  These products are not

designed for use in life support appliances, devices, or

systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips

Semiconductorscustomers usingorsellingtheseproducts

for use in such applications do so at their own risk and

agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Right to make changes  Philips Semiconductors

reserves the right to make changes in the products -

including circuits, standard cells, and/or software -

described or contained herein in order to improve design

and/or performance. When the product is in full production

(status ‘Production’), relevant changes will be

communicated via a Customer Product/Process Change

Notification (CPCN). Philips Semiconductors assumes no

responsibility or liability for the use of any of these

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makes no representations or warranties that these

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Printed in The Netherlands R77/02/pp13 Date of release: 2004 Feb 04 Document order number: 9397 750 12171