D OR PW PACKAGE
(TOP VIEW)
1B 116
2B 215
3B 314
4B 413
5B 512
6B 611
7B 710
E8 9
1C
2C
3C
4C
5C
6C
7C
COM
ULQ2003A-Q1
ULQ2004A-Q1
www.ti.com
SGLS148D DECEMBER 2002REVISED APRIL 2010
HIGH-VOLTAGE HIGH-CURRENT DARLINGTON TRANSISTOR ARRAYS
Check for Samples: ULQ2003A-Q1,ULQ2004A-Q1
1FEATURES
Qualified for Automotive Applications
ESD Protection Exceeds 200 V Using Machine
Model (C = 200 pF, R = 0)
500-mA-Rated Collector Current (Single
Output)
High-Voltage Outputs: 50 V
Output Clamp Diodes
Inputs Compatible With Various Types of
Logic
Relay-Driver Applications
DESCRIPTION
The ULQ2003A and ULQ2004A are high-voltage high-current Darlington transistor arrays. Each consists of
seven npn Darlington pairs that feature high-voltage outputs with common-cathode clamp diodes for switching
inductive loads. The collector-current rating of a single Darlington pair is 500 mA. The Darlington pairs can be
paralleled for higher current capability. Applications include relay drivers, hammer drivers, lamp drivers, display
drivers (LED and gas discharge), line drivers, and logic buffers.
The ULQ2003A has a 2.7-kΩseries base resistor for each Darlington pair, for operation directly with TTL or 5-V
CMOS devices. The ULQ2004A has a 10.5-kΩseries base resistor to allow operation directly from CMOS
devices that use supply voltages of 6 V to 15 V. The required input current of the ULQ2004A is below that of the
ULQ2003A.
ORDERING INFORMATION(1)
TAPACKAGE(2) ORDERABLE PART NUMBER TOP-SIDE MARKING
Tube of 40 ULQ2003ATDQ1 ULQ2003AT
Reel of 2500 ULQ2003ATDRQ1
SOIC D
–40°C to 105°C Tube of 40 ULQ2004ATDQ1 Product Preview
Reel of 2500 ULQ2004ATDRQ1 ULQ2004AT
TSSOP PW Reel of 2000 ULQ2003ATPWRQ1 U2003AT
–40°C to 125°C SOIC D Reel of 2500 ULQ2003AQDRQ1 ULQ2003AQ
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 2002–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
7C
6C
5C
4C
3C
2C
1C
COM
7
6
5
4
3
2
1
7B
6B
5B
4B
3B
2B
1B
10
11
12
13
14
15
16
9
ULQ2003A: R = 2.7 k
BW
ULQ2004A: R = 10.5 k
BW7.2 kW3 kW
RB
ULQ2003A-Q1
ULQ2004A-Q1
SGLS148D DECEMBER 2002REVISED APRIL 2010
www.ti.com
LOGIC DIAGRAM
SCHEMATICS (EACH DARLINGTON PAIR)
A. All resistor values shown are nominal.
B. The collector-emitter diode is a parasitic structure and should not be used to conduct current. If the collector(s) go
below ground an external Schottky diode should be added to clamp negative undershoots.
2Submit Documentation Feedback Copyright © 2002–2010, Texas Instruments Incorporated
Product Folder Link(s): ULQ2003A-Q1 ULQ2004A-Q1
ULQ2003A-Q1
ULQ2004A-Q1
www.ti.com
SGLS148D DECEMBER 2002REVISED APRIL 2010
ABSOLUTE MAXIMUM RATINGS(1)
at 25°C free-air temperature (unless otherwise noted) MIN MAX UNIT
VCC Collector-emitter voltage 50 V
Clamp diode reverse voltage(2) 50 V
VIInput voltage(2) 30 V
Peak collector current See Figure 14 500 mA
IOK Output clamp current 500 mA
Total emitter-terminal current –2.5 A
See Dissipation
PDContinuous total power dissipation Ratings Table
ULQ200xAT –40 105
TAOperating free-air temperature range °C
ULQ200xAQ –40 125
D package 73
qJA Package thermal impedance(3) (4) °C/W
PW package 108
Tstg Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the emitter/substrate terminal E, unless otherwise noted.
(3) Maximum power dissipation is a function of TJ(max), qJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD= (TJ(max) TA)/qJA. Operating at the absolute maximum TJof 150°C can affect reliability.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
DISSIPATION RATINGS DERATING
TA= 25°C FACTOR TA= 85°C TA= 105°C TA= 125°C
PACKAGE POWER ABOVE POWER RATING POWER RATING POWER RATING
RATING TA= 25°C
D 950 mW 7.6 mW/°C 494 mW 342 mW 190 mW
Copyright © 2002–2010, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): ULQ2003A-Q1 ULQ2004A-Q1
ULQ2003A-Q1
ULQ2004A-Q1
SGLS148D DECEMBER 2002REVISED APRIL 2010
www.ti.com
ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted) ULQ2003AT ULQ2003AQ ULQ2004AT
TEST
PARAMETER TEST CONDITIONS UNIT
FIGURE MIN TYP MAX MIN TYP MAX MIN TYP MAX
IC= 125 mA 5
IC= 200 mA 2.7 2.7 6
IC= 250 mA 2.9 2.9
On-state input
VI(on) Figure 6 VCE = 2 V V
voltage IC= 275 mA 7
IC= 300 mA 3 3
IC= 350 mA 8
II= 250 mA, IC= 100 mA 0.9 1.2 1 1.3 0.9 1.1
Collector-emitter
VCE(sat) saturation Figure 5 II= 350 mA, IC= 200 mA 1 1.4 1 1.5 1 1.3 V
voltage II= 500 mA, IC= 350 mA 1.2 1.7 1.2 1.8 1.2 1.6
TA= 25°C 100 100 50
VCE = 50 V,
Figure 1 II= 0 TA= 105°C 165
Collector cutoff
ICEX mA
current II= 0 100
Figure 2 VCE = 50 V VI= 1 V 500
Clamp forward
VFFigure 8 IF= 350 mA 1.7 2.2 1.7 2.2 1.7 2.1 V
voltage
Off-state input
II(off) Figure 3 VCE = 50 V, IC= 500 mA 30 65 30 65 50 65 mA
current VI= 3.85 V 0.93 1.35 0.93 1.35
IIInput current Figure 4 VI= 5 V 0.35 0.5 mA
VI= 12 V 1 1.45
TA= 25°C 100 100 50
Clamp reverse
IRFigure 7 VR= 50 V mA
current 100 100 100
Input
CiVI= 0, f = 1 MHz 15 25 15 25 15 25 pF
capacitance
SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted) ULQ2003A, ULQ2004A
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
tPLH Propagation delay time, low- to high-level output See Figure 9 1 10 ms
tPHL Propagation delay time, high- to low-level output See Figure 9 1 10 ms
VS
VOH High-level output voltage after switching VS= 50 V, IO= 300 mA, See Figure 10 mV
500
4Submit Documentation Feedback Copyright © 2002–2010, Texas Instruments Incorporated
Product Folder Link(s): ULQ2003A-Q1 ULQ2004A-Q1
Open VCE
Open
ICEX
Open VCE
VI
ICEX
Open
Open
II(on)
VI
Open VCE
IC
II(off)
Open
VCE IC
II
hFE =IC
II
IF
VF
Open
VR
Open
IR
ULQ2003A-Q1
ULQ2004A-Q1
www.ti.com
SGLS148D DECEMBER 2002REVISED APRIL 2010
PARAMETER MEASUREMENT INFORMATION
Figure 1. ICEX Test Circuit Figure 2. ICEX Test Circuit
Figure 3. II(off) Test Circuit Figure 4. IITest Circuit
C. IIis fixed for measuring VCE(sat), variable for measuring hFE.
Figure 5. hFE, VCE(sat) Test Circuit Figure 6. VI(on) Test Circuit
Figure 7. IRTest Circuit Figure 8. VFTest Circuit
Figure 9. Propagation Delay-Time Waveforms
Copyright © 2002–2010, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): ULQ2003A-Q1 ULQ2004A-Q1
90% 90%
1.5 V 1.5 V
10% 10%
40 µs
10 ns
5 ns
VIH
(see Note C)
0 V
VOH
VOL
Input
Output
VOLTAGE WAVEFORMS
200 W
ULQ2003A-Q1
ULQ2004A-Q1
SGLS148D DECEMBER 2002REVISED APRIL 2010
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
A. The pulse generator has the following characteristics: PRR = 12.5 kHz, ZO= 50 .
B. CLincludes probe and jig capacitance.
C. For testing the ULQ2003A, VIH = 3 V; for the ULQ2004A, VIH = 8 V.
Figure 10. Latch-Up Test Circuit and Voltage Waveforms
6Submit Documentation Feedback Copyright © 2002–2010, Texas Instruments Incorporated
Product Folder Link(s): ULQ2003A-Q1 ULQ2004A-Q1
0
IC- Collector Current - mA
2.5
800
0
100 200 300 400 500 600 700
0.5
1
1.5
2
II= 350 µA
II= 500 µA
VCE(sat) - Collector-Emitter Saturation Voltage - V
VCE(sat)
TA= 25°C
II= 250 µA
2
1.5
1
0.5
700600500400300200100
0
800
2.5
IC(tot) - Total Collector Current - mA
0
VCE(sat) - Collector-Emitter Saturation Voltage - V
VCE(sat)
II= 250 µA
II= 350 µA
II= 500 µA
TA= 25°C
0
II- Input Current - µA
500
200
0
25 50 75 100 125 150 175
50
100
150
200
250
300
350
400
450
VS= 10 V
VS= 8 V
IC - Collector Current - mA
C
I
RL= 10
TA= 25°C
0
Duty Cycle - %
600
100
0
10 20 30 40 50 60 70 80 90
100
200
300
400
500
TA= 70°C
N = Number of Outputs
Conducting Simultaneously
N = 6
N = 7
N = 5
N = 3
N = 2
N = 1
IC - Maximum Collector Current - mA
C
I
N = 4
ULQ2003A-Q1
ULQ2004A-Q1
www.ti.com
SGLS148D DECEMBER 2002REVISED APRIL 2010
TYPICAL CHARACTERISTICS
COLLECTOR-EMITTER SATURATION VOLTAGE
COLLECTOR-EMITTER SATURATION VOLTAGE vs
vs TOTAL COLLECTOR CURRENT (TWO DARLINGTONS IN
COLLECTOR CURRENT (ONE DARLINGTON) PARALLEL)
Figure 11. Figure 12.
D PACKAGE
COLLECTOR CURRENT MAXIMUM COLLECTOR CURRENT
vs vs
INPUT CURRENT DUTY CYCLE
Figure 13. Figure 14.
Copyright © 2002–2010, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): ULQ2003A-Q1 ULQ2004A-Q1
VDD V
ULQ2004A
1
2
3
4
5
6
9
10
11
12
13
14
15
16
8
CMOS
Output
7
ULQ2003A
Lam
Test
TTL
Output
VCC V
1
2
3
4
5
6
9
10
11
12
13
14
15
16
8
7
VCC V
RP
ULQ2003A
1
2
3
4
5
6
9
10
11
12
13
14
15
16
8
TTL
Output
7
ULQ2003A-Q1
ULQ2004A-Q1
SGLS148D DECEMBER 2002REVISED APRIL 2010
www.ti.com
APPLICATION INFORMATION
Figure 15. TTL to Load Figure 16. Buffer for Higher Current Loads
Figure 17. Use of Pullup Resistors to Increase Drive Current
8Submit Documentation Feedback Copyright © 2002–2010, Texas Instruments Incorporated
Product Folder Link(s): ULQ2003A-Q1 ULQ2004A-Q1
PACKAGE OPTION ADDENDUM
www.ti.com 31-Dec-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
ULQ2003AQDRQ1 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
ULQ2003ATDG4Q1 ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
ULQ2003ATDQ1 ACTIVE SOIC D 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
ULQ2003ATDRG4Q1 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
ULQ2003ATDRQ1 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
ULQ2003ATPWRQ1 ACTIVE TSSOP PW 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
ULQ2004ATDRG4Q1 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
ULQ2004ATDRQ1 ACTIVE SOIC D 16 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 31-Dec-2011
Addendum-Page 2
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF ULQ2003A-Q1, ULQ2004A-Q1 :
Catalog: ULQ2003A, ULQ2004A
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
ULQ2003ATPWRQ1 TSSOP PW 16 2500 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
ULQ2003ATPWRQ1 TSSOP PW 16 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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