MITSUBISHI MITSUBISHI <INTELLIGENT <INTELLIGENT POWER POWER MODULES> MODULES> PM50CSD120 PM50CSD120 FLAT-BASE FLAT-BASE TYPE TYPE INSULATED INSULATED PACKAGE PACKAGE PM50CSD120 FEATURE a) Adopting new 4th generation planar IGBT chip, which performance is improved by 1m fine rule process. b) Using new Diode which is designed to get soft reverse recovery characteristics. c) Keeping the package compatibility. The layout/position of both terminal pin and mounting hole is same as S-series 3rd generation IPM. * 3 50A, 1200V Current-sense IGBT for 15kHz switching * Monolithic gate drive & protection logic * Detection, protection & status indication circuits for overcurrent, short-circuit, over-temperature & under-voltage (P-Fo available from upper leg devices) * Acoustic noise-less 5.5/7.5kW class inverter application APPLICATION General purpose inverter, servo drives and other motor controls PACKAGE OUTLINES Dimensions in mm 3-2 17.02 10 1101 950.5 3-2 3-2 10 Screwing depth Min9.0 6-2 10 4-5.5 MOUNTING HOLES 3.22 9 11 10 12 B P 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 13 15 17 19 14 16 18 891 567 8 740.5 20 20.5 1234 20 VUPC UFO UP VUP1 VVPC VFO VP VVP1 VWPC WFO 11. 12. 13. 14. 15. 16. 17. 18. 19. WP VWP1 VNC VN1 NC UN VN WN Fo N 17.5 12 4.5 17 PBT Terminal code 10 2.54 U 24.5 4-R6 26 26 +1.0 6-M5NUTS 22 -0.5 66.44 A 0.5 0.5 22 19.4 LABEL A : DETAIL 4 32.6 31.6 3-2 2-2.54 1.6 19- 3.22 21.2 10.6 V 11.6 W 0.50.3 Sep. 2001 MITSUBISHI <INTELLIGENT POWER MODULES> PM50CSD120 FLAT-BASE TYPE INSULATED PACKAGE INTERNAL FUNCTIONS BLOCK DIAGRAM Rfo=1.5k WP NC Fo VNC W N VN1 VN UN VWPC Rfo VWP1 VP VVP1 UP VUP1 UFO WFO VFO VVPC VUPC Rfo Gnd In Gnd Fo Vcc Gnd In Si Out Gnd Fo Vcc TEMP Si Out Gnd In Gnd Fo Vcc Si Out Gnd In Gnd Fo Vcc Si Out Rfo Gnd In Gnd Rfo Fo Vcc Gnd In Si Out Gnd Fo Vcc Si Out Th NC N W V U P MAXIMUM RATINGS (Tj = 25C, unless otherwise noted) INVERTER PART Symbol VCES IC ICP PC Tj Parameter Collector-Emitter Voltage Collector Current Collector Current (Peak) Collector Dissipation Junction Temperature Condition VD = 15V, VCIN = 15V TC = 25C TC = 25C TC = 25C Ratings 1200 50 100 328 -20 ~ +150 Unit V A A W C Ratings Unit 20 V 20 V 20 V 20 mA CONTROL PART Symbol Parameter VD Supply Voltage VCIN Input Voltage VFO Fault Output Supply Voltage IFO Fault Output Current Condition Applied between : VUP1-VUPC VVP1-VVPC, VWP1-VWPC, VN1-VNC Applied between : UP-VUPC, VP-VVPC WP-VWPC, UN * VN * WN-VNC Applied between : UFO-VUPC, VFO-VVPC, WFO-VWPC FO-VNC Sink current at UFO, VFO, WFO, FO terminals Sep. 2001 MITSUBISHI <INTELLIGENT POWER MODULES> PM50CSD120 FLAT-BASE TYPE INSULATED PACKAGE TOTAL SYSTEM Symbol Parameter Supply Voltage Protected by VCC(PROT) OC & SC VCC(surge) Supply Voltage (Surge) Module Case Operating TC Temperature Storage Temperature Tstg Viso Isolation Voltage Ratings Condition VD = 13.5 ~ 16.5V, Inverter Part, Tj = 125C Start Unit 800 V 1000 V (Note-1) -20 ~ +100 C 60Hz, Sinusoidal, Charged part to Base, AC 1 min. -40 ~ +125 2500 C Vrms Applied between : P-N, Surge value or without switching PBT (Note-1) TC measurement point is as shown below. (Base plate depth 3mm) B P N W V 65mm U Tc THERMAL RESISTANCES Symbol Rth(j-c)Q Rth(j-c)F Rth(j-c')Q Rth(j-c')F Rth(c-f) Parameter Junction to case Thermal Resistances Contact Thermal Resistance Test Condition Inverter IGBT part (per 1 element), (Note-1) Inverter FWDi part (per 1 element), (Note-1) Inverter IGBT part (per 1 element), (Note-2) Inverter FWDi part (per 1 element), (Note-2) Case to fin, Thermal grease applied (per 1 module) Min. -- -- -- -- -- Limits Typ. -- -- -- -- -- Max. 0.38 0.70 0.23 0.36 0.027 Min. -- -- -- 0.5 -- -- -- -- -- -- Limits Typ. 2.4 2.1 2.5 1.0 0.15 0.4 2.5 0.7 -- -- Max. 3.2 2.8 3.5 2.5 0.3 1.0 3.5 1.2 1 10 Unit C/W (Note-2) TC measurement point is just under the chips. If you use this value, Rth(f-a) should be measured just under the chips. ELECTRICAL CHARACTERISTICS (Tj = 25C, unless otherwise noted) INVERTER PART Symbol VCE(sat) VEC ton trr tc(on) toff tc(off) ICES Parameter Test Condition Collector-Emitter Saturation Voltage FWDi Forward Voltage VD = 15V, IC = 50A (Fig. 1) VCIN = 0V, Pulsed -IC = 50A, VD = 15V, VCIN = 15V Switching Time VD = 15V, VCIN = 15V0V VCC = 600V, IC = 50A Tj = 125C Inductive Load (upper and lower arm) Collector-Emitter Cutoff Current VCE = VCES, VCIN = 15V (Fig. 4) Tj = 25C Tj = 125C (Fig. 2) (Fig. 3) Tj = 25C Tj = 125C Unit V V s mA Sep. 2001 MITSUBISHI <INTELLIGENT POWER MODULES> PM50CSD120 FLAT-BASE TYPE INSULATED PACKAGE CONTROL PART Symbol Parameter Test Condition ID Circuit Current Vth(on) Vth(off) Input ON Threshold Voltage Input OFF Threshold Voltage VN1-VNC VXP1-VXPC Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN * VN * WN-VNC OC Over Current Trip Level VD = 15V SC toff(OC) OT OTr UV UVr IFO(H) IFO(L) Short Circuit Trip Level Over Current Delay Time -20 Tj 125C, VD = 15V VD = 15V Base-plate Temperature detection, VD = 15V tFO Over Temperature Protection VD = 15V, VCIN = 15V (Fig. 5,6) Tj = 25C Tj = 125C (Fig. 5,6) (Fig. 5,6) Trip level Reset level Trip level Reset level Supply Circuit Under-Voltage Protection -20 Tj 125C Fault Output Current VD = 15V, VFO = 15V (Note-3) Minimum Fault Output Pulse Width VD = 15V (Note-3) (Note-3) Fault Fault Fault Fault Fault output output output output output Min. -- -- 1.2 1.7 93 59 -- -- 111 -- 11.5 -- -- -- Limits Typ. 40 13 1.5 2.0 157 -- 183 10 118 100 12.0 12.5 -- 10 1.0 1.8 Min. 2.5 2.5 -- Limits Typ. 3.0 3.0 560 Max. 55 18 1.8 2.3 -- -- -- -- 125 -- 12.5 -- Unit mA V A A s C V 0.01 15 mA -- ms is given only when the internal OC, SC, OT & UV protection. of OC, SC and UV protection operate by upper and lower arms. of OT protection operate by lower arm. of OC, SC protection given pulse. of OT, UV protection given pulse while over level. MECHANICAL RATINGS AND CHARACTERISTICS Symbol -- -- -- Test Condition Parameter Mounting torque Mounting torque Weight Main terminal Mounting part screw : M5 screw : M5 -- Max. 3.5 3.5 -- Unit N*m N*m g RECOMMENDED CONDITIONS FOR USE Symbol VCC Parameter Supply Voltage VD Control Supply Voltage VCIN(on) VCIN(off) Input ON Voltage Input OFF Voltage fPWM PWM Input Frequency tdead Arm Shoot-through Blocking Time Test Condition Applied across P-N terminals Applied between : VUP1-VUPC, VVP1-VVPC VWP1-VWPC, VN1-VNC (Note-4) Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN * VN * WN-VNC Using Application Circuit input signal of IPM, 3 sinusoidal PWM VVVF inverter (Fig. 8) For IPM's each input signals (Fig. 7) Recommended value 800 Unit V 15 1.5 V 0.8 4.0 V 20 kHz 3.0 s (Note-4) Allowable Ripple rating of Control Voltage : dv/dt 5V/s, 2Vp-p Sep. 2001 MITSUBISHI <INTELLIGENT POWER MODULES> PM50CSD120 FLAT-BASE TYPE INSULATED PACKAGE PRECAUTIONS FOR TESTING 1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corresponding supply voltage and each input signal should be kept off state. After this, the specified ON and OFF level setting for each input signal should be done. 2. When performing "OC" and "SC" tests, the turn-off surge voltage spike at the corresponding protection operation should not be allowed to rise above VCES rating of the device. (These test should not be done by using a curve tracer or its equivalent.) P, (U,V,W) IN Fo VCIN P, (U,V,W) Ic V IN Fo VCIN -Ic V (15V) (0V) VD (all) U,V,W, (N) VD (all) Fig. 1 VCE(sat) Test U,V,W, (N) Fig. 2 VEC Test a) Lower Arm Switching P VCIN (15V) Fo Signal input (Upper Arm) trr CS VCIN Signal input (Lower Arm) VCE Irr U,V,W Ic Vcc Fo 90% 90% N b) Upper Arm Switching VD (all) Ic 10% 10% 10% 10% P VCIN Fo Signal input (Upper Arm) CS VCIN (15V) Signal input (Lower Arm) tc (on) VCIN U,V,W Vcc td (on) tr tc (off) td (off) tf Fo (ton= td (on) + tr) (toff= td (off) + tf) N Ic VD (all) Fig. 3 Switching time Test circuit and waveform P, (U,V,W) A VCIN (15V) VCIN IN Fo Pulse VCE VD (all) Over Current U,V,W, (N) OC IC toff (OC) Fig. 4 ICES Test P, (U,V,W) Constant Current Short Circuit Current IN Fo VCC Constant Current VCIN SC IC VD (all) U,V,W, (N) IC Fig. 5 OC and SC Test Fig. 6 OC and SC Test waveform P VD VCINP U,V,W Vcc VD VCINN N Ic VCINP 0V t VCINN 0V t tdead tdead tdead Fig. 7 Dead time measurement point example Sep. 2001 MITSUBISHI <INTELLIGENT POWER MODULES> PM50CSD120 FLAT-BASE TYPE INSULATED PACKAGE P 10 20k VUP1 VD UFO IF Rfo Vcc Fo UP OUT + - Si In VUPC U GND GND 0.1 VVP1 VFO VD Rfo Vcc Fo VP Si In VVPC WFO V GND GND VWP1 Rfo Vcc Fo VD OUT WP OUT Si In VWPC M W GND GND 20k Vcc 10 IF Fo UN OUT Si In GND GND 0.1 N TEMP 20k Vcc 10 IF Fo VN Th OUT Si In GND GND 0.1 20k VD VN1 Vcc 10 IF Fo WN 0.1 In OUT Si GND GND VNC NC NC 5V 1k Fo Rfo : Interface which is the same as the U-phase Fig. 8 Application Example Circuit NOTES FOR STABLE AND SAFE OPERATION ; Design the PCB pattern to minimize wiring length between opto-coupler and IPM's input terminal, and also to minimize the stray capacity between the input and output wirings of opto-coupler. Quick opto-couplers: TPLH, TPLH 0.8s. Use High CMR type. The line between opto-coupler and intelligent module should be shortened as much as possible to minimize the floating capacitance. Slow switching opto-coupler: recommend to use at CTR = 100 ~ 200%, Input current = 8 ~ 10mA, to work in active. Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the power supply. Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N terminal. Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line and improve noise immunity of the system. * * * * * * Sep. 2001