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FDC30N20DZ Rev.1.0 www.fairchildsemi.com

1

FDC30N20DZ Dual N-Channel PowerTrench® MOSFET

March 2016

FDC30N20DZ

Dual N-Channel PowerTrench® MOSFET

30 V, 4.6 A, 31 mΩ

Features

Max rDS(on) = 31 mΩ at VGS = 10 V, ID = 4.6 A

Max rDS(on) = 38 mΩ at VGS = 4.5 V, ID = 4.2 A

High Performance Trench® Technology for Extremely Low

rDS(on)

Fast Switching Speed

100% UIL Tested

Typical CDM ESD protection level > 2.0 kV (Note 5)

RoHS Compliant

General Description

This N-Channel MOSFET is produced using Fairchild

Semiconductor‘s advanced PowerTrench® process. This pro-

cess has been optimized for rDS(on), sw itching perfor mance and

ruggedness.

Applications

Load Switch

Synchronous Rectifier

SuperSOTTM -6

G2

D2

S2

S1

D1

G1

Pin 1

G1

S2

G2

D1

S1

D2

MOSFET Maximum Ratings TA = 25 °C unless otherwise noted.

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

VDS Drain to Source Voltage 30 V

VGS Gate to Source Voltage ±20 V

IDDrain Current -Continuous (Note 1a) 4.6 A

-Pulsed (Note 4) 30 A

EAS Single Pulse Avalanche Energy (Note 3) 3 mJ

PDPower Dissipation (Note 1a) 0.96 W

Power Dissipation (Note 1b) 0.69

TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C

RθJA Thermal Resistance, Junction to Ambient (Note 1a) 130 °C/W

RθJA Thermal Resistance, Junction to Ambient (Note 1b) 180

Device Marking Device Package Reel Size Tape Width Quantity

.30N20 FDC30N20DZ SSOT-6 7 ’’ 8 mm 3000 units

FDC30N20DZ Dual N-Channel PowerTrench® MOSFET

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2

FDC30N20DZ Rev.1.0

Electrical Characteristics TJ = 25 °C unless otherwise noted.

Off Characteristics

On Characteristics

Dynamic Characteristics

Switching Characteristics

Drain-Source Diode Characteristics

Symbol Parameter Test Conditions Min. Typ. Max. Units

BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V30 V

ΔBVDSS

ΔTJ

Breakdown Voltage Temperature

Coefficient ID = 250 μA, referenced to 25 °C 22 mV/°C

IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V1μA

IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±10 μA

VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA11.73V

ΔVGS(th)

ΔTJ

Gate to Source Threshold Voltage

Temperature Coefficient ID = 250 μA, referenced to 25 °C -4 mV/°C

rDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 4.6 A 23 31 mΩVGS = 4.5 V, ID = 4.2 A2738

VGS = 10 V, ID = 4.6 A, TJ = 125 °C 31 42

gFS Forward Transconductance VDS = 5 V, ID = 4.6 A23S

Ciss Input Capacitance VDS = 15 V, VGS = 0 V,

f = 1MHz

356 535 pF

Coss Output Capacitance 110 165 pF

Crss Reverse Transfer Capacitance 18 30 pF

RgGate Resistance 0.1 3.5 7.0 Ω

td(on) Turn-On Delay Time VDD = 15 V, ID = 4.6 A,

VGS = 10 V, RGEN = 6 Ω

612ns

trRise Time 210ns

td(off) Turn-Off Delay Time 13 21 ns

tfFall Time 210ns

Qg(TOT) Total Gate Charge VGS = 0 V to 10 VVDD = 15 V,

ID = 4.6 A

5.6 7.9 nC

Qg(TOT) Total Gate Charge VGS = 0 V to 4.5 V2.73.8nC

Qgs Gate to Source Charge 0.9 nC

Qgd Gate to Drain “Miller” Charge 0.8 nC

VSD Source-Drain Diode Forward Voltage VGS = 0 V, IS = 4.6 A (Note 2) 0.85 1.2 V

trr Reverse Recovery Time IF = 4.6 A, di/dt = 100 A/μs 10 20 ns

Qrr Reverse Recovery Charge 2 10 nC

NOTES:

1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mount ing surfa ce of the drain pins.

RθJC is guaranteed by design while RθCA is determined by the user's board design.

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.

3. EAS of 3 mJ starting TJ = 25 °C; N-ch: L = 0.1 mH, IAS = 8 A, VDD = 27 V, VGS = 10 V.

4. Pulse Id measured at td <= 250μs, refer to SOA graph for more details.

5. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.

130 °C/W when mounte d on

a 1 in2 pad of 2 oz copper

a)

180 °C/W when mo unted on a

mi nimum pad of 2 oz copper

b)

G

DF

DS

SF

SS

G

DF

DS

SF

SS

FDC30N20DZ Dual N-Channel PowerTrench® MOSFET

www.fairchildsemi.com

3

FDC30N20DZ Rev.1.0

Typical Characteristics TJ = 25 °C unless otherwise noted.

Figure 1.

0.00.51.01.52.02.53.0

0

5

10

15

20

25

30

VGS = 4 V VGS = 3.5 V

VGS = 4.5 V

PULSE DURATION = 80 μs

DUTY CYCLE = 0.5% MAX

VGS = 3 V

VGS = 10 V

ID, DRAIN CURRENT (A)

VDS, DRAIN TO SOURCE VOLTAGE (V)

On-Region Characteristics Figure 2.

0 6 12 18 24 30

0.0

1.5

3.0

4.5

6.0 VGS = 3.5 V

PULSE DURATION = 80 μs

DUTY CYCLE = 0.5% MAX

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

ID, DRAIN CURRENT (A )

VGS = 4 V

VGS = 4.5 V

VGS = 3 V

VGS = 10 V

Normalized On-Resistance

vs. Drain Current and Gate Voltage

Figure 3. Normalized On- Resistance

-75 -50 -25 0 25 50 75 100 125 150

0.7

0.8

0.9

1.0

1.1

1.2

1.3

1.4

1.5

ID = 4.6 A

VGS = 10 V

NORMALIZED

DRAIN TO SOURCE ON-RESIST ANCE

TJ, JUNCTION TEMPERATURE (oC)

vs. Junction Temperature Figure 4.

2345678910

0

50

100

150

TJ = 125 oC

ID = 4.6 A

TJ = 25 oC

VGS, GATE TO SOURCE VOLTAG E (V)

rDS(on), DRAIN TO

SOURCE ON-RESIS TANCE (mΩ)

PULSE DURA TION = 80 μs

DUTY CYCLE = 0.5% MA X

On-Resistance vs. Gate to

Source Voltage

Figure 5. Transfer Characteristics

12345

0

6

12

18

24

30

TJ = 150 oC

VDS = 5 V

PULSE DURA TION = 80 μs

DUTY CYCLE = 0.5% MAX

TJ = -55 oC

TJ = 25 oC

ID, DRAIN CURRENT (A)

VGS, GA TE T O SOUR CE VOLTAGE (V)

Figure 6.

0.0 0.2 0.4 0.6 0.8 1.0 1.2

0.001

0.01

0.1

1

10

30

TJ = -55 oC

TJ = 25 oC

TJ = 150 oC

VGS = 0 V

IS, REVERSE DRAIN CURRENT (A)

VSD, BODY DIODE FO RWARD VOLTAGE (V)

Source to Drain Diode

Forward Voltage vs. Source Current

FDC30N20DZ Dual N-Channel PowerTrench® MOSFET

www.fairchildsemi.com

4

FDC30N20DZ Rev.1.0

Figure 7.

0246

0

2

4

6

8

10 ID = 4.6 A

VDD = 20 V

VDD = 15 V

VGS, GATE TO SOURCE VOLTAGE (V)

Qg, GATE CHARGE (nC)

VDD = 10 V

Gate Charge Characteristics Figure 8.

0.1 1 10 30

1

10

100

1000

f = 1 MHz

VGS = 0 V

CAPACITANCE (pF)

VDS, DRAIN TO SOURC E VOLTAGE (V)

Crss

Coss

Ciss

Capacitance vs. Drain

to Source Voltage

Figure 9.

0 5 10 15 20 25 30 35

10-9

10-8

10-7

10-6

10-5

10-4

10-3

10-2

10-1

VDS = 0 V

TJ = 25 oC

TJ = 125 oC

VGS, GATE TO SOURCE VOLTAGE (V)

Ig, GATE LEAKAGE CURRENT (A)

Gate Leakage Current vs Gate to Source

Voltage Figure 10. Forward Bias Safe Operating Area

0.01 0.1 1 10 100

0.01

0.1

1

10

100

10 s

100 μs

CURVE BENT TO

MEASURED DATA

10 μs

10 ms

DC

1 s

100 ms

1 ms

ID, DRAIN CURRENT (A)

VDS, DRA IN to SOURCE VOLTAGE (V)

THIS AREA IS

LIMITED BY rDS(on)

SINGLE PULSE

TJ = MAX RATED

RθJA = 180 oC/W

TA = 25 oC

Figure 11.

10-5 10-4 10-3 10-2 10-1 110

100 1000

0.1

1

10

100

1000

10000

P(PK), PEAK TRANSIENT POWER (W)

SINGLE PULSE

RθJA = 180 oC/W

TA = 25 oC

t, PULSE WIDTH (sec)

Single Pulse Maximum Power Dissipation

Typical Characteristics TJ = 25 °C unless otherwise noted.

FDC30N20DZ Dual N-Channel PowerTrench® MOSFET

www.fairchildsemi.com

5

FDC30N20DZ Rev.1.0

Figure 12. Junction to Ambient Transient Thermal Response Curve

10-5 10-4 10-3 10-2 10-1 110

100 100

0.0001

0.001

0.01

0.1

1

2

SINGLE PULSE

DUTY CYCLE-DESCENDING ORDER

r(t), NORMALIZED EFFECTIVE TRANSIENT

THERMAL RESISTANCE

t, RECTANGULAR PULSE DURATION (sec)

D = 0.5

0.2

0.1

0.0 5

0.0 2

0.0 1

PDM

t1t2

NOTES:

DUTY FACTO R : D = t1/t2

PEAK TJ = PDM x ZθJA x RθJA + TA

Typical Characteristics TJ = 25 °C unless otherwise noted.

NOTES: UNLESS OTHERWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO JEDEC MO-193.

VAR. AA, ISSUE E.

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C PACKAGE LENGTH DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS. MOLD

FLASH, PROTRUSIONS OR GATE BURRS SHALL

NOT EXCEED 0.25mm PER END. PACKAGE WIDTH

DOES NOT INCLUDE INTERLEAD FLASH OR

PROTRUSION. INTERLEAD FLASH OR

PROTRUSION SHALL NOT EXCEED 0.25mm PER

SIDE. PACKAGE LENGTH AND WIDTH DIMENSIONS

ARE DETERMINED AT DATUM H.

D) DRAWING FILE NAME: MKT-MA06AREVF

1.00

0.70

0.10

0.00

8°

0°

SEATING PLANE

0.60 REF

0.55

0.35

SCALE: 50X

DETAIL A

SEE DETAIL A

GAGE PLANE

0.25

1.10 MAX

0.20

0.08

0.950.95

3.00

2.80

0.70 MIN

LAND PATTERN RECOMMENDATION

3.00

2.60

0.50

0.30

1.90

0.95

1.70

1.50

1.00 MIN

2.60

SYMM

C

L

(0.30)

1

6

3

4

C

A B

C

0.20 M

0.10

A

B

H

C

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1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

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